1.6-Tbps Low-Power Linear-Drive High-Density Optical Interface (HDI/O) for ML/AI

Son Thai Le; Guilhem de Valicourt; Pete Pupalaikis; Randy Giles; Marco Lamponi; Lukas Elsinger; Shawn Liu; Brett Sawyer; Jon Proesel; Eugene Ho; Karen Liu; Glen Homsey; Joseph Lopez; Zhiqui Zhu; Steve Corteselli; Laurent Alloin; Chris Daunt; Mark Ferriss; Behzad Rahmani; Fred Warning; Ashok Bruno; Siamak Abbaslou; Mehdi Zaman; Zeyu Pan; George Fischer; Paul Haigh; Gannon Reichert; Alexander Gazman; Faezeh Fesharaki; Peter Winzer

doi:10.1364/OFC.2024.Th4C.4

Optical Fiber Communication Conference (OFC) 2024
Technical Digest Series (Optica Publishing Group, 2024),
paper Th4C.4
•https://doi.org/10.1364/OFC.2024.Th4C.4

1.6-Tbps Low-Power Linear-Drive High-Density Optical Interface (HDI/O) for ML/AI

Son Thai Le, Guilhem de Valicourt, Pete Pupalaikis, Randy Giles, Marco Lamponi, Lukas Elsinger, Shawn Liu, Brett Sawyer, Jon Proesel, Eugene Ho, Karen Liu, Glen Homsey, Joseph Lopez, Zhiqui Zhu, Steve Corteselli, Laurent Alloin, Chris Daunt, Mark Ferriss, Behzad Rahmani, Fred Warning, Ashok Bruno, Siamak Abbaslou, Mehdi Zaman, Zeyu Pan, George Fischer, Paul Haigh, Gannon Reichert, Alexander Gazman, Faezeh Fesharaki, and Peter Winzer

Optical Fiber Communication Conference 2024

San Diego California United States
24–28 March 2024
ISBN: 978-1-957171-32-6

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Postdeadline Paper Session III (Th4C)

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S. T. Le, G. de Valicourt, P. Pupalaikis, R. Giles, M. Lamponi, L. Elsinger, S. Liu, B. Sawyer, J. Proesel, E. Ho, K. Liu, G. Homsey, J. Lopez, Z. Zhu, S. Corteselli, L. Alloin, C. Daunt, M. Ferriss, B. Rahmani, F. Warning, A. Bruno, S. Abbaslou, M. Zaman, Z. Pan, G. Fischer, P. Haigh, G. Reichert, A. Gazman, F. Fesharaki, and P. Winzer, "1.6-Tbps Low-Power Linear-Drive High-Density Optical Interface (HDI/O) for ML/AI," in Optical Fiber Communication Conference (OFC) 2024, Technical Digest Series (Optica Publishing Group, 2024), paper Th4C.4.

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Abstract

We demonstrate a high-density, high-speed, low-latency, low-power, fully-packaged optical engine operating real-time at 16x106.25-Gbps (full-duplex) and achieving a chiplet edge I/O density of 246 Gbps/mm. The engine is 2D-arrayable to Tbps/mm-class I/O densities.

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