A CMOS-compatible avalanche photodiode (APD) with high speed and high sensitivity is a critical component of a low-cost, high-data-rate, and energy-efficient optical communication link. A novel waveguide-coupled silicon–germanium APD detector with three electric terminals was demonstrated with breakdown voltage of , bandwidth of 18.9 GHz, DC photocurrent gain of 15, open-eye diagram at a data rate of 35 Gb/s, and sensitivity of at a data rate of 25 Gb/s. This three-terminal APD allows high-yield fabrication in the standard CMOS process and provides robust high-sensitivity operation under small voltage supply.
© 2019 Optical Society of America under the terms of the OSA Open Access Publishing Agreement
Recent information technology advances, such as Big Data, cloud computation, cloud storage, and Internet of Things, have been driving exponential growth of data communication in high-performance computers, data centers, and long-haul telecommunication. Silicon photonics is poised to provide a fast on-chip and off-chip optical link for data communication that has low cost and high energy efficiency . As an indispensable building block of an optical link, photodetectors that have high sensitivity, large bandwidth, and CMOS compatibility play a critical role in reducing power consumption of the link by significantly lowering the requirement on laser power [2–4].
Photodetectors with internal gain are advantageous by boosting the signal-to-noise ratio and suppressing the adverse effect of thermal noise in transimpedance amplifiers (TIAs), thus improving detection sensitivity. Linear-mode avalanche photodiodes (APDs) are most commonly used to improve sensitivity, but their operations usually require large bias voltages. For example, monolithic silicon–germanium APDs were demonstrated with large gain-bandwidth products ; however, these devices were driven at bias voltages higher than those available in current computer power rails . Although germanium APDs can operate at voltages below 10 V, they often suffer from small gain-bandwidth products and large noise due to the large carrier impact ionization ratio in germanium [7–9]. Silicon has low charge multiplication noise due to its small carrier impact ionization ratio; however, it cannot absorb near-IR light that is used for telecom and datacom data communication. To take advantage of both large absorption of near-IR light in germanium and low charge multiplication noise in silicon, a silicon–germanium APD with separate absorption and charge multiplication (SACM) regions has been demonstrated . By employing a P-doped charge layer in silicon to reduce the electric field in germanium, a low-breakdown-voltage () silicon–germanium APD has been demonstrated with large bandwidth and sensitivity . In addition, large gain-bandwidth product has been achieved in silicon–germanium waveguide APDs with a lateral charge multiplication region in silicon , making this device viable in the standard CMOS fabrication process where there is no epitaxial silicon layer. However, these conventional silicon–germanium SACM APDs use one bias voltage to control electric fields in both the light absorption and charge multiplication regions, and thus require complex control of doping in the charge layer to concentrate electric field for charge multiplication. Silicon–germanium APDs with ultra-low drive voltages have been proposed in a configuration of three electric terminals [11,12]; however, no experimental work has been demonstrated so far.
This paper presents an experimental demonstration of a novel waveguide-coupled three-terminal silicon–germanium APD detector with a DC photocurrent gain of 15 near low breakdown voltage of only . This APD had a 3 dB bandwidth of 18.9 GHz, a clearly open electric eye diagram at a data rate of 35 Gb/s, sensitivity of at bit error rate (BER) of and a data rate of 25 Gb/s for error-free operation under KP4 forward error correction (FEC) limit, and a sensitivity of at BER of and a data rate of 25 Gb/s without FEC, all of which were measured without a TIA. This novel APD can be fabricated in the standard CMOS process with high yield, and has robust operation under low bias voltage, which reduces power consumption and makes it compatible with system architectures with limited voltage supply.
2. DEVICE STRUCTURE AND WORKING PRINCIPLE
The structure of this novel three-terminal silicon–germanium waveguide APD is shown in Fig. 1(a). Light is coupled from an optical fiber via a grating coupler to a silicon waveguide and is then evanescently coupled to germanium block above silicon for absorption. The device was fabricated on a silicon-on-insulator (SOI) chip with 220 nm silicon and 3 μm buried oxide. The top silicon layer was first implanted with arsenic and boron to form N-doped and P-doped interdigitated “fingers,” with finger widths from 300 nm to 700 nm and spacing between adjacent fingers from 200 nm to 600 nm. A layer of 400 nm epitaxial germanium was grown on a layer of 120 nm epitaxial silicon to accommodate other devices on the same wafer , which is not crucial for the operation of the three-terminal APD. A boron implantation of medium doping density was first performed throughout germanium. Then another shallow boron implantation of high doping density was utilized to form electric contact on germanium, together with two other electric contacts formed on the P-doped and N-doped silicon fingers, resulting in three electric terminals in total.
With three electric terminals, two voltage drops can be independently controlled in the three-terminal APD [13,14] [see Fig. 1(b)]. Such a three-terminal device contains two PIN diode junctions (i.e., one is between P-Ge and N-Si, and the other is between P-Si and N-Si), both of which are reversely biased. Specifically, one voltage drop, , controls the electric field in the germanium layer, where light is absorbed and photocarriers are generated. This electric field separates photon-generated electron–hole pairs and drives electrons toward charge multiplication regions in silicon below. The other voltage drop, , directly controls the electric field in intrinsic silicon regions sandwiched between doped silicon fingers, where charge multiplication occurs in planar direction once the electric field there is strong enough. By shrinking the spacing between the P-doped and N-doped silicon regions, a small voltage drop across them is enough to generate avalanche breakdown in the middle intrinsic silicon region.
Figure 1(c) shows simulated two-dimensional electric field in a vertical cross-section plane at the center of the silicon–germanium waveguide of the three-terminal APD. This simulation was performed by Lumerical Device , where virtual electric terminals were added at the center of doped silicon fingers in order to emulate the large three-dimensional structure with a simplified two-dimensional cross section without losing generality and therefore reduce simulation time. With a reverse bias of 6 V on both PIN diode junctions, electric field as high as is generated in the intrinsic silicon regions between doped interdigitated fingers, which is above the impact ionization field threshold for avalanche multiplication in silicon ( ). At the same time, since the germanium layer is slightly P-doped, voltage drop in germanium is enough to fully deplete the absorption region without causing charge multiplication, thus further concentrating voltage drop in silicon and suppressing undesired avalanche breakdown in germanium .
Three-terminal silicon–germanium SACM APDs are superior to their two-terminal counterparts in several ways. Most importantly, with dedicated voltage drop directly applied on the charge multiplication region, the avalanche breakdown voltage of a three-terminal APD is easily controllable. The breakdown voltage can be reduced by design, and the low-voltage operation of three-terminal APDs not only reduces power consumption for light detection, but also fits well into computing and storage architectures that have limited voltage supply . In addition, the reverse bias voltage applied on a conventional two-terminal SACM APD is shared by the light absorption and charge multiplication regions in series, and a charge layer of P-type doping in silicon is required to help concentrate voltage drop in the silicon multiplication region. This charge layer requires precise control of the doping profile, and usually an epitaxial silicon layer is needed to form this charge layer and intrinsic silicon multiplication region [3,5], thus adversely increasing fabrication complexity and cost. In addition, the dark current due to dislocation traps at the silicon–germanium boundary and doping in germanium is reduced due to lower electric field at the Si–Ge interface. Furthermore, charge layer doping affects the avalanche breakdown voltage of a SACM APD, and the multiplication gain of an APD is very sensitive to bias voltage near breakdown. Therefore the presented novel three-terminal APDs have larger fabrication yield and are more robust in operation. Also, APDs with different breakdown voltages and multiplication gains can be easily fabricated on the same wafer for different applications. Last, while doping in Ge could help reduce electric field in Ge in a conventional SACM Si–Ge APD, the three-terminal design enables easy control of voltage drop in Ge and depletion of the Ge layer before the onset of charge multiplication in the Si layer, in order to amplify all photo-carriers at high speed.
An alternative device structure that allows using three electric terminals to provide two separate voltage drops on the light absorption and charge multiplication regions, can be realized by directly adding a third electric terminal on the charge layer (P-doped silicon) of the conventional two-terminal APD , and using a vertical layer structure for the charge multiplication region. With this approach, the thickness of the epitaxial silicon layer can be accurately controlled in fabrication, and thinner multiplication layer thickness could potentially allow for even lower breakdown voltage, while the width and gap of the doping region in a lateral PIN structure are limited by mask resolution and dopant diffusion. However, there are several drawbacks to this approach. First, in order to form good electric contact at the charge layer, heavy doping on the path of light is needed, which would introduce large optical loss. In addition, although the thickness of an epitaxial layer can be well controlled, the ion implantation depth and width of a vertical doping structure cannot be accurately controlled. These dopants also need to be kept from diffusing into the intrinsic charge multiplication region below it. Therefore three-terminal APDs with lateral PIN diode structure for charge multiplication are preferred.
3. DEVICE MODEL
The electric circuit model of a three-terminal silicon–germanium APD is much more complex than that of a conventional two-terminal APD , because multiple current paths exist between any two of the three electric terminals. By analogy with the model for conventional SACM APDs [19,20], Fig. 2(a) shows an equivalent electric model of the active regions of a three-terminal APD with parasitics excluded. Three electric terminals (A, B, C) contact germanium, P-doped silicon, and N-doped silicon regions, respectively. A virtual point, “O,” is used to denote the boundary between light absorption and charge amplification regions for easier interpretation of carrier flow paths. Photocarriers generated in germanium by absorption of light have multiple paths to get collected. For example, photoelectrons travel across germanium under the attraction of higher voltage bias at the N-doped silicon region. Then a portion of these photoelectrons travels directly to the N-doped silicon region and is collected by Terminal C, while more photoelectrons are amplified in the silicon multiplication region before getting collected by Terminal C. In the comprehensive model illustrated in Fig. 2(a), a pair of lumped capacitor and resistor in parallel are used to model the current path between the three electric terminals and the boundary “O.” In addition, a lumped inductance is employed to model the charge multiplication regions between interdigitated doped silicon. This extra inductance originates from the space charge effect as a result of carrier build-up from charge avalanche multiplication and manifests itself in measured photocurrent pulse in Fig. 4(c).
The circuit elements modeled in Fig. 2(a) can be fitted from scattering parameter (S-parameter) measurement. Without a RF probe that can contact all three electric terminals simultaneously, the S-parameter between any two of the three electric terminals could be characterized consecutively. In order to measure all photocurrent generated in the device, the P-doped silicon and germanium regions were shorted by wire bonding to simplify the current measurement with one GS probe [see measured photocurrent in Fig. 4(d)]. Figure 2(b) shows the scattering parameter of the three-terminal APD with P-doped silicon and germanium regions shorted. This device’s S-parameter changes abruptly when the reverse bias voltage exceeds 5.6 V, which is consistent with measured photocurrent shown in Fig. 4(a). This turning point corresponds to full depletion of the doped germanium region and the onset of carrier multiplication in silicon.
In order to understand the measured parameters of the three-terminal APD in Fig. 2(b), the electric circuit diagram in Fig. 2(a) is simplified, as shown in Fig. 2(c), where the P-doped silicon and germanium are shorted and circuit elements (i.e., capacitances and resistances) are grouped together. Specifically, the three-terminal APD electrical parasitics include those in the diode junctions and avalanche regions, as well as substrate and pad parasitics. Here, is the resistance in the absorption region, is the capacitance in the absorption region, and is the capacitance in the avalanche region. The inductor , together with its series resistance , is due to space charge effects. is the diode series resistance, is the parasitic capacitance, is the parasitic resistance, and is the parasitic inductance, which is negligible at reverse bias less than 5.6 V when space charge effects do not occur [21,22]. Values of these parameters were fitted from characterization, and example values at reverse bias of 6 V are shown in Table 1. Circuit impedances of the three-terminal APD were then calculated based on fitted parameter values of circuit components, and they matched very well with measured values, as presented in Fig. 2(d).
4. DEVICE CHARACTERIZATION RESULTS
Figure 3 shows the optical and electrical setup for testing a fabricated chip with three-terminal APDs. A mode-locked laser was used to generate femtosecond optical pulses for measuring response speed of photodetectors . Optical data bit stream were generated by modulating continuous-wavelength (CW) laser light (1550 nm) with a Mach–Zehnder modulator (MZM) driven by amplified electric data bit stream. The modulated optical signal was then amplified with an erbium-doped fiber amplifier (EDFA) and filtered with a tunable bandpass filter before it was coupled to the chip via a grating coupler. An electric bias-tee was used to apply reverse bias voltages and collect generated photocurrent simultaneously. Photocurrent signals were then measured by a vector network analyzer, sampling scope, and BER tester (BERT) for measurement of electric parasitics, eye diagram, and BER, respectively. As shown in Fig. 2(a) and discussed in Section 3, there are multiple current paths among the three electrodes. However, due to limitation of the equipment, only one RF probe could be laid onto the electric pads. The terminals on P-doped silicon and P-doped germanium were then shorted by wire bonding in order to collect total current via one RF probe. As a result, equal reverse bias voltages were applied on P-doped silicon and P-doped germanium while grounding the N-doped silicon. This test configuration still offers desired operating condition, i.e., with large electric field in the charge multiplication region and small electric field in germanium, as confirmed in the experiment.
Figure 4 shows optical characterization of a three-terminal silicon–germanium waveguide APD with a germanium block of (thickness). The photocurrent increases with reverse bias voltage as expected, and charge multiplication occurs at a reverse bias voltage near 6 V, which is much lower than breakdown voltage of 10 V of two-dimensional SACM APDs of similar dimensions . At a reverse bias of 2 V where unit gain is defined, the responsivity of this APD is estimated to be 0.48 A/W at 1550 nm. The 10 μm germanium is not long enough to absorb all light, and the responsivity was undermined by lossy evanescent coupling from the bottom silicon waveguide to the epitaxial germanium layer and light absorption by a large centered metal electrode on top of the germanium area. It can be improved by using a longer adiabatic tapered silicon and germanium waveguide and optimizing the size and location of the metal electrode . Although this measured responsivity at 2 V bias is lower than that of conventional PIN germanium photodetectors , the overall responsivity of this APD increases with avalanche gain, which approaches 15 near avalanche breakdown for CW input light. After the breakdown voltage, the photocurrent has a sub-exponential increase with bias voltage. This is because of a large resistor formed by lightly doped fingers in silicon. This resistor is in series with the lateral PIN diode where charge multiplication occurs. With large photocurrent at avalanche breakdown, a non-negligible voltage drops across this resistor, causing the actual voltage drop in the charge multiplication region to be smaller than the DC power supply output voltage. One drawback of the measured device is large dark current, which gets amplified together with photocurrent. The dark current at a bias voltage of 5.4 V (right before the breakdown occurs) is about 10 μA. This large dark current results mainly from the leakage current in the lateral PIN diode between P-doped and N-doped fingers in silicon (with a dark current density of at the doped fingers in silicon at 5.4 V). The straggle width of the boron doping in silicon under low drive voltage is not small, and the boron atoms further diffuse during the following epitaxial silicon and germanium growth processes. In addition, possible misalignment of these two doping masks reduces the gap between P-doped and N-doped fingers. The leakage current in the lateral PIN diode can be decreased by better control of the gap between doped fingers and reducing the straggle width of their doping profiles. Last, before the two terminals on P-doped silicon and germanium were shorted, a separate voltage was applied on germanium via a DC electric probe. It was observed that the total dark current decreased slightly when germanium was biased at higher voltage than that on P-doped silicon and dark current due to defects at the silicon–germanium interface decreasing.
The breakdown voltages of three-terminal APDs with different gaps between the P-doped and N-doped silicon regions are shown in Fig. 4(b). Values of gaps shown here are those drawn on the mask, and the actual gaps in fabricated devices are much smaller due to mask misalignment and carrier diffusion. When the gap is smaller than 600 nm, the breakdown voltage increases linearly with the gap, as the same electric field is needed to initiate the avalanche process. However, when the gap is greater than 600 nm, the breakdown voltage converges to 12 V. This is because in the measured three-terminal APD, avalanche multiplication also occurs in the epitaxial silicon layer as a result of large voltage drop between germanium and N-doped silicon, and the breakdown voltage of this avalanche process is independent of the gap between doped silicon fingers. With a gap of 200 nm, an ultra low breakdown voltage of 4 V was measured. However, with such a short avalanche region, the achievable multiplication gain is limited. We instead studied mainly devices with a nominal gap of 300 nm that had breakdown voltages near 6 V. It should be noted that the actual multiplication finger gap is narrower than that designed in the mask (300 nm) due to doping mask misalignment and dopant diffusion. Last, no correlation was found between breakdown voltage and doped finger width.
The response speed of the three-terminal APD was characterized by sending a femtosecond laser pulse centered at 1550 nm to it and measuring the generated photocurrent pulse with a sampling scope. Figure 4(c) shows such an impulse response measured on the same three-terminal APD in Fig. 4(a) under several reverse bias voltages. The photocurrent pulse amplitudes were normalized to highlight the differences in pulse widths. When the reverse bias voltages are below 5.6 V, the falling edges of the photocurrent pulses have long tails, indicating that P-doped germanium is not fully depleted, and carrier diffusion transit time dominates the response speed. When the reverse bias is greater than 5.6 V, the germanium layer is fully depleted, and the photocurrent pulse has a second peak after it decays from its major peak corresponding to the optical pulse peak. This resonance effect indicates that the response speed is limited by capacitive and inductive circuit elements, which is aligned with the electric circuit model built from electric parasitics measurement [see Figs. 2(a) and 2(c)]. A bias voltage of 5.6 V also happens to be sufficient to cause avalanche multiplication between the P-doped and N-doped silicon fingers, as indicated in measured photocurrent in Fig. 4(a).
The 3 dB bandwidth of this APD was obtained by taking the Fourier transform of its photocurrent impulse response. Figure 4(d) shows that the 3 dB bandwidth of this three-terminal APD increases with reverse bias voltage, as increased electric field further depletes the lightly doped germanium (which reduces junction capacitance in germanium) and reduces photocarrier transit time until they reach saturation velocity. At the same time, the charge multiplication gain also increases as a result of impact ionization in silicon. As the bias voltage exceeds the impact ionization threshold voltage, the bandwidth levels out as the response speed is limited by the finite gain buildup time in the avalanche process. At 6.4 V reverse bias, a 3 dB bandwidth of 18.9 GHz was measured.
Electrical eye diagrams of the three-terminal APD were also measured. As shown in Fig. 3, the input optical data to the photodiode were generated by modulating a 1550 nm CW laser with a 40 Gb/s MZM, which was driven by a pseudorandom binary sequence (PRBS9) data pattern that was generated in an arbitrary waveform generator (Keysight 64 GSa/s AWG) and amplified by a high-speed electrical amplifier with 20 dB gain. The output electrical signal was recorded by a 63 GHz sampling oscilloscope. Without using a TIA, the input optical signal and output electric signals were amplified by an EDFA and an electrical amplifier, respectively. Figures 5(a)–5(c) show clearly open electrical eye diagrams of the three-terminal APD at data rates of 25 Gb/s, 30 Gb/s, and 35 Gb/s with 6 V reverse bias, due to the large avalanche gain and high response speed of the device. No saturation of avalanche gain was observed while varying optical power to measure the eye diagram. The BER of the three-terminal waveguide APD was measured by Anritsu MP1800A and is shown in Fig. 5 (d). Received optical modulation amplitude (OMA) of allows error-free operation at a data rate of 25 Gb/s below the KP4 FEC threshold of . And an OMA of leads to a BER of at a data rate of 25 Gb/s, which outperforms most PIN photodiodes . It should be noted that photocurrent gain saturation was observed when generating the eye diagrams with input optical power at the photodiode, as a result of the small cross-section area of the charge multiplication region. The photocurrent gain saturation could be alleviated by increasing the charge multiplication region size at the cost of increased capacitance.
Although the measured speed, dark current, eye diagram, and BER of the presented three-terminal Si–Ge APD still have space for improvement compared to those of conventional two-terminal Si–Ge APDs with similar dimensions , three-terminal APDs have the advantages of operation at lower drive voltage and better compatibility with the standard CMOS fabrication process, as explained in Section 2. There are several approaches to improving their performances. For example, the eye diagram and BER of a three-terminal APD can be improved by increasing its speed and gain together with reducing dark current. Specifically, the speed of a three-terminal APD can be increased by reducing the capacitance of interdigitated doped fingers in silicon. The avalanche gain of photocurrent can be enhanced by increasing the charge multiplication region width at the cost of higher bias voltage. The sensitivity can be improved by reducing the dark current with better control of the doping profiles in silicon to suppress undesired leakage current in the lateral PIN diode. Note also that these measurements were performed with a noisy EDFA (with 2% relative intensity noise at its output) and a noisy electric amplifier (with noise current of 5.6 μA) rather than a TIA (with typical noise current 2.5 μA) at the measured 3 dB bandwidth of 18.9 GHz. Higher sensitivity is expected by using a low-noise TIA and choosing the optimum avalanche gain that maximizes the signal-to-noise ratio .
For a given semiconductor material used for charge multiplication, a threshold electric field is required to initiate avalanche breakdown. To reduce the breakdown voltage, a shorter multiplication region width is needed; however, the accumulated charge multiplication gain is also reduced. The presented three-terminal APD reduces breakdown voltage for a given gain by directly applying a bias voltage drop onto the charge multiplication region without sparing a voltage drop in the light absorption region as in Ref. . Given the context of developing a low-voltage APD for data communication, a charge multiplication gain less than 10 is usually preferred, as higher gain would result in larger excess noise from the avalanche process.
An integrated silicon–germanium waveguide APD with three electric terminals has been experimentally demonstrated. The breakdown voltage of such a three-terminal APD is only 6 V, which is much smaller than that of a conventional two-terminal SACM APD of similar device geometry. The reduction of breakdown voltage results from concentrated voltage drop in charge multiplication regions by directly applying bias voltage onto these regions via two electric terminals. A third electric terminal is used to provide electric field to pull photocarriers from the light absorption region toward the charge multiplication region. Low-voltage operation of an APD makes it compatible with the power rails of current computer architectures and reduces energy consumed by the detector. This novel APD can be fabricated with high yield in the standard CMOS process without adding extra materials, and different performance metrics of this APD, e.g., breakdown voltages, can be achieved on the same wafer by design, e.g., varying lateral charge multiplication region width.
The presented three-terminal APD has a 3 dB bandwidth of nearly 19 GHz, a clearly open eye diagram at a data rate of 35 Gbs, and detection sensitivity of for error-free operation at a data rate of 25 Gb/s with KP4 FEC, thus suggesting its potential application in low-power high-speed optical communication.
The method of using three or more electric terminals to control electric field in multiple device regions can be easily extended to APDs made of other material systems, as well as other optoelectronic devices. In addition, the same device concept can be extended from waveguide APDs to those detecting light of normal incidence, thus improving light detection efficiency in free-space optics applications such as biological sample imaging and lidar.
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