Abstract

Optically storing and addressing data on photonic chips is of particular interest as such capability would eliminate optoelectronic conversion losses in data centers. It would also enable on-chip non-von Neumann photonic computing by allowing multinary data storage with high fidelity. Here, we demonstrate such an optically addressed, multilevel memory capable of storing up to 34 nonvolatile reliable and repeatable levels (over 5 bits) using the phase change material Ge2Sb2Te5 integrated on a photonic waveguide. Crucially, we demonstrate for the first time, to the best of our knowledge, a technique that allows us to program the device with a single pulse regardless of the previous state of the material, providing an order of magnitude improvement over previous demonstrations in terms of both time and energy consumption. We also investigate the influence of write-and-erase pulse parameters on the single-pulse recrystallization, amorphization, and readout error in our multilevel memory, thus tailoring pulse properties for optimum performance. Our work represents a significant step in the development of photonic memories and their potential for novel integrated photonic applications.

Published by The Optical Society under the terms of the Creative Commons Attribution 4.0 License. Further distribution of this work must maintain attribution to the author(s) and the published article's title, journal citation, and DOI.

1. INTRODUCTION

Phase-change materials (PCMs) have recently emerged as a highly promising solution in multilevel cell (MLC) random access memory applications for high-capacity data storage together with other potential MLC materials, such as ferroelectric (FRAM) [1,2], resistive metal oxide (RRAM), and magnetic random access memory (MRAM) materials [35]. Among these materials, PCMs are particularly attractive due to their capacity for multilevel, stable, and repeatable memory states with long endurance and good scalability [69]. This makes use of the high resistance contrast between the crystalline and amorphous state in PCMs, which enables multilevel operation by controlling the ratio between the two states in a memory cell electrically. Due to the reinforced Peierls distortion upon aging [10], the stochastic nature of crystalline domain formation in PCMs [11,12], and the nonlinear dependence of resistance on the WRITE voltage [13], accurately reaching arbitrary resistance states via a single electrical programming pulse is challenging. A common method currently used to overcome this issue in PCMs is the program-and-verify (P&V) [1315] iterative method, which involves measuring the resistance of the device during the writing process until the resistance reaches the target value. This method increases the complexity of writing data to electronic PCM-integrated electronic memory (phase-change random access memory, PRAM). Additionally, the resistance states of PRAM devices drift over time due to structural relaxation [1619]. This adds unwanted complexity in differentiating between neighboring resistance states over time.

On the other hand, PCMs have demonstrated excellent performance in the optical domain and have been successfully commercialized as an optical disk storage medium in the last few decades owing to their high optical contrast and long-term stability [20], albeit for binary data storage. Recent work combining PCMs with photonic circuits brings additional benefits specific to on-chip photonics, such as high bandwidth [21], wavelength division multiplexing [22], and low cross talk [23], compared with the electronic PRAM counterpart. This has not only enabled all-optical data storage on chip, but also allowed limited multilevel storage (eight levels), improved SNR, and reduced switching energy over available optical storage technologies [2428]. The ability to cascade and address multiple PCM memory cells in this fashion has additionally enabled optical computing in memory by realizing abacus-like arithmetic addition, subtraction, and multiplication [26], and matrix-vector multiplication [29].

While integrated photonic devices based on PCMs have been a highly enabling technology, up to now, all these demonstrations have used limited levels (10 unique levels) and require multiple pulses to incrementally crystallize larger and larger regions of the memory cell to reach a fully crystalline state [30], which can be a time- and energy-consuming process. In this work, therefore, we develop an innovative single-pulse programming method that is fast, energy-efficient, and, importantly, enables dense, multilevel storage in a photonic device. Specifically, we here demonstrate that it is possible to achieve 34 arbitrary levels, corresponding to over 5 bits, in a single PCM cell with precision and repeatability. This is accomplished using a novel modulation scheme where a single, double-step optical pulse can achieve arbitrary programming operations in less than 250 ns. We further explore the relationship between the pulse shape and the amorphization/recrystallization processes, thereby significantly reducing both the programming time and energy required to operate integrated PCM photonic memory.

2. RESULTS AND MEASUREMENTS

We begin by exploring the multilevel storage capabilities of our photonic PCM memory using a dual-pulse scheme for inducing amorphization (programming) and crystallization (erasing) of the cell. Figure 1(a) shows an optical image of the completed device with a cross section of the photonic memory cell. In Fig. 1(b), we illustrate our method for dual-pulse manipulation of the Ge2Sb2Te5 (GST) transmission state. A programming pulse of 20 ns in width is used to control the fraction of amorphous versus crystalline material, which determines the final transmission state of our device. To return the GST to a fully crystalline state, a fixed ERASE pulse with a trailing rectangular profile is used, regardless of the previous state of the memory cell. Using combined finite element method (FEM) and finite-difference time domain (FDTD) simulations, we demonstrate the influence of the programming pulse amplitude on the crystalline area of a 2-μm-long strip GST in Fig. 1(c). With the increasing of the pulse power, the transmission increases with the growing of the amorphous region accordingly. Figure 1(d) shows the simulated temperature distribution at the center of the GST immediately after the programming pulse. The area where the temperature surpasses the melting temperature of GST (890 K as measured by Yamada et al. [31]) is shown in dark red and denotes the final amorphous region of the memory cell after a single programming pulse. To simulate the reverse process is much more challenging and requires fully coupled simulations that account for the time-varying optical, thermal, and nucleation dynamics in the device. Therefore, in this article, we will focus on understanding the mechanism of the ERASE pulse through empirical techniques.

 figure: Fig. 1.

Fig. 1. Concept of the dual-pulse programming technique. (a) From left to right, optical image of our device with a GST photonic memory cell, magnified image of GST on top of the waveguide, and schematic cross section of the completed device. (b) Schematic of the optical pulse shapes used to amorphize and crystallize the integrated phase-change photonic memory cell. A rectangular programming pulse with increasing peak powers (red pillars) amorphizes an increasing fraction of GST while a fixed ERASE pulse returns the material back to a fully crystalline state. (c) Simulated transmission and crystalline fraction as a function of the programming pulse energy. The optical transmission through the waveguide (and the corresponding absorption in the GST) increases (decreases) as the crystalline fraction decreases. (d) Simulated temperature distribution in the GST memory cell after a 20 ns programming pulse. Area surpassing the melting temperature of GST (890 K [31]) is marked by the dark red region and is inversely related to the crystalline fraction plotted in (c).

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A. Dual-Pulse, Multilevel Operation

We first experimentally demonstrate the ability to store 34 unique transmission levels in a single cell of GST as shown in Fig. 2(a). Here, we use a rectangular programming pulse of 50 ns to reach an arbitrary level of higher transmission and another fixed, double-step ERASE pulse (50 ns high amplitude followed by 200 ns low amplitude) to return to the fully crystalline baseline transmission. Figure 2(a) and subsequent time traces of multilevel operation have been postprocessed with a low-pass filter to reduce the higher frequency noise present in our electronic analog-to-digital converter (see Supplement 1 for experimental setup). Although GST itself has issues related to state changes due to aging over time, which is still under investigation [10], our devices shows excellent stability with time. These unique transmission levels shown in Fig. 2(b) are nonvolatile and shown to be stable for many months in integrated photonic systems [25] and over 10 years in optical disk storage devices [20]. To quantify the repeatability of deterministically reaching these levels with a single ERASE/programming pulse, we repeat the same series of pulses (33 programming pulses with increasing amplitude and 33 fixed ERASE pulses) 10 times and plot a histogram of the error between the target transmission and actual transmission [see Fig. 2(c)]. We see that the standard deviation for all levels is below 0.5% from the total change in transmission, which demonstrates the highly repeatable nature of our devices (further discussion in Supplement 1). Despite our efforts to minimize mechanical and thermal drift in our setup, the single-pulse accuracy can be further improved by reducing minor fluctuations in the polarization and pulse power coupled into and out of the grating couplers on our device.

 figure: Fig. 2.

Fig. 2. Measurements of multilevel operation using a dual-pulse programming technique. (a) Recorded transmission of one programming iteration with a monotonically increasing programming pulse amplitude and a fixed ERASE pulse. Thirty-four unique levels are resolved in this 4-μm-long device. (b) Average transmission and standard deviation for a series of 10 write cycles as a function of programming pulse energy as measured in the waveguide before the GST. (c) Histogram plots of the difference between the desired transmission level and the actual transmission level from (b) measured after a single programming or ERASE pulse. Red lines are Gaussian fits to the error distribution and quantify the accuracy we can achieve from a single programming/ERASE pulse. (d) Amorphization and recrystallization pulses for various delays between the two pulses. As the delay increases, the GST transmission saturates to a fixed value due to the thermo-optic effect. Pulse power (red) shown in the right-hand plots correspond to the measured pulse power in the waveguide before the GST.

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To determine the maximum operation speed of our integrated optical memory, we monitored the transmission of a low power probe while sending a programming and ERASE pulse (this time with 25 ns and 125 ns durations, respectively) and varying the time delay between them. Figure 2(d) shows the resulting time-dependent transmission of the probe for delays ranging from 50 ns to 1 μs. The initial dip in the transmission is due to increased absorption of the probe from free carrier absorption and the thermo-optic effect, which has been extensively studied in previous works [3234]. While free carrier absorption decays in tens of femtoseconds after the trailing end of the programming pulse, the thermo-optic effect decays over hundreds of nanoseconds as the GST reaches thermal equilibrium with the surrounding waveguide and substrate. This limits the minimum amount of time required for settling before accurately determining the state of the memory cell to approximately 200 ns. A settling time of approximately 500 ns is required for the ERASE pulse. This is a significant improvement over other multilevel memory cells operating at time scales of tens of kHz [15,3537] since we do not require feedback from multiple programming and verify iterations to reach the desired level. While the minimum duration of the ERASE pulse is ultimately determined by the crystallization rate of the PCM (less than 1 ns for GST [38]), the amorphization/melting process occurs in several picoseconds [39], and therefore, much shorter optical pulses could be used to switch the cell (and indeed have been used [30,40]). This could reduce the 200 ns thermal decay we observe in Fig. 2(d) and is a subject for further investigation.

While other groups have demonstrated using picosecond or femtosecond optical pulses to change the optical property of GST such as absorption [30,39,41], previous demonstrations of GST-based photonic memory using multiple pulses of the same amplitude required large numbers of pulses ranging from several tens to thousands [26,27,29] to return to the fully crystalline state after amorphization. This resulted in typical total ERASE energies and times of approximately 10 nJ and 4 μs, respectively [26]. We improve on this by more than an order of magnitude in both time (250 ns) and energy (680 pJ) with our double-step ERASE pulse. Although dual-pulse programming methods, low drift, and multilevel electrical devices have been demonstrated in separate contexts and different devices in the past [13,42,43], we wish to point out that we combine all these advantages for the first time, to the best of our knowledge. This is enabled by our all-optical platform where we have observed 34 unique, stable, and reliable memory states—certainly a first demonstration, at least in an integrated photonics context.

B. Controlling Degree of Recrystallization with a Double-Step Programming Pulse

To better understand the influence of the ERASE pulse shape on the final ratio of amorphous to crystalline material in the memory cell, we varied both the amplitude and duration of the trailing end of the pulse and measured the final transmission state, as illustrated in Fig. 3(a). In the first case, the initial 50 ns portion of the double-step pulse was kept at a fixed amplitude, while the later portion of the pulse varied in amplitude, but maintained a fixed duration of 200 ns. The observed change in transmission is relatively insensitive to low amplitudes of the pulse’s trailing end, becoming much more influential for relative amplitudes larger than 0.2 [see Fig. 3(b)] and reaches full crystallization at a relative amplitude of 0.37. This results in the highly nonlinear response observed in Fig. 3(b) and can be attributed to onset of recrystallization. In other words, if the amplitude of the trailing end of the double-step pulse is below a certain threshold, the temperature of the GST will fall below the crystallization temperature before recrystallization can occur. Once this temperature threshold is reached, recrystallization occurs, and thus a sharp decrease in the final transmission state is observed.

 figure: Fig. 3.

Fig. 3. Measurement of the final transmission state of GST after various double-step programming pulses. (a) Illustration of experiment where the trailing end of the double-step programming pulse is varying in both amplitude and time. (b) The final transmission state of GST for increasing amplitude of the pulse’s trailing end. Once the relative amplitude surpasses 0.2, the crystallization temperature of GST is reached and recrystallization begins to occur much more rapidly. Inset: Histogram of the error distribution between the expected transmission level and the actual level reached. (c) The final transmission state of GST for double-step programming pulses with a trailing end of increasing duration. Increasing the duration allows the GST to reach the fully crystalline state. Inset: Histogram of the error distribution between the expected transmission level and the actual level reached.

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In a similar manner, controlling the length of the trailing end of the double-step programming pulse controls the length of time over which crystallization is allowed to occur. This is seen in the final state of the transmission [Fig. 3(c)], which initially decreases linearly with increasing programming time until finally saturating at the fully crystalline state for times greater than 150 ns. The distribution of error in the recrystallization process by varying both amplitude and duration of the programming pulse can be seen in the insets of Figs. 3(b) and 3(c).

C. Single-Pulse, Multilevel Operation

We finally demonstrate an improved programming technique that requires only a single pulse to reach any transmission level regardless of the previous state of the device. Instead of fully recrystallizing the GST before moving to a new transmission level [illustrated in Fig. 4(a)], here we use one double-step pulse as demonstrated above, but with varying durations of the second step [illustrated in Fig. 4(b)]. This is made possible by the initial 50 ns portion of the double-step programming pulse with a high amplitude, which erases the previous state and heats the GST above the crystallization temperature. The duration of the second step of the programming pulse determines the time over which the memory cell is allowed to crystallize and programs the final, nonvolatile transmission state of GST. An experimental demonstration of this can be seen in Fig. 4(c), which shows how the memory cell can be switched from high-to-low and low-to-high transmission states regardless of the previous material configuration. Again, we show the accumulated transmission statistics of 20 unique transmission levels after sending 200 programming pulses with randomly assigned step widths [see Fig. 4(d)]. The standard distribution of the error shown in the inset of Fig. 4(c) is 0.482%.

 figure: Fig. 4.

Fig. 4. Single-pulse programming of the multilevel optical PCM memory cell. (a) Schematic of the method to achieve dual-pulse programming and recrystallization. An ERASE pulse is needed before programming each memory level. (b) Schematic of the method to achieve single-pulse programming. The initial 50 ns portion of the double-step pulse serves to remove memory of the previous state by bringing the PCM above its melting temperature before recrystallization. (c) Time-dependent trace of transmission when multiple double-step programming pulses of random durations are sent to the device. The device is able to switch to higher or lower transmission levels with no dependence on the previous state of the material. (d) Transmission levels and total deviation distribution and separate error bar distribution of different levels of random programming pulse durations.

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3. CONCLUSION

In summary, we have shown the first demonstration, to the best of our knowledge, of 5 bit programming in a single integrated photonic memory cell. This was achieved using a technique that can realize full recrystallization of an integrated photonic PCM memory cell regardless of the state of the material. This was made possible by pulse shaping to precisely control the time-dependent temperature profile in the GST layer. To elucidate the mechanism behind this technique, we performed a parameter sweep of the double-step programming pulse in both amplitude and duration of second step and observed the degree of recrystallization. This understanding enabled us to design a flexible single-pulse programming technique, which allows for high-speed programming of the memory cell regardless of the previous state of the PCM. The 34 levels created in a single memory cell demonstrated the lowest drift seen in such devices. Our results are a broad and fundamental step towards a fast, low-power on-chip photonic memory for applications such as neuromorphic computing [24] and in-memory computing [29] on a photonic platform.

APPENDIX A: METHODS

1. Device Fabrication

Our device consists of a Ge2Te2Sb5 thin film passivated with a layer of indium-tin-oxide (ITO) and evanescently coupled to a Si3N4 photonic waveguide. Electron beam lithography and dry etching were used to define shallow-etched Si3N4 waveguides. Islands of GST were fabricated with a lift-off process involving an aligned write electron beam lithography step followed by RF sputtering of 10 nm GST and 10 nm ITO (30 W RF power, 1.1 mTorr Ar atmosphere, and 2×107Torr base pressure). In order to enhance the interaction with the optical mode, a postsputter annealing step (250°C for 10 min) was used to fully crystallize the GST.

2. Measurement Setup

We use a 1590 nm laser source, amplified with an L-band erbium-doped fiber amplifier (EDFA) to optically switch the state of the GST and a 1610 nm continuous probe laser to monitor the transmission of light. To shape the optical pulses, an arbitrary function generator (Tektronics 100 MHz AFG3102C) is used to send RF pulses to a high-speed electro-optic modulator (EOM). The nonlinear response of the EOM is compensated by the shape of the input RF pulse such that the pulse shape we describe above reflects the shape of the optical pulse after the EDFA rather than the input electrical pulse. Optical bandpass filters are used in both beam paths to reduce the influence of parasitic wavelengths. At the end of both paths, we use low-noise-sensitive photodetectors to record the dynamic change of the transmission of the light and a fast-speed sampling oscilloscope to record the thermo-optical effect of the device when it is excited by writing pulses. With this measurement scheme, we are able to observe phase transitions in real-time with subnanosecond resolution.

In order to control the power of the pulses sent to the device, we use a tunable optical attenuator to control the power of the pump seed laser before the EOM. In this way, we can provide more control over the amplitude and repeatability of the pulse power and achieve the 34 levels shown in Fig. 2. In order to reduce the fluctuation of the polarization of the probe seed laser, we also added an in-line fiber polarizer, a polarization controller, and reference photodiode between the probe laser and device to remove the noise from polarization drift due to thermal fluctuations in the setup.

Funding

Engineering and Physical Sciences Research Council (EPSRC) (EP/J018694/1, EP/M015173/1, EP/M015130/1), Deutsche Forschungsgemeinschaft (DFG) (PE1832/2-1); Horizon 2020 Framework Programme (H2020) (780848, Fun-COMP).

Acknowledgment

All authors thank the collaborative nature of European science for allowing this work to be carried out. This research was supported via the Engineering and Physical Sciences Research Council Manufacturing Fellowships (EP/J018694/1), the Wearable and Flexible Technologies (WAFT) collaboration (EP/M015173/1), the Chalcogenide Advanced Manufacturing Partnership (EP/M015130/1); the Deutsche Forschungsgemeinschaft grant (DFG) (PE1832/2-1); and the European Union's Horizon 2020 research and innovation program (780848, Fun-COMP project).

 

See Supplement 1 for supporting content.

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References

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  1. H. Ishiwara, “FeFET and ferroelectric random access memories,” in Multifunctional Oxide Heterostructures (2012), p. 7619–7627.
  2. Y. Arimoto and H. Ishiwara, “Current status of ferroelectric random-access memory,” MRS Bull. 29(11), 823–828 (2004).
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  3. N. Nishimura, T. Hirai, A. Koganei, T. Ikeda, K. Okano, Y. Sekiguchi, and Y. Osada, “Magnetic tunnel junction device with perpendicular magnetization films for high-density magnetic random access memory,” J. Appl. Phys. 91, 5246–5249 (2002).
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  4. S. Tehrani, J. M. Slaughter, M. DeHerrera, B. N. Engel, N. D. Rizzo, J. Salter, M. Durlam, R. W. Dave, J. Janesky, B. Butcher, K. Smith, and G. Grynkewich, “Magnetoresistive random access memory using magnetic tunnel junctions,” Proc. IEEE 91, 703–714 (2003).
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  5. S. S. P. Parkin, K. P. Roche, M. G. Samant, P. M. Rice, R. B. Beyers, R. E. Scheuerlein, E. J. O’sullivan, S. L. Brown, J. Bucchigano, D. W. Abraham, Y. Lu, M. Rooks, P. L. Trouilloud, R. A. Wanner, and W. J. Gallagher, “Exchange-biased magnetic tunnel junctions and application to nonvolatile magnetic random access memory (invited),” J. Appl. Phys. 85, 5828–5833 (1999).
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  6. F. Bedeschi, R. Fackenthal, C. Resta, E. M. Donze, M. Jagasivamani, E. C. Buda, F. Pellizzer, D. W. Chow, A. Cabrini, G. M. A. Calvi, R. Faravelli, A. Fantini, G. Torelli, D. Mills, R. Gastaldi, and G. Casagrande, “A bipolar-selected phase change memory featuring multi-level cell storage,” IEEE J. Solid-State Circuits 44, 217–227 (2009).
    [Crossref]
  7. M. K. Qureshi, V. Srinivasan, and J. A. Rivers, “Scalable high performance main memory system using phase-change memory technology,” ACM SIGARCH Comput. Archit. News 37(3), 24–33 (2009).
    [Crossref]
  8. B. C. Lee, E. Ipek, O. Mutlu, and D. Burger, “Architecting phase change memory as a scalable dram alternative,” ACM SIGARCH Comput. Archit. News 37(3), 2–13 (2009).
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  10. J. Y. Raty, W. Zhang, J. Luckas, C. Chen, R. Mazzarello, C. Bichara, and M. Wuttig, “Aging mechanisms in amorphous phase-change materials,” Nat. Commun. 6, 7467 (2015).
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  11. L. Jiang, B. Zhao, Y. Zhang, J. Yang, and B. R. Childers, “Improving write operations in MLC phase change memory,” in IEEE International Symposium on High-Performance Comp Architecture (IEEE, 2012), pp. 1–10.
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  13. A. Sebastian, T. Tuma, N. Papandreou, M. Le Gallo, L. Kull, T. Parnell, and E. Eleftheriou, “Temporal correlation detection using computational phase-change memory,” Nat. Commun. 8, 1115 (2017).
    [Crossref]
  14. A. Cabrini, S. Braga, A. Manetto, and G. Torelli, “Voltage-driven multilevel programming in phase change memories,” in 2009 IEEE International Workshop on Memory Technology, Design, and Testing (IEEE, 2009), pp. 3–6.
  15. M. Hu, C. E. Graves, C. Li, Y. Li, N. Ge, E. Montgomery, N. Davila, H. Jiang, R. S. Williams, J. J. Yang, Q. Xia, and J. P. Strachan, “Memristor-based analog computation and neural network classification with a dot product engine,” Adv. Mater. 30, 1–10 (2018).
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  16. I. V. Karpov, M. Mitra, D. Kau, G. Spadini, Y. A. Kryukov, and V. G. Karpov, “Fundamental drift of parameters in chalcogenide phase change memory,” J. Appl. Phys. 102, 124503 (2007).
    [Crossref]
  17. W. W. Koelmans, A. Sebastian, V. P. Jonnalagadda, D. Krebs, L. Dellmann, and E. Eleftheriou, “Projected phase-change memory devices,” Nat. Commun. 6, 8181 (2015).
    [Crossref]
  18. D. Ielmini, A. L. Lacaita, and D. Mantegazza, “Recovery and drift dynamics of resistance and threshold voltages in phase-change memories,” IEEE Trans. Electron Devices 54, 308–315 (2007).
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  19. N. Papandreou, H. Pozidis, T. Mittelholzer, G. F. Close, M. Breitwisch, C. Lam, and E. Eleftheriou, “Drift-tolerant multilevel phase-change memory,” in 2011 3rd IEEE International Memory Workshop (IMW) (IEEE, 2011), pp. 1–4.
  20. M. Wuttig and N. Yamada, “Phase-change materials for rewriteable data storage,” Nat. Mater. 6, 824–832 (2007).
  21. M. Asghari and A. V. Krishnamoorthy, “Silicon photonics: energy-efficient communication,” Nat. Photonics 5, 268–270 (2011).
    [Crossref]
  22. M. Paniccia, “Integrating silicon photonics,” Nat. Photonics 4, 498–499 (2010).
    [Crossref]
  23. H. J. Caulfield and S. Dolev, “Why future supercomputing requires optics,” Nat. Photonics 4, 261–263 (2010).
    [Crossref]
  24. Z. Cheng, C. Ríos, W. H. P. Pernice, C. D. Wright, and H. Bhaskaran, “On-chip photonic synapse,” Sci. Adv. 3, e1700160 (2017).
    [Crossref]
  25. C. Rios, M. Stegmaier, P. Hosseini, D. Wang, T. Scherer, C. D. Wright, H. Bhaskaran, and W. H. P. Pernice, “Integrated all-photonic non-volatile multi-level memory,” Nat. Photonics 9, 725–732 (2015).
    [Crossref]
  26. J. Feldmann, M. Stegmaier, N. Gruhler, C. Riós, H. Bhaskaran, C. D. Wright, and W. H. P. Pernice, “Calculating with light using a chip-scale all-optical abacus,” Nat. Commun. 8, 1–8 (2017).
    [Crossref]
  27. C. Rios, P. Hosseini, C. D. Wright, H. Bhaskaran, and W. H. P. Pernice, “On-chip photonic memory elements employing phase-change materials,” Adv. Mater. 26, 1372–1377 (2014).
    [Crossref]
  28. M. Stegmaier, C. Ríos, H. Bhaskaran, C. D. Wright, and W. H. P. Pernice, “Nonvolatile all-optical 1 × 2 switch for chipscale photonic networks,” Adv. Opt. Mater. 5, 1600346 (2017).
    [Crossref]
  29. C. Ríos, N. Youngblood, Z. Cheng, M. Le Gallo, W. H. P. Pernice, C. D. Wright, A. Sebastian, and H. Bhaskaran, “In-memory computing on a photonic platform,” arXiv:1801.06228 [cs.ET] (2018).
  30. Y. Liu, M. M. Aziz, A. Shalini, C. D. Wright, and R. J. Hicken, “Crystallization of Ge2Sb2Te5 films by amplified femtosecond optical pulses,” J. Appl. Phys. 112, 123526 (2012).
    [Crossref]
  31. N. Yamada, E. Ohno, K. Nishiuchi, N. Akahira, and M. Takao, “Rapid‐phase transitions of GeTe‐Sb2Te3 pseudobinary amorphous thin films for an optical disk memory,” J. Appl. Phys. 69, 2849–2856 (1991).
    [Crossref]
  32. M. Stegmaier, C. Rĺos, H. Bhaskaran, and W. H. P. Pernice, “Thermo-optical effect in phase-change nanophotonics,” ACS Photon. 3, 828–835 (2016).
    [Crossref]
  33. R. Soref and B. Bennett, “Electrooptical effects in silicon,” IEEE J. Quantum Electron. 23, 123–129 (1987).
    [Crossref]
  34. M. Rudé, J. Pello, R. E. Simpson, J. Osmond, and G. Roelkens, “Optical switching at 1.55 μm in silicon racetrack resonators using phase change materials,” Appl. Phys. Lett. 103, 141119 (2013).
    [Crossref]
  35. W. Kim, S. Menzel, D. J. Wouters, R. Waser, and V. Rana, “3-bit multilevel switching by deep reset phenomenon in Pt/W/TaOX/Pt-ReRAM devices,” IEEE Electron Device Lett. 37, 564–567 (2016).
    [Crossref]
  36. J. Liu, H. Yang, Z. Ma, K. Chen, X. Zhang, X. Huang, and S. Oda, “Characteristics of multilevel storage and switching dynamics in resistive switching cell of Al2O3/HfO2/Al2O3 sandwich structure,” J. Phys. D 51, 025102 (2018).
    [Crossref]
  37. M.-F. Chang, C.-C. Kuo, S.-S. Sheu, C.-J. Lin, Y.-C. King, F. T. Chen, T.-K. Ku, M.-J. Tsai, J.-J. Wu, and Y.-D. Chih, “Area-efficient embedded resistive ram (ReRAM) macros using logic-process vertical-parasitic-BJT (VPBJT) switches and read-disturb-free temperature-aware current-mode read scheme,” IEEE J. Solid-State Circuits 49, 908–916 (2014).
    [Crossref]
  38. F. Rao, K. Ding, Y. Zhou, Y. Zheng, M. Xia, S. Lv, Z. Song, S. Feng, I. Ronneberger, R. Mazzarello, W. Zhang, and E. Ma, “Reducing the stochasticity of crystal nucleation to enable subnanosecond memory writing,” Science 358, 1423–1427 (2017).
    [Crossref]
  39. L. Waldecker, T. A. Miller, M. Rudé, R. Bertoni, J. Osmond, V. Pruneri, R. E. Simpson, R. Ernstorfer, and S. Wall, “Time-domain separation of optical properties from structural transitions in resonantly bonded materials,” Nat. Mater. 14, 991–995 (2015).
    [Crossref]
  40. K. Zhang, S. Li, G. Liang, H. Huang, Y. Wang, T. Lai, and Y. Wu, “Different crystallization processes of as-deposited amorphous Ge2Sb2Te5 films on nano- and picosecond single laser pulse irradiation,” Phys. B 407, 2447–2450 (2012).
    [Crossref]
  41. C. D. Wright, Y. Liu, K. I. Kohary, M. M. Aziz, and R. J. Hicken, “Arithmetic and biologically-inspired computing using phase-change materials,” Adv. Mater. 23, 3408–3413 (2011).
    [Crossref]
  42. Y. Wang, D. Cai, Y. Chen, Y. Wang, H. Wei, R. Huo, X. Chen, and Z. Song, “Optimizing set performance for phase change memory with dual pulses set method,” ECS Solid State Lett. 4, Q32–Q35 (2015).
    [Crossref]
  43. A. Sebastian, M. Le Gallo, and D. Krebs, “Crystal growth within a phase change memory cell,” Nat. Commun. 5, 4314 (2014).
    [Crossref]

2018 (2)

M. Hu, C. E. Graves, C. Li, Y. Li, N. Ge, E. Montgomery, N. Davila, H. Jiang, R. S. Williams, J. J. Yang, Q. Xia, and J. P. Strachan, “Memristor-based analog computation and neural network classification with a dot product engine,” Adv. Mater. 30, 1–10 (2018).
[Crossref]

J. Liu, H. Yang, Z. Ma, K. Chen, X. Zhang, X. Huang, and S. Oda, “Characteristics of multilevel storage and switching dynamics in resistive switching cell of Al2O3/HfO2/Al2O3 sandwich structure,” J. Phys. D 51, 025102 (2018).
[Crossref]

2017 (5)

F. Rao, K. Ding, Y. Zhou, Y. Zheng, M. Xia, S. Lv, Z. Song, S. Feng, I. Ronneberger, R. Mazzarello, W. Zhang, and E. Ma, “Reducing the stochasticity of crystal nucleation to enable subnanosecond memory writing,” Science 358, 1423–1427 (2017).
[Crossref]

J. Feldmann, M. Stegmaier, N. Gruhler, C. Riós, H. Bhaskaran, C. D. Wright, and W. H. P. Pernice, “Calculating with light using a chip-scale all-optical abacus,” Nat. Commun. 8, 1–8 (2017).
[Crossref]

M. Stegmaier, C. Ríos, H. Bhaskaran, C. D. Wright, and W. H. P. Pernice, “Nonvolatile all-optical 1 × 2 switch for chipscale photonic networks,” Adv. Opt. Mater. 5, 1600346 (2017).
[Crossref]

A. Sebastian, T. Tuma, N. Papandreou, M. Le Gallo, L. Kull, T. Parnell, and E. Eleftheriou, “Temporal correlation detection using computational phase-change memory,” Nat. Commun. 8, 1115 (2017).
[Crossref]

Z. Cheng, C. Ríos, W. H. P. Pernice, C. D. Wright, and H. Bhaskaran, “On-chip photonic synapse,” Sci. Adv. 3, e1700160 (2017).
[Crossref]

2016 (2)

M. Stegmaier, C. Rĺos, H. Bhaskaran, and W. H. P. Pernice, “Thermo-optical effect in phase-change nanophotonics,” ACS Photon. 3, 828–835 (2016).
[Crossref]

W. Kim, S. Menzel, D. J. Wouters, R. Waser, and V. Rana, “3-bit multilevel switching by deep reset phenomenon in Pt/W/TaOX/Pt-ReRAM devices,” IEEE Electron Device Lett. 37, 564–567 (2016).
[Crossref]

2015 (5)

L. Waldecker, T. A. Miller, M. Rudé, R. Bertoni, J. Osmond, V. Pruneri, R. E. Simpson, R. Ernstorfer, and S. Wall, “Time-domain separation of optical properties from structural transitions in resonantly bonded materials,” Nat. Mater. 14, 991–995 (2015).
[Crossref]

Y. Wang, D. Cai, Y. Chen, Y. Wang, H. Wei, R. Huo, X. Chen, and Z. Song, “Optimizing set performance for phase change memory with dual pulses set method,” ECS Solid State Lett. 4, Q32–Q35 (2015).
[Crossref]

C. Rios, M. Stegmaier, P. Hosseini, D. Wang, T. Scherer, C. D. Wright, H. Bhaskaran, and W. H. P. Pernice, “Integrated all-photonic non-volatile multi-level memory,” Nat. Photonics 9, 725–732 (2015).
[Crossref]

W. W. Koelmans, A. Sebastian, V. P. Jonnalagadda, D. Krebs, L. Dellmann, and E. Eleftheriou, “Projected phase-change memory devices,” Nat. Commun. 6, 8181 (2015).
[Crossref]

J. Y. Raty, W. Zhang, J. Luckas, C. Chen, R. Mazzarello, C. Bichara, and M. Wuttig, “Aging mechanisms in amorphous phase-change materials,” Nat. Commun. 6, 7467 (2015).
[Crossref]

2014 (3)

A. Sebastian, M. Le Gallo, and D. Krebs, “Crystal growth within a phase change memory cell,” Nat. Commun. 5, 4314 (2014).
[Crossref]

M.-F. Chang, C.-C. Kuo, S.-S. Sheu, C.-J. Lin, Y.-C. King, F. T. Chen, T.-K. Ku, M.-J. Tsai, J.-J. Wu, and Y.-D. Chih, “Area-efficient embedded resistive ram (ReRAM) macros using logic-process vertical-parasitic-BJT (VPBJT) switches and read-disturb-free temperature-aware current-mode read scheme,” IEEE J. Solid-State Circuits 49, 908–916 (2014).
[Crossref]

C. Rios, P. Hosseini, C. D. Wright, H. Bhaskaran, and W. H. P. Pernice, “On-chip photonic memory elements employing phase-change materials,” Adv. Mater. 26, 1372–1377 (2014).
[Crossref]

2013 (1)

M. Rudé, J. Pello, R. E. Simpson, J. Osmond, and G. Roelkens, “Optical switching at 1.55 μm in silicon racetrack resonators using phase change materials,” Appl. Phys. Lett. 103, 141119 (2013).
[Crossref]

2012 (2)

Y. Liu, M. M. Aziz, A. Shalini, C. D. Wright, and R. J. Hicken, “Crystallization of Ge2Sb2Te5 films by amplified femtosecond optical pulses,” J. Appl. Phys. 112, 123526 (2012).
[Crossref]

K. Zhang, S. Li, G. Liang, H. Huang, Y. Wang, T. Lai, and Y. Wu, “Different crystallization processes of as-deposited amorphous Ge2Sb2Te5 films on nano- and picosecond single laser pulse irradiation,” Phys. B 407, 2447–2450 (2012).
[Crossref]

2011 (2)

C. D. Wright, Y. Liu, K. I. Kohary, M. M. Aziz, and R. J. Hicken, “Arithmetic and biologically-inspired computing using phase-change materials,” Adv. Mater. 23, 3408–3413 (2011).
[Crossref]

M. Asghari and A. V. Krishnamoorthy, “Silicon photonics: energy-efficient communication,” Nat. Photonics 5, 268–270 (2011).
[Crossref]

2010 (2)

M. Paniccia, “Integrating silicon photonics,” Nat. Photonics 4, 498–499 (2010).
[Crossref]

H. J. Caulfield and S. Dolev, “Why future supercomputing requires optics,” Nat. Photonics 4, 261–263 (2010).
[Crossref]

2009 (3)

F. Bedeschi, R. Fackenthal, C. Resta, E. M. Donze, M. Jagasivamani, E. C. Buda, F. Pellizzer, D. W. Chow, A. Cabrini, G. M. A. Calvi, R. Faravelli, A. Fantini, G. Torelli, D. Mills, R. Gastaldi, and G. Casagrande, “A bipolar-selected phase change memory featuring multi-level cell storage,” IEEE J. Solid-State Circuits 44, 217–227 (2009).
[Crossref]

M. K. Qureshi, V. Srinivasan, and J. A. Rivers, “Scalable high performance main memory system using phase-change memory technology,” ACM SIGARCH Comput. Archit. News 37(3), 24–33 (2009).
[Crossref]

B. C. Lee, E. Ipek, O. Mutlu, and D. Burger, “Architecting phase change memory as a scalable dram alternative,” ACM SIGARCH Comput. Archit. News 37(3), 2–13 (2009).
[Crossref]

2007 (3)

D. Ielmini, A. L. Lacaita, and D. Mantegazza, “Recovery and drift dynamics of resistance and threshold voltages in phase-change memories,” IEEE Trans. Electron Devices 54, 308–315 (2007).
[Crossref]

M. Wuttig and N. Yamada, “Phase-change materials for rewriteable data storage,” Nat. Mater. 6, 824–832 (2007).

I. V. Karpov, M. Mitra, D. Kau, G. Spadini, Y. A. Kryukov, and V. G. Karpov, “Fundamental drift of parameters in chalcogenide phase change memory,” J. Appl. Phys. 102, 124503 (2007).
[Crossref]

2004 (2)

A. V. Kolobov, P. Fons, A. I. Frenkel, A. L. Ankudinov, J. Tominaga, and T. Uruga, “Understanding the phase-change mechanism of rewritable optical media,” Nat. Mater. 3, 703–708 (2004).
[Crossref]

Y. Arimoto and H. Ishiwara, “Current status of ferroelectric random-access memory,” MRS Bull. 29(11), 823–828 (2004).
[Crossref]

2003 (1)

S. Tehrani, J. M. Slaughter, M. DeHerrera, B. N. Engel, N. D. Rizzo, J. Salter, M. Durlam, R. W. Dave, J. Janesky, B. Butcher, K. Smith, and G. Grynkewich, “Magnetoresistive random access memory using magnetic tunnel junctions,” Proc. IEEE 91, 703–714 (2003).
[Crossref]

2002 (1)

N. Nishimura, T. Hirai, A. Koganei, T. Ikeda, K. Okano, Y. Sekiguchi, and Y. Osada, “Magnetic tunnel junction device with perpendicular magnetization films for high-density magnetic random access memory,” J. Appl. Phys. 91, 5246–5249 (2002).
[Crossref]

1999 (1)

S. S. P. Parkin, K. P. Roche, M. G. Samant, P. M. Rice, R. B. Beyers, R. E. Scheuerlein, E. J. O’sullivan, S. L. Brown, J. Bucchigano, D. W. Abraham, Y. Lu, M. Rooks, P. L. Trouilloud, R. A. Wanner, and W. J. Gallagher, “Exchange-biased magnetic tunnel junctions and application to nonvolatile magnetic random access memory (invited),” J. Appl. Phys. 85, 5828–5833 (1999).
[Crossref]

1991 (1)

N. Yamada, E. Ohno, K. Nishiuchi, N. Akahira, and M. Takao, “Rapid‐phase transitions of GeTe‐Sb2Te3 pseudobinary amorphous thin films for an optical disk memory,” J. Appl. Phys. 69, 2849–2856 (1991).
[Crossref]

1987 (1)

R. Soref and B. Bennett, “Electrooptical effects in silicon,” IEEE J. Quantum Electron. 23, 123–129 (1987).
[Crossref]

Abraham, D. W.

S. S. P. Parkin, K. P. Roche, M. G. Samant, P. M. Rice, R. B. Beyers, R. E. Scheuerlein, E. J. O’sullivan, S. L. Brown, J. Bucchigano, D. W. Abraham, Y. Lu, M. Rooks, P. L. Trouilloud, R. A. Wanner, and W. J. Gallagher, “Exchange-biased magnetic tunnel junctions and application to nonvolatile magnetic random access memory (invited),” J. Appl. Phys. 85, 5828–5833 (1999).
[Crossref]

Akahira, N.

N. Yamada, E. Ohno, K. Nishiuchi, N. Akahira, and M. Takao, “Rapid‐phase transitions of GeTe‐Sb2Te3 pseudobinary amorphous thin films for an optical disk memory,” J. Appl. Phys. 69, 2849–2856 (1991).
[Crossref]

Ankudinov, A. L.

A. V. Kolobov, P. Fons, A. I. Frenkel, A. L. Ankudinov, J. Tominaga, and T. Uruga, “Understanding the phase-change mechanism of rewritable optical media,” Nat. Mater. 3, 703–708 (2004).
[Crossref]

Arimoto, Y.

Y. Arimoto and H. Ishiwara, “Current status of ferroelectric random-access memory,” MRS Bull. 29(11), 823–828 (2004).
[Crossref]

Asghari, M.

M. Asghari and A. V. Krishnamoorthy, “Silicon photonics: energy-efficient communication,” Nat. Photonics 5, 268–270 (2011).
[Crossref]

Aziz, M. M.

Y. Liu, M. M. Aziz, A. Shalini, C. D. Wright, and R. J. Hicken, “Crystallization of Ge2Sb2Te5 films by amplified femtosecond optical pulses,” J. Appl. Phys. 112, 123526 (2012).
[Crossref]

C. D. Wright, Y. Liu, K. I. Kohary, M. M. Aziz, and R. J. Hicken, “Arithmetic and biologically-inspired computing using phase-change materials,” Adv. Mater. 23, 3408–3413 (2011).
[Crossref]

Bedeschi, F.

F. Bedeschi, R. Fackenthal, C. Resta, E. M. Donze, M. Jagasivamani, E. C. Buda, F. Pellizzer, D. W. Chow, A. Cabrini, G. M. A. Calvi, R. Faravelli, A. Fantini, G. Torelli, D. Mills, R. Gastaldi, and G. Casagrande, “A bipolar-selected phase change memory featuring multi-level cell storage,” IEEE J. Solid-State Circuits 44, 217–227 (2009).
[Crossref]

Bennett, B.

R. Soref and B. Bennett, “Electrooptical effects in silicon,” IEEE J. Quantum Electron. 23, 123–129 (1987).
[Crossref]

Bertoni, R.

L. Waldecker, T. A. Miller, M. Rudé, R. Bertoni, J. Osmond, V. Pruneri, R. E. Simpson, R. Ernstorfer, and S. Wall, “Time-domain separation of optical properties from structural transitions in resonantly bonded materials,” Nat. Mater. 14, 991–995 (2015).
[Crossref]

Beyers, R. B.

S. S. P. Parkin, K. P. Roche, M. G. Samant, P. M. Rice, R. B. Beyers, R. E. Scheuerlein, E. J. O’sullivan, S. L. Brown, J. Bucchigano, D. W. Abraham, Y. Lu, M. Rooks, P. L. Trouilloud, R. A. Wanner, and W. J. Gallagher, “Exchange-biased magnetic tunnel junctions and application to nonvolatile magnetic random access memory (invited),” J. Appl. Phys. 85, 5828–5833 (1999).
[Crossref]

Bhaskaran, H.

Z. Cheng, C. Ríos, W. H. P. Pernice, C. D. Wright, and H. Bhaskaran, “On-chip photonic synapse,” Sci. Adv. 3, e1700160 (2017).
[Crossref]

M. Stegmaier, C. Ríos, H. Bhaskaran, C. D. Wright, and W. H. P. Pernice, “Nonvolatile all-optical 1 × 2 switch for chipscale photonic networks,” Adv. Opt. Mater. 5, 1600346 (2017).
[Crossref]

J. Feldmann, M. Stegmaier, N. Gruhler, C. Riós, H. Bhaskaran, C. D. Wright, and W. H. P. Pernice, “Calculating with light using a chip-scale all-optical abacus,” Nat. Commun. 8, 1–8 (2017).
[Crossref]

M. Stegmaier, C. Rĺos, H. Bhaskaran, and W. H. P. Pernice, “Thermo-optical effect in phase-change nanophotonics,” ACS Photon. 3, 828–835 (2016).
[Crossref]

C. Rios, M. Stegmaier, P. Hosseini, D. Wang, T. Scherer, C. D. Wright, H. Bhaskaran, and W. H. P. Pernice, “Integrated all-photonic non-volatile multi-level memory,” Nat. Photonics 9, 725–732 (2015).
[Crossref]

C. Rios, P. Hosseini, C. D. Wright, H. Bhaskaran, and W. H. P. Pernice, “On-chip photonic memory elements employing phase-change materials,” Adv. Mater. 26, 1372–1377 (2014).
[Crossref]

C. Ríos, N. Youngblood, Z. Cheng, M. Le Gallo, W. H. P. Pernice, C. D. Wright, A. Sebastian, and H. Bhaskaran, “In-memory computing on a photonic platform,” arXiv:1801.06228 [cs.ET] (2018).

Bichara, C.

J. Y. Raty, W. Zhang, J. Luckas, C. Chen, R. Mazzarello, C. Bichara, and M. Wuttig, “Aging mechanisms in amorphous phase-change materials,” Nat. Commun. 6, 7467 (2015).
[Crossref]

Braga, S.

A. Cabrini, S. Braga, A. Manetto, and G. Torelli, “Voltage-driven multilevel programming in phase change memories,” in 2009 IEEE International Workshop on Memory Technology, Design, and Testing (IEEE, 2009), pp. 3–6.

Breitwisch, M.

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S. S. P. Parkin, K. P. Roche, M. G. Samant, P. M. Rice, R. B. Beyers, R. E. Scheuerlein, E. J. O’sullivan, S. L. Brown, J. Bucchigano, D. W. Abraham, Y. Lu, M. Rooks, P. L. Trouilloud, R. A. Wanner, and W. J. Gallagher, “Exchange-biased magnetic tunnel junctions and application to nonvolatile magnetic random access memory (invited),” J. Appl. Phys. 85, 5828–5833 (1999).
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N. Papandreou, H. Pozidis, T. Mittelholzer, G. F. Close, M. Breitwisch, C. Lam, and E. Eleftheriou, “Drift-tolerant multilevel phase-change memory,” in 2011 3rd IEEE International Memory Workshop (IMW) (IEEE, 2011), pp. 1–4.

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L. Waldecker, T. A. Miller, M. Rudé, R. Bertoni, J. Osmond, V. Pruneri, R. E. Simpson, R. Ernstorfer, and S. Wall, “Time-domain separation of optical properties from structural transitions in resonantly bonded materials,” Nat. Mater. 14, 991–995 (2015).
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W. Kim, S. Menzel, D. J. Wouters, R. Waser, and V. Rana, “3-bit multilevel switching by deep reset phenomenon in Pt/W/TaOX/Pt-ReRAM devices,” IEEE Electron Device Lett. 37, 564–567 (2016).
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J. Y. Raty, W. Zhang, J. Luckas, C. Chen, R. Mazzarello, C. Bichara, and M. Wuttig, “Aging mechanisms in amorphous phase-change materials,” Nat. Commun. 6, 7467 (2015).
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S. S. P. Parkin, K. P. Roche, M. G. Samant, P. M. Rice, R. B. Beyers, R. E. Scheuerlein, E. J. O’sullivan, S. L. Brown, J. Bucchigano, D. W. Abraham, Y. Lu, M. Rooks, P. L. Trouilloud, R. A. Wanner, and W. J. Gallagher, “Exchange-biased magnetic tunnel junctions and application to nonvolatile magnetic random access memory (invited),” J. Appl. Phys. 85, 5828–5833 (1999).
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C. Rios, P. Hosseini, C. D. Wright, H. Bhaskaran, and W. H. P. Pernice, “On-chip photonic memory elements employing phase-change materials,” Adv. Mater. 26, 1372–1377 (2014).
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J. Feldmann, M. Stegmaier, N. Gruhler, C. Riós, H. Bhaskaran, C. D. Wright, and W. H. P. Pernice, “Calculating with light using a chip-scale all-optical abacus,” Nat. Commun. 8, 1–8 (2017).
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M. Stegmaier, C. Ríos, H. Bhaskaran, C. D. Wright, and W. H. P. Pernice, “Nonvolatile all-optical 1 × 2 switch for chipscale photonic networks,” Adv. Opt. Mater. 5, 1600346 (2017).
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Z. Cheng, C. Ríos, W. H. P. Pernice, C. D. Wright, and H. Bhaskaran, “On-chip photonic synapse,” Sci. Adv. 3, e1700160 (2017).
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C. Ríos, N. Youngblood, Z. Cheng, M. Le Gallo, W. H. P. Pernice, C. D. Wright, A. Sebastian, and H. Bhaskaran, “In-memory computing on a photonic platform,” arXiv:1801.06228 [cs.ET] (2018).

Rivers, J. A.

M. K. Qureshi, V. Srinivasan, and J. A. Rivers, “Scalable high performance main memory system using phase-change memory technology,” ACM SIGARCH Comput. Archit. News 37(3), 24–33 (2009).
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M. Stegmaier, C. Rĺos, H. Bhaskaran, and W. H. P. Pernice, “Thermo-optical effect in phase-change nanophotonics,” ACS Photon. 3, 828–835 (2016).
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S. S. P. Parkin, K. P. Roche, M. G. Samant, P. M. Rice, R. B. Beyers, R. E. Scheuerlein, E. J. O’sullivan, S. L. Brown, J. Bucchigano, D. W. Abraham, Y. Lu, M. Rooks, P. L. Trouilloud, R. A. Wanner, and W. J. Gallagher, “Exchange-biased magnetic tunnel junctions and application to nonvolatile magnetic random access memory (invited),” J. Appl. Phys. 85, 5828–5833 (1999).
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Roelkens, G.

M. Rudé, J. Pello, R. E. Simpson, J. Osmond, and G. Roelkens, “Optical switching at 1.55 μm in silicon racetrack resonators using phase change materials,” Appl. Phys. Lett. 103, 141119 (2013).
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Ronneberger, I.

F. Rao, K. Ding, Y. Zhou, Y. Zheng, M. Xia, S. Lv, Z. Song, S. Feng, I. Ronneberger, R. Mazzarello, W. Zhang, and E. Ma, “Reducing the stochasticity of crystal nucleation to enable subnanosecond memory writing,” Science 358, 1423–1427 (2017).
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Rooks, M.

S. S. P. Parkin, K. P. Roche, M. G. Samant, P. M. Rice, R. B. Beyers, R. E. Scheuerlein, E. J. O’sullivan, S. L. Brown, J. Bucchigano, D. W. Abraham, Y. Lu, M. Rooks, P. L. Trouilloud, R. A. Wanner, and W. J. Gallagher, “Exchange-biased magnetic tunnel junctions and application to nonvolatile magnetic random access memory (invited),” J. Appl. Phys. 85, 5828–5833 (1999).
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L. Waldecker, T. A. Miller, M. Rudé, R. Bertoni, J. Osmond, V. Pruneri, R. E. Simpson, R. Ernstorfer, and S. Wall, “Time-domain separation of optical properties from structural transitions in resonantly bonded materials,” Nat. Mater. 14, 991–995 (2015).
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M. Rudé, J. Pello, R. E. Simpson, J. Osmond, and G. Roelkens, “Optical switching at 1.55 μm in silicon racetrack resonators using phase change materials,” Appl. Phys. Lett. 103, 141119 (2013).
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S. S. P. Parkin, K. P. Roche, M. G. Samant, P. M. Rice, R. B. Beyers, R. E. Scheuerlein, E. J. O’sullivan, S. L. Brown, J. Bucchigano, D. W. Abraham, Y. Lu, M. Rooks, P. L. Trouilloud, R. A. Wanner, and W. J. Gallagher, “Exchange-biased magnetic tunnel junctions and application to nonvolatile magnetic random access memory (invited),” J. Appl. Phys. 85, 5828–5833 (1999).
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C. Rios, M. Stegmaier, P. Hosseini, D. Wang, T. Scherer, C. D. Wright, H. Bhaskaran, and W. H. P. Pernice, “Integrated all-photonic non-volatile multi-level memory,” Nat. Photonics 9, 725–732 (2015).
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N. Nishimura, T. Hirai, A. Koganei, T. Ikeda, K. Okano, Y. Sekiguchi, and Y. Osada, “Magnetic tunnel junction device with perpendicular magnetization films for high-density magnetic random access memory,” J. Appl. Phys. 91, 5246–5249 (2002).
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M.-F. Chang, C.-C. Kuo, S.-S. Sheu, C.-J. Lin, Y.-C. King, F. T. Chen, T.-K. Ku, M.-J. Tsai, J.-J. Wu, and Y.-D. Chih, “Area-efficient embedded resistive ram (ReRAM) macros using logic-process vertical-parasitic-BJT (VPBJT) switches and read-disturb-free temperature-aware current-mode read scheme,” IEEE J. Solid-State Circuits 49, 908–916 (2014).
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L. Waldecker, T. A. Miller, M. Rudé, R. Bertoni, J. Osmond, V. Pruneri, R. E. Simpson, R. Ernstorfer, and S. Wall, “Time-domain separation of optical properties from structural transitions in resonantly bonded materials,” Nat. Mater. 14, 991–995 (2015).
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M. Rudé, J. Pello, R. E. Simpson, J. Osmond, and G. Roelkens, “Optical switching at 1.55 μm in silicon racetrack resonators using phase change materials,” Appl. Phys. Lett. 103, 141119 (2013).
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Y. Wang, D. Cai, Y. Chen, Y. Wang, H. Wei, R. Huo, X. Chen, and Z. Song, “Optimizing set performance for phase change memory with dual pulses set method,” ECS Solid State Lett. 4, Q32–Q35 (2015).
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M. Stegmaier, C. Ríos, H. Bhaskaran, C. D. Wright, and W. H. P. Pernice, “Nonvolatile all-optical 1 × 2 switch for chipscale photonic networks,” Adv. Opt. Mater. 5, 1600346 (2017).
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M. Stegmaier, C. Rĺos, H. Bhaskaran, and W. H. P. Pernice, “Thermo-optical effect in phase-change nanophotonics,” ACS Photon. 3, 828–835 (2016).
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C. Rios, M. Stegmaier, P. Hosseini, D. Wang, T. Scherer, C. D. Wright, H. Bhaskaran, and W. H. P. Pernice, “Integrated all-photonic non-volatile multi-level memory,” Nat. Photonics 9, 725–732 (2015).
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S. S. P. Parkin, K. P. Roche, M. G. Samant, P. M. Rice, R. B. Beyers, R. E. Scheuerlein, E. J. O’sullivan, S. L. Brown, J. Bucchigano, D. W. Abraham, Y. Lu, M. Rooks, P. L. Trouilloud, R. A. Wanner, and W. J. Gallagher, “Exchange-biased magnetic tunnel junctions and application to nonvolatile magnetic random access memory (invited),” J. Appl. Phys. 85, 5828–5833 (1999).
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M.-F. Chang, C.-C. Kuo, S.-S. Sheu, C.-J. Lin, Y.-C. King, F. T. Chen, T.-K. Ku, M.-J. Tsai, J.-J. Wu, and Y.-D. Chih, “Area-efficient embedded resistive ram (ReRAM) macros using logic-process vertical-parasitic-BJT (VPBJT) switches and read-disturb-free temperature-aware current-mode read scheme,” IEEE J. Solid-State Circuits 49, 908–916 (2014).
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Tuma, T.

A. Sebastian, T. Tuma, N. Papandreou, M. Le Gallo, L. Kull, T. Parnell, and E. Eleftheriou, “Temporal correlation detection using computational phase-change memory,” Nat. Commun. 8, 1115 (2017).
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A. V. Kolobov, P. Fons, A. I. Frenkel, A. L. Ankudinov, J. Tominaga, and T. Uruga, “Understanding the phase-change mechanism of rewritable optical media,” Nat. Mater. 3, 703–708 (2004).
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L. Waldecker, T. A. Miller, M. Rudé, R. Bertoni, J. Osmond, V. Pruneri, R. E. Simpson, R. Ernstorfer, and S. Wall, “Time-domain separation of optical properties from structural transitions in resonantly bonded materials,” Nat. Mater. 14, 991–995 (2015).
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L. Waldecker, T. A. Miller, M. Rudé, R. Bertoni, J. Osmond, V. Pruneri, R. E. Simpson, R. Ernstorfer, and S. Wall, “Time-domain separation of optical properties from structural transitions in resonantly bonded materials,” Nat. Mater. 14, 991–995 (2015).
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C. Rios, M. Stegmaier, P. Hosseini, D. Wang, T. Scherer, C. D. Wright, H. Bhaskaran, and W. H. P. Pernice, “Integrated all-photonic non-volatile multi-level memory,” Nat. Photonics 9, 725–732 (2015).
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Wang, Y.

Y. Wang, D. Cai, Y. Chen, Y. Wang, H. Wei, R. Huo, X. Chen, and Z. Song, “Optimizing set performance for phase change memory with dual pulses set method,” ECS Solid State Lett. 4, Q32–Q35 (2015).
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Y. Wang, D. Cai, Y. Chen, Y. Wang, H. Wei, R. Huo, X. Chen, and Z. Song, “Optimizing set performance for phase change memory with dual pulses set method,” ECS Solid State Lett. 4, Q32–Q35 (2015).
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K. Zhang, S. Li, G. Liang, H. Huang, Y. Wang, T. Lai, and Y. Wu, “Different crystallization processes of as-deposited amorphous Ge2Sb2Te5 films on nano- and picosecond single laser pulse irradiation,” Phys. B 407, 2447–2450 (2012).
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Wanner, R. A.

S. S. P. Parkin, K. P. Roche, M. G. Samant, P. M. Rice, R. B. Beyers, R. E. Scheuerlein, E. J. O’sullivan, S. L. Brown, J. Bucchigano, D. W. Abraham, Y. Lu, M. Rooks, P. L. Trouilloud, R. A. Wanner, and W. J. Gallagher, “Exchange-biased magnetic tunnel junctions and application to nonvolatile magnetic random access memory (invited),” J. Appl. Phys. 85, 5828–5833 (1999).
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Waser, R.

W. Kim, S. Menzel, D. J. Wouters, R. Waser, and V. Rana, “3-bit multilevel switching by deep reset phenomenon in Pt/W/TaOX/Pt-ReRAM devices,” IEEE Electron Device Lett. 37, 564–567 (2016).
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Wei, H.

Y. Wang, D. Cai, Y. Chen, Y. Wang, H. Wei, R. Huo, X. Chen, and Z. Song, “Optimizing set performance for phase change memory with dual pulses set method,” ECS Solid State Lett. 4, Q32–Q35 (2015).
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Williams, R. S.

M. Hu, C. E. Graves, C. Li, Y. Li, N. Ge, E. Montgomery, N. Davila, H. Jiang, R. S. Williams, J. J. Yang, Q. Xia, and J. P. Strachan, “Memristor-based analog computation and neural network classification with a dot product engine,” Adv. Mater. 30, 1–10 (2018).
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W. Kim, S. Menzel, D. J. Wouters, R. Waser, and V. Rana, “3-bit multilevel switching by deep reset phenomenon in Pt/W/TaOX/Pt-ReRAM devices,” IEEE Electron Device Lett. 37, 564–567 (2016).
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Wright, C. D.

J. Feldmann, M. Stegmaier, N. Gruhler, C. Riós, H. Bhaskaran, C. D. Wright, and W. H. P. Pernice, “Calculating with light using a chip-scale all-optical abacus,” Nat. Commun. 8, 1–8 (2017).
[Crossref]

M. Stegmaier, C. Ríos, H. Bhaskaran, C. D. Wright, and W. H. P. Pernice, “Nonvolatile all-optical 1 × 2 switch for chipscale photonic networks,” Adv. Opt. Mater. 5, 1600346 (2017).
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Z. Cheng, C. Ríos, W. H. P. Pernice, C. D. Wright, and H. Bhaskaran, “On-chip photonic synapse,” Sci. Adv. 3, e1700160 (2017).
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C. Rios, M. Stegmaier, P. Hosseini, D. Wang, T. Scherer, C. D. Wright, H. Bhaskaran, and W. H. P. Pernice, “Integrated all-photonic non-volatile multi-level memory,” Nat. Photonics 9, 725–732 (2015).
[Crossref]

C. Rios, P. Hosseini, C. D. Wright, H. Bhaskaran, and W. H. P. Pernice, “On-chip photonic memory elements employing phase-change materials,” Adv. Mater. 26, 1372–1377 (2014).
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Y. Liu, M. M. Aziz, A. Shalini, C. D. Wright, and R. J. Hicken, “Crystallization of Ge2Sb2Te5 films by amplified femtosecond optical pulses,” J. Appl. Phys. 112, 123526 (2012).
[Crossref]

C. D. Wright, Y. Liu, K. I. Kohary, M. M. Aziz, and R. J. Hicken, “Arithmetic and biologically-inspired computing using phase-change materials,” Adv. Mater. 23, 3408–3413 (2011).
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C. Ríos, N. Youngblood, Z. Cheng, M. Le Gallo, W. H. P. Pernice, C. D. Wright, A. Sebastian, and H. Bhaskaran, “In-memory computing on a photonic platform,” arXiv:1801.06228 [cs.ET] (2018).

Wu, J.-J.

M.-F. Chang, C.-C. Kuo, S.-S. Sheu, C.-J. Lin, Y.-C. King, F. T. Chen, T.-K. Ku, M.-J. Tsai, J.-J. Wu, and Y.-D. Chih, “Area-efficient embedded resistive ram (ReRAM) macros using logic-process vertical-parasitic-BJT (VPBJT) switches and read-disturb-free temperature-aware current-mode read scheme,” IEEE J. Solid-State Circuits 49, 908–916 (2014).
[Crossref]

Wu, Y.

K. Zhang, S. Li, G. Liang, H. Huang, Y. Wang, T. Lai, and Y. Wu, “Different crystallization processes of as-deposited amorphous Ge2Sb2Te5 films on nano- and picosecond single laser pulse irradiation,” Phys. B 407, 2447–2450 (2012).
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Wuttig, M.

J. Y. Raty, W. Zhang, J. Luckas, C. Chen, R. Mazzarello, C. Bichara, and M. Wuttig, “Aging mechanisms in amorphous phase-change materials,” Nat. Commun. 6, 7467 (2015).
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M. Wuttig and N. Yamada, “Phase-change materials for rewriteable data storage,” Nat. Mater. 6, 824–832 (2007).

Xia, M.

F. Rao, K. Ding, Y. Zhou, Y. Zheng, M. Xia, S. Lv, Z. Song, S. Feng, I. Ronneberger, R. Mazzarello, W. Zhang, and E. Ma, “Reducing the stochasticity of crystal nucleation to enable subnanosecond memory writing,” Science 358, 1423–1427 (2017).
[Crossref]

Xia, Q.

M. Hu, C. E. Graves, C. Li, Y. Li, N. Ge, E. Montgomery, N. Davila, H. Jiang, R. S. Williams, J. J. Yang, Q. Xia, and J. P. Strachan, “Memristor-based analog computation and neural network classification with a dot product engine,” Adv. Mater. 30, 1–10 (2018).
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Yamada, N.

M. Wuttig and N. Yamada, “Phase-change materials for rewriteable data storage,” Nat. Mater. 6, 824–832 (2007).

N. Yamada, E. Ohno, K. Nishiuchi, N. Akahira, and M. Takao, “Rapid‐phase transitions of GeTe‐Sb2Te3 pseudobinary amorphous thin films for an optical disk memory,” J. Appl. Phys. 69, 2849–2856 (1991).
[Crossref]

Yang, H.

J. Liu, H. Yang, Z. Ma, K. Chen, X. Zhang, X. Huang, and S. Oda, “Characteristics of multilevel storage and switching dynamics in resistive switching cell of Al2O3/HfO2/Al2O3 sandwich structure,” J. Phys. D 51, 025102 (2018).
[Crossref]

Yang, J.

L. Jiang, B. Zhao, Y. Zhang, J. Yang, and B. R. Childers, “Improving write operations in MLC phase change memory,” in IEEE International Symposium on High-Performance Comp Architecture (IEEE, 2012), pp. 1–10.

P. Zhou, B. Zhao, J. Yang, Y. Zhang, P. Zhou, B. Zhao, J. Yang, and Y. Zhang, “A durable and energy efficient main memory using phase change memory technology,” in Proceedings of the 36th Annual International Symposium on Computer Architecture—ISCA ‘09 (ACM, 2009), Vol. 37, pp. 14–23.

P. Zhou, B. Zhao, J. Yang, Y. Zhang, P. Zhou, B. Zhao, J. Yang, and Y. Zhang, “A durable and energy efficient main memory using phase change memory technology,” in Proceedings of the 36th Annual International Symposium on Computer Architecture—ISCA ‘09 (ACM, 2009), Vol. 37, pp. 14–23.

Yang, J. J.

M. Hu, C. E. Graves, C. Li, Y. Li, N. Ge, E. Montgomery, N. Davila, H. Jiang, R. S. Williams, J. J. Yang, Q. Xia, and J. P. Strachan, “Memristor-based analog computation and neural network classification with a dot product engine,” Adv. Mater. 30, 1–10 (2018).
[Crossref]

Youngblood, N.

C. Ríos, N. Youngblood, Z. Cheng, M. Le Gallo, W. H. P. Pernice, C. D. Wright, A. Sebastian, and H. Bhaskaran, “In-memory computing on a photonic platform,” arXiv:1801.06228 [cs.ET] (2018).

Zhang, K.

K. Zhang, S. Li, G. Liang, H. Huang, Y. Wang, T. Lai, and Y. Wu, “Different crystallization processes of as-deposited amorphous Ge2Sb2Te5 films on nano- and picosecond single laser pulse irradiation,” Phys. B 407, 2447–2450 (2012).
[Crossref]

Zhang, W.

F. Rao, K. Ding, Y. Zhou, Y. Zheng, M. Xia, S. Lv, Z. Song, S. Feng, I. Ronneberger, R. Mazzarello, W. Zhang, and E. Ma, “Reducing the stochasticity of crystal nucleation to enable subnanosecond memory writing,” Science 358, 1423–1427 (2017).
[Crossref]

J. Y. Raty, W. Zhang, J. Luckas, C. Chen, R. Mazzarello, C. Bichara, and M. Wuttig, “Aging mechanisms in amorphous phase-change materials,” Nat. Commun. 6, 7467 (2015).
[Crossref]

Zhang, X.

J. Liu, H. Yang, Z. Ma, K. Chen, X. Zhang, X. Huang, and S. Oda, “Characteristics of multilevel storage and switching dynamics in resistive switching cell of Al2O3/HfO2/Al2O3 sandwich structure,” J. Phys. D 51, 025102 (2018).
[Crossref]

Zhang, Y.

P. Zhou, B. Zhao, J. Yang, Y. Zhang, P. Zhou, B. Zhao, J. Yang, and Y. Zhang, “A durable and energy efficient main memory using phase change memory technology,” in Proceedings of the 36th Annual International Symposium on Computer Architecture—ISCA ‘09 (ACM, 2009), Vol. 37, pp. 14–23.

P. Zhou, B. Zhao, J. Yang, Y. Zhang, P. Zhou, B. Zhao, J. Yang, and Y. Zhang, “A durable and energy efficient main memory using phase change memory technology,” in Proceedings of the 36th Annual International Symposium on Computer Architecture—ISCA ‘09 (ACM, 2009), Vol. 37, pp. 14–23.

L. Jiang, B. Zhao, Y. Zhang, J. Yang, and B. R. Childers, “Improving write operations in MLC phase change memory,” in IEEE International Symposium on High-Performance Comp Architecture (IEEE, 2012), pp. 1–10.

Zhao, B.

L. Jiang, B. Zhao, Y. Zhang, J. Yang, and B. R. Childers, “Improving write operations in MLC phase change memory,” in IEEE International Symposium on High-Performance Comp Architecture (IEEE, 2012), pp. 1–10.

P. Zhou, B. Zhao, J. Yang, Y. Zhang, P. Zhou, B. Zhao, J. Yang, and Y. Zhang, “A durable and energy efficient main memory using phase change memory technology,” in Proceedings of the 36th Annual International Symposium on Computer Architecture—ISCA ‘09 (ACM, 2009), Vol. 37, pp. 14–23.

P. Zhou, B. Zhao, J. Yang, Y. Zhang, P. Zhou, B. Zhao, J. Yang, and Y. Zhang, “A durable and energy efficient main memory using phase change memory technology,” in Proceedings of the 36th Annual International Symposium on Computer Architecture—ISCA ‘09 (ACM, 2009), Vol. 37, pp. 14–23.

Zheng, Y.

F. Rao, K. Ding, Y. Zhou, Y. Zheng, M. Xia, S. Lv, Z. Song, S. Feng, I. Ronneberger, R. Mazzarello, W. Zhang, and E. Ma, “Reducing the stochasticity of crystal nucleation to enable subnanosecond memory writing,” Science 358, 1423–1427 (2017).
[Crossref]

Zhou, P.

P. Zhou, B. Zhao, J. Yang, Y. Zhang, P. Zhou, B. Zhao, J. Yang, and Y. Zhang, “A durable and energy efficient main memory using phase change memory technology,” in Proceedings of the 36th Annual International Symposium on Computer Architecture—ISCA ‘09 (ACM, 2009), Vol. 37, pp. 14–23.

P. Zhou, B. Zhao, J. Yang, Y. Zhang, P. Zhou, B. Zhao, J. Yang, and Y. Zhang, “A durable and energy efficient main memory using phase change memory technology,” in Proceedings of the 36th Annual International Symposium on Computer Architecture—ISCA ‘09 (ACM, 2009), Vol. 37, pp. 14–23.

Zhou, Y.

F. Rao, K. Ding, Y. Zhou, Y. Zheng, M. Xia, S. Lv, Z. Song, S. Feng, I. Ronneberger, R. Mazzarello, W. Zhang, and E. Ma, “Reducing the stochasticity of crystal nucleation to enable subnanosecond memory writing,” Science 358, 1423–1427 (2017).
[Crossref]

ACM SIGARCH Comput. Archit. News (2)

M. K. Qureshi, V. Srinivasan, and J. A. Rivers, “Scalable high performance main memory system using phase-change memory technology,” ACM SIGARCH Comput. Archit. News 37(3), 24–33 (2009).
[Crossref]

B. C. Lee, E. Ipek, O. Mutlu, and D. Burger, “Architecting phase change memory as a scalable dram alternative,” ACM SIGARCH Comput. Archit. News 37(3), 2–13 (2009).
[Crossref]

ACS Photon. (1)

M. Stegmaier, C. Rĺos, H. Bhaskaran, and W. H. P. Pernice, “Thermo-optical effect in phase-change nanophotonics,” ACS Photon. 3, 828–835 (2016).
[Crossref]

Adv. Mater. (3)

C. Rios, P. Hosseini, C. D. Wright, H. Bhaskaran, and W. H. P. Pernice, “On-chip photonic memory elements employing phase-change materials,” Adv. Mater. 26, 1372–1377 (2014).
[Crossref]

M. Hu, C. E. Graves, C. Li, Y. Li, N. Ge, E. Montgomery, N. Davila, H. Jiang, R. S. Williams, J. J. Yang, Q. Xia, and J. P. Strachan, “Memristor-based analog computation and neural network classification with a dot product engine,” Adv. Mater. 30, 1–10 (2018).
[Crossref]

C. D. Wright, Y. Liu, K. I. Kohary, M. M. Aziz, and R. J. Hicken, “Arithmetic and biologically-inspired computing using phase-change materials,” Adv. Mater. 23, 3408–3413 (2011).
[Crossref]

Adv. Opt. Mater. (1)

M. Stegmaier, C. Ríos, H. Bhaskaran, C. D. Wright, and W. H. P. Pernice, “Nonvolatile all-optical 1 × 2 switch for chipscale photonic networks,” Adv. Opt. Mater. 5, 1600346 (2017).
[Crossref]

Appl. Phys. Lett. (1)

M. Rudé, J. Pello, R. E. Simpson, J. Osmond, and G. Roelkens, “Optical switching at 1.55 μm in silicon racetrack resonators using phase change materials,” Appl. Phys. Lett. 103, 141119 (2013).
[Crossref]

ECS Solid State Lett. (1)

Y. Wang, D. Cai, Y. Chen, Y. Wang, H. Wei, R. Huo, X. Chen, and Z. Song, “Optimizing set performance for phase change memory with dual pulses set method,” ECS Solid State Lett. 4, Q32–Q35 (2015).
[Crossref]

IEEE Electron Device Lett. (1)

W. Kim, S. Menzel, D. J. Wouters, R. Waser, and V. Rana, “3-bit multilevel switching by deep reset phenomenon in Pt/W/TaOX/Pt-ReRAM devices,” IEEE Electron Device Lett. 37, 564–567 (2016).
[Crossref]

IEEE J. Quantum Electron. (1)

R. Soref and B. Bennett, “Electrooptical effects in silicon,” IEEE J. Quantum Electron. 23, 123–129 (1987).
[Crossref]

IEEE J. Solid-State Circuits (2)

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Figures (4)

Fig. 1.
Fig. 1. Concept of the dual-pulse programming technique. (a) From left to right, optical image of our device with a GST photonic memory cell, magnified image of GST on top of the waveguide, and schematic cross section of the completed device. (b) Schematic of the optical pulse shapes used to amorphize and crystallize the integrated phase-change photonic memory cell. A rectangular programming pulse with increasing peak powers (red pillars) amorphizes an increasing fraction of GST while a fixed ERASE pulse returns the material back to a fully crystalline state. (c) Simulated transmission and crystalline fraction as a function of the programming pulse energy. The optical transmission through the waveguide (and the corresponding absorption in the GST) increases (decreases) as the crystalline fraction decreases. (d) Simulated temperature distribution in the GST memory cell after a 20 ns programming pulse. Area surpassing the melting temperature of GST (890 K [31]) is marked by the dark red region and is inversely related to the crystalline fraction plotted in (c).
Fig. 2.
Fig. 2. Measurements of multilevel operation using a dual-pulse programming technique. (a) Recorded transmission of one programming iteration with a monotonically increasing programming pulse amplitude and a fixed ERASE pulse. Thirty-four unique levels are resolved in this 4-μm-long device. (b) Average transmission and standard deviation for a series of 10 write cycles as a function of programming pulse energy as measured in the waveguide before the GST. (c) Histogram plots of the difference between the desired transmission level and the actual transmission level from (b) measured after a single programming or ERASE pulse. Red lines are Gaussian fits to the error distribution and quantify the accuracy we can achieve from a single programming/ERASE pulse. (d) Amorphization and recrystallization pulses for various delays between the two pulses. As the delay increases, the GST transmission saturates to a fixed value due to the thermo-optic effect. Pulse power (red) shown in the right-hand plots correspond to the measured pulse power in the waveguide before the GST.
Fig. 3.
Fig. 3. Measurement of the final transmission state of GST after various double-step programming pulses. (a) Illustration of experiment where the trailing end of the double-step programming pulse is varying in both amplitude and time. (b) The final transmission state of GST for increasing amplitude of the pulse’s trailing end. Once the relative amplitude surpasses 0.2, the crystallization temperature of GST is reached and recrystallization begins to occur much more rapidly. Inset: Histogram of the error distribution between the expected transmission level and the actual level reached. (c) The final transmission state of GST for double-step programming pulses with a trailing end of increasing duration. Increasing the duration allows the GST to reach the fully crystalline state. Inset: Histogram of the error distribution between the expected transmission level and the actual level reached.
Fig. 4.
Fig. 4. Single-pulse programming of the multilevel optical PCM memory cell. (a) Schematic of the method to achieve dual-pulse programming and recrystallization. An ERASE pulse is needed before programming each memory level. (b) Schematic of the method to achieve single-pulse programming. The initial 50 ns portion of the double-step pulse serves to remove memory of the previous state by bringing the PCM above its melting temperature before recrystallization. (c) Time-dependent trace of transmission when multiple double-step programming pulses of random durations are sent to the device. The device is able to switch to higher or lower transmission levels with no dependence on the previous state of the material. (d) Transmission levels and total deviation distribution and separate error bar distribution of different levels of random programming pulse durations.

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