Hybrid integration of plasmonics and Si photonics is a promising architecture for global microprocessor interconnects. To this end, practical plasmonic devices should provide not only athermal, broadband operation over a wavelength-scale footprint, but also support non-intrusive integration with low-loss Si waveguides as well as CMOS back-end-of-line processes. Here, we demonstrate a hybrid plasmonic photodetector with a single active junction fabricated via back-end deposited amorphous materials coupled to Si nanowires with only 1.5 dB loss. Utilizing internal photoemission, our detectors measured sensitivity of in a 620 nm by 5 μm footprint at 7 V bias. Moreover, responsivity up to 0.4 mA/W and dark current down to 0.2 nA were obtained. The high process tolerance is demonstrated between and up to 100°C. The results suggest the potential toward plasmonic–photonic optoelectronic integration on top of Si chips without costly process modifications.
© 2017 Optical Society of America
On-chip optical communications offer immense promise to enhance performance of emerging generations of microprocessors [1,2]. However, a realistic optoelectronic platform demands device miniaturization, athermal behavior, and broadband operation . Many of the current guided-wave photodetector designs, such as ones utilizing 2D materials  or resonant cavities [5,6], cannot fulfill these requirements simultaneously. Although plasmonic designs show promising performance, they exhibit significant loss, and photogeneration typically takes place in junctions implemented with crystalline materials inherently incompatible with CMOS back-end processing and thus dictates significant modifications to front-end manufacturing [7–12]. Here, we report the first experimental demonstration, to the best of our knowledge, of a wavelength-scale, non-resonant, high-sensitivity photodetector with a single active junction formed with amorphous materials. Employing internal photoemission (IPE) within a 5-μm-long hybrid plasmonic waveguide, we obtained minimum sensitivity, dark current, and static power of , 0.2 nA, and 1.2 nW at 7 V, respectively. The device is tested to be operational between 15°C and 100°C and . Moreover, with only 1.5 dB coupling loss to Si nanowires, our design demonstrates the potential for integrating amorphous-based plasmonic devices and low-loss dielectric waveguide interconnects to form a densely packed, low-loss optoelectronic platform.
The photodetector reported is based on asymmetric hybrid plasmonic waveguides (AHPWs), consisting of layers [Fig. 1(a)]. In this platform, the hybrid plasmonic waveguide (HPW) mode supported by the layers and the surface plasmon polariton (SPP) mode supported by the Si-Al layers are coupled to form supermodes. Specifically, the symmetric supermode, which corresponds to out-of-phase coupling of the evanescent fields at the metal layer, is utilized as the signal carrier in our design because of its highly tunable absorption characteristics [13–15]. The theory and operation principle of the AHPW are discussed in Supplement 1.
The loss characteristics of AHPW supermodes are highly sensitive to the symmetry of the evanescent fields that are superimposed across the common metal layer. This symmetry can be controlled by manipulating structural parameters such as core width [Fig. 1(b)]. Specifically, complete field symmetry is established for waveguide width of 200 nm and the waveguide loss is reduced to only 0.02 dB/μm, 1 order of magnitude lower than either that of the HPW and SPP waveguide (0.1 dB/μm and 0.45 dB/μm, respectively). Moreover, small momentum and field mismatch between the symmetric supermode of the AHPW and TM mode of a Si nanowire allow the 200 nm AHPW to be excited from an 800 nm Si nanowire via non-resonant butt-coupling with only 1.5 dB coupling loss [Fig. 1(c)].
As waveguide width increases, the absorption of the symmetric supermode increases exponentially due to combined effects of field symmetry breaking and modal evolution asymmetry (see Supplement 1). For , the absorption loss peaks at at a width of 620 nm. Thus, without modifying the vertical dimensions or materials, an AHPW can be engineered to serve either as a long-range propagating passive component that interfaces efficiently with silicon photonics or a highly absorptive active device, such as a photodetector. This is achieved with only a 10-nm-thin metal layer, thus heavily alleviating the loss of photocarrier energy due to scattering in the metal.
Figure 2(a) illustrates the schematic and biasing of an AHPW traveling-wave photodetector that has CMOS-compatible amorphous Si top layer. A 500-nm-long taper is utilized to link between the AHPW coupler and photodetector sections, which have widths of 200 nm and 620 nm, respectively. The photodetection is based on IPE (see Supplement 1 for details of the mechanism and model). The Si-Al interface is utilized to support both the SPP portion of the AHPW and to serve as the Schottky junction emitter for the IPE mechanism. With the addition of an Al collector on the opposite side of the Si layer, the junctions form a metal–semiconductor–metal (MSM) device in the vertical direction and consist of two back-to-back Schottky junctions separated by the Si thickness . Micrometer-sized collector contacts are deposited away from the AHPW core to minimize the junction area and hence dark currents, as well as to reduce optical mode scattering.
The energy band diagrams of the Si–Al junction at unbiased thermal equilibrium state and at flatband voltage are shown in Figs. 3(a) and 3(b), respectively. The Schottky barrier heights for Al–Si junctions are assumed to be and . As the SPP mode propagates, energy is dissipated and absorbed into the lossy Al layer along the waveguide. The absorbed photons with energy higher than the barrier height have a probability to cross into the Si layer. In the unbiased case, no appreciable current flow can be generated due to the built-in potential of the collector junction impeding photogenerated carriers to cross to the opposite terminal. As external bias is increased to the flatband condition, the depletion width extends throughout the thickness of the Si layer, allowing photocurrent carriers to be swept rapidly from the emitter to the collector. Applying further bias reduces the effective barrier height due to the image force lowering effect, which increases both detector responsivity and dark currents.
The responsivity, dark current, and minimum sensitivity of a 10-μm-long AHPW photodetector with 90% absorption are plotted in Figs. 3(c) and 3(d). The collector contact junction areas are designed to be and, in order to utilize the lower n-barrier for carrier emission, the 10-nm-thick Al emitter is biased at a negative potential with respect to the collector on top. With an absorption of for the symmetric supermode, responsivity of can be achieved under 2 V. The dark current density is of the order of , and the minimum theoretical sensitivity of the detector can reach .
The fabricated AHPW photodetector is shown in Fig. 2(b). The bottom Si layer is crystalline since standard Si-on-insulator wafers were utilized for proof-of-concept. However, the active junction is entirely implemented via sputtered Al and Si. Using the cut-back method, the coupling efficiency from an input Si nanowire into the AHPW photodetector is measured to be 70%. The measured responsivities and dark currents at are plotted in Figs. 4(a) and 4(b) for detector lengths of 5–20 μm. While the metrics obtained from simulations assumed a 10-μm-long device for 90% absorption, in our experiments it was found that a 5 μm photodetector can report responsivity as high as 5.0 mA/W in the tested voltage bias ranging from 6 to 15 V at room temperature. The data for below 5 V are not shown since the measured current falls below the detectable level of the instruments. However, the lower responsivity compared to theory can be attributed to the recombination of photocarriers in dangling bonds of the Si, which was not accounted for in our model, and insufficient doping of the Si, as evident in the high voltage required to observe photodetection at biases above 6 V and lack of a sharp flatband response. However, when evaluating the photodetector using minimum sensitivity, a metric that accounts for the trade-off between detector responsivity and dark current and measures the minimum optical power required for detection, we achieve at room temperature due to extremely low dark currents down to 0.2 nA. The quiescent power consumption of the device is therefore 1.2 nW. Similar responsivities are obtained for longer detector lengths, but dark currents become significantly higher due to thermionic emission from increased active junction areas. This suggests that the plasmonic mode is highly absorptive and coupled light is absorbed within the first few micrometers. Note that dark current for longer junctions are similar, attributed to non-uniform formation of Schottky junctions, which are known to be difficult to control, as well as contact pad resistance changes due to probing damage.
The photodetector performance at elevated temperature is displayed in Fig. 4(c). The devices have been tested between 15°C and 100°C, the maximum range of our instruments. While an increase in dark currents typical of thermionic emission is observed, the devices also display an increase in photocurrents as a result of the Schottky barrier height reduction in Si as temperature increases . It is observed that dark currents increase by 50% as temperatures are increased to 100°C, while photocurrents can increase by factors of 2 to 3 at low bias operation. Thus, the effects of barrier height reduction are more dominant for photocarrier generation in the 1550 nm wavelength regime than for dark currents. Overall, the devices are fully functional up to 100°C, and the sensitivity can be improved to as temperature increases.
The optical bandwidth of the device is characterized from 1.1 to 1.6 μm [Fig. 4(d)]. The photocurrents are normalized to the optical power coupling efficiency extracted from reference passive AHPW transmission measurements. It is observed that, while the optical performance of the AHPW is optimized for maximal coupling and operation at , normalized responsivity can increase as wavelength decreases. As the wavelength shortens to 1.35 μm, the decreased optical power coupled into the device is compensated by higher internal quantum efficiency as photon energies increase over the Schottky barrier height and still operates mainly on IPE. As the wavelength is further decreased, it is suspected that the main detection mechanism becomes direct absorption from the band-tail of Si, which increases up to 2 orders of magnitude higher than what is achieved through IPE. Finally, in the regime below 1.2 μm, the input Si nanowires become absorptive and the optical power transmission falls below the detectable levels of the characterization setup. Based on theoretical simulations, the photodetector is expected to operate up to 1.8 μm, at which the optical mode becomes leaky (see Supplement 1).
The frequency response, shown in Fig. 4(e), was measured in the frequency range between 100 MHz and 2.5 GHz, dictated by the available instrumentation. On the same plot, the RC bandwidth was plotted using the values measured for these devices. The capacitance was found to be in the range of 8–10 fF, depending on device length (see Supplement 1). The RC bandwidth is calculated to be 400 GHz for a load. However, speed of the current generation is expected to be limited by carrier transit time governed by the saturation drift velocity of Si due to poor electrical properties . Future generations will alleviate this limitation through controlled doping profiles as well as reducing the Si layer thickness to reduce transit time.
A detailed comparison between existing IPE-based plasmonic photodetector designs can be found in Supplement 1. To the best of our knowledge, this work is the first demonstration of a hybrid plasmonic detector architecture. Moreover, these specifications are achieved via amorphous materials for the first time. Despite the use of Al instead of more photogeneration efficient, but non-CMOS-compatible layers such as Au, our device boasts minimum sensitivity. In comparison, the closest comparable plasmonic architecture based on metal strip waveguides on crystalline Si measures only with devices that are 8 times longer in length [9,10]. In plasmonic photodetectors employing metal silicides on crystalline silicon, similar sensitivity values are achieved () on devices with lengths of 20 μm, but formation of silicide junctions requires high-temperature fabrication techniques incompatible with back-end processing .
In conclusion, we reported what we believe to be the first experimental demonstration of an integrated, hybrid plasmonic photodetector with an active region based on deposited amorphous materials. The use of non-CMOS-compatible Au or crystalline Si can further improve the device responsivity ; however, our use of Al and amorphous Si still provides minimum sensitivity, the best reported up to date, to our knowledge. This is enabled by the nanoscale mode area, thus enhancing light–matter interaction in the AHPW, allowing for efficient photogeneration and reduction of device length, dark currents, and power consumption. The photodetectors were shown to be operational between 1.2 and 1.8 μm and functional at temperatures tested up to 100°C. While our prototype devices were built on a Si-on-insulator platform, the purpose was to demonstrate the highly efficient power coupling from Si nanowires and fairly compare against designs in the literature that are based on similar integration schemes with Si photonics. The photogeneration process is based on IPE and takes place entirely in the active junction formed from the metal and an amorphous material, while still showing much improved performance compared to previous designs based on crystalline Si. The use of amorphous materials and the efficient integration of our hybrid plasmonic architecture to Si photonics opens up new frontiers in integrated optoelectronics, as they allow for non-intrusive CMOS back-end integration with low-loss dielectric waveguide interconnects on microprocessors away from noisy transistor levels and expensive modifications of front-end-of-line CMOS manufacturing.
Natural Sciences and Engineering Research Council of Canada (NSERC).
See Supplement 1 for supporting content.
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