Abstract

The maturity of integrated photonics enables many applications including high-performance computing. Digital photonic computing always considers resonator-based modulators as the key active components due to their compactness as compared to broad-spectrum Mach-Zehnder interferometers (MZIs). In this paper, we investigate the dual-nanobeam (NB) based MZI 2 × 2 switches with much smaller footprint for realizing electro-optical logic circuits. New logic gates and scalable circuits assisted by multiplexing techniques are proposed. Results show that the NB MZI is another promising candidate for electronic-photonic digital computing.

© 2021 Optical Society of America under the terms of the OSA Open Access Publishing Agreement

1. Introduction

Integrated photonics has proven its strong promise in various fields such as inter- and intra- data center interconnects [13], biomedical detection [4,5], sensors [6], and high-performance computing (HPC) [7]. Electronic-photonic digital computing (EPDC) is one of the HPC approaches that is believed to have the potential to outperform conventional microprocessors in both speed and power consumption [811]. The CMOS-foundry-compatible silicon-photonics (SiPh) platform discussed here for logic implementation at the 1550-nm wavelength is an excellent approach to EPDC realization. The development of new ultrafast, ultralow-power electro-optical (EO) SiPh integrated-photonic building blocks will clearly improve the entire performance of the EPDC circuits. Among the high-speed active elements, microrings and microdisks are today the ones widely adopted in EPDC due to their compactness as compared to broad-spectrum Mach-Zehnder interferometers (MZIs) [1215]. However, we estimate that the MZI footprint, for the case of resonant devices, can today be reduced to a 10 µm x 70 µm area by using multimode interferometers (MMIs) or e-skid structures [16] for the two 3-dB directional couplers within the MZI and by using the compact MZI “arms” proposed here.

In this paper, we discuss a new type of electro-optical logic wherein each active component is a dual-nanobeam Mach-Zehnder interferometer (NB MZI) – a wavelength-dedicated 2 × 2 EO switch having cross and bar states. To realize the EO switch, each arm of the interferometer consists of a single-mode silicon rib waveguide containing a one-dimensional photonic crystal lattice that exhibits resonant spectral transmission. In the cavity region of each lattice, there is an EO means for changing the resonance wavelength. As shown below, this MZI offers logic attributes different from those of micro-rings/disks. Because the NB MZI provides high speed, low insertion loss, and very low power consumption [17], it is another promising candidate for computing logic gates in EPDC. In the sections of this paper below, new logic gates and new logic circuits are proposed and analyzed.

2. NB MZI device with EO and TO input controls

Figure 1 illustrates the 2 × 2 logic building-block proposed here. Within this MZI, each of two straight arms is a silicon strip waveguide having a localized rib-waveguide region. There is SiO2 passivation around the rib/strip and an SiO2 supporting layer beneath all waveguides. Each arm contains a resonator created by a 1D photonic crystal (PhC) lattice. There is considerable “freedom of design” for the lattice and several approaches are valuable. Some use point-defect cavities, while others have no defects and employ a continuous lattice with hole diameters tapered in and out along the waveguide axis. For the lattices in this paper, we specify a sequence of air holes etched-through-silicon that are subsequently filled with SiO2. The specific layout of holes, the lattice engineering, influences the optical-frequency versus wave-vector diagram of the lattice. Here, we constrained the lattice design as follows. First, the 1D-PhC lattice is chosen to provide only one optical mode within the stop band of the PhC, rather than two or three modes. Second, the lattice design is optimized to provide high transmission T at the peak of the resonance profile together with an unloaded Q in the 2,000 to 10,000 range. Third, we chose to use an inline lattice rather than attempting side-coupling in which a “blank” silicon strip waveguide couples evanescently to a silicon NB waveguide “segment.” The inline approach is much simpler and arguably more effective [18]. Fourth, we selected the L1 single point-defect resonator on the assumption that the particle swarm optimization procedure of Vasco [19] would provide a compact, high performance, single-mode cavity result.

 figure: Fig. 1.

Fig. 1. Top view of proposed EO NB MZI 2 × 2 logic element, many of which form an integrated-photonic logic circuit in the SOI platform.

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The desired voltage-controlled shift of the resonance spectral profile along the wavelength axis is induced by a voltage-controlled perturbation of the cavity’s effective refractive index Δn (along with a small Δk component). This can be done by an EO effect and/or by the thermo-optical (TO) effect of silicon. The approach chosen here is to use primarily the ultrafast EO free-carrier effect of carriers depleted from the cavity’s waveguide core, together with a small cavity-linked TO effect. Dimensional errors made during fabrication of the NBs can lead to a slight mismatch of the NB resonance wavelength to the wavelength of the laser source driving the logic. Using modest currents in a tiny heater stripe located at one end of each NB cavity, the TO index change can then be used to align the resonance to the laser. The micro-heater-trimmers (not shown in Fig. 1) are illustrated in section 5 below.

Regarding the EO addressing of the NB in each arm, a cavity-centered lateral PN junction (Fig. 1) or a vertical PN junction or a horizontal NPN double-junction can be employed to shift the resonance according to the electrical logic commands. The reverse-biased junction(s) have two addressing states: the first is zero bias on each junction, written as (0, 0); the second is full reverse bias on each junction written as (V, V). The (0, 0) state is stable by definition. For a given optical input to the 2 × 2, the (0, 0) produces the bar output while (V, V) gives the cross output. Note also that (V, V) is push-push addressing.

The device parameters are defined as follows. The FWHM linewidth of the resonance is δλ. The resonance wavelength is λro at zero bias, and λrv at full bias. The shift induced by the electrical logic signal is λrv – λro = Δλ. The optical crosstalk or “noise” that appears at the outputs of the MZI is governed by the ratio Δλ/δλ, with Δλ/δλ = 2 giving greater crosstalk suppression than Δλ/δλ = 1. In practice, Δλ/δλ = 1 is generally feasible. Optimization of the N and P dopings and the mode overlap will determine whether Δλ/δλ = 2 can be reached.

When light whose wavelength is within the resonance profile travels along the axis of the silicon waveguide and encounters the NB lattice, that light will experience a combination of transmission and reflection because the NB cavity is a standing-wave resonator, strongly transmissive on resonance and strongly reflective off resonance. The MZI “crossbar” architecture is ideal to combine reflected or transmitted components in order to produce (on resonance) a destructive interference of two transmitted components at the “bar” output port, and a constructive interference at the “cross” output port. To be more specific, if we chose the wavelength of operation λop to be λro, and if we select the bar port as the optical logic signal output port, then we would have logic “0” at (0,0), and logic “1” at (V,V) as discussed below. In this example, there are two technical issues. First, we want high optical throughput for logic-1 and this will require transmission optimization of the NB photonic crystal lattice; it may also require engineering of the NB resonance spectral profile. Second, for logic-0, we require lattice engineering to provide high “extinction” on resonance. If we utilize the cross output port to give a complimentary logic signal, as discussed below, then for the λop = λro case, the full-bias logic-0 cross state can introduce some “non-zero” optical noise at the cross port due to optical crosstalk related to the spectral profile. This crosstalk can be minimized by using Δλ > δλ and by using the coupled-cavity approach for each NB arm [20] to make the spectral profile more rectangular than the inherent Lorentzian profile. The downside of that approach is that the lattice length is doubled (although still on a 20 µm scale) and that two cavities must simultaneously be perturbed by EO means.

Figure 1 above shows the perspective view of the waveguided logic gate, with an electron-hole depletion controller in each cavity region. The EO depleter is ideal for logic applications, offering “unprecedented” reconfiguration times around 5 ps as well as a large information bandwidth. Because we are dealing with resonant bandpass gates, there will be a bandwidth narrowing effect when several gates are optically connected in a series. However, the 3-dB bandpass of the Fig. 1 device can readily be 80 GHz, and then in a cascade connection, even a bandpass reduced by 70 or 80% shall still provide logic data rates above 25 Gb/s.

Integrated NB structures have been widely investigated for lasers, modulators/switches, and sensors both theoretically and experimentally in the past decade [21]. For instance, a compact and low-power-consumption silicon thermo-optic switch with a footprint of 60 µm × 16 µm has been demonstrated experimentally, which shows a record high tuning efficiency [22]. A carrier injection silicon EO modulator with ultralow switching voltage of 50 mV and switching energy of 0.1 fJ/bit operating at a few GHz has also been fabricated [23]. The carrier depletion method is believed to drive the bandwidth to much higher values though the swing voltage can be higher. NB based modulators with high modulation speed (>20 GHz) and ultrasmall footprint (<20 µm2) have been reported and verified through simulation as well [17]. The fabrication of silicon-based NB devices where the PhC lattice holes are about 100 nm in radius are compatible with the current integrated photonics fabrication platform and can be well handled by the industry standard 193 nm immersion lithography [24]. In other words, the manufacturing of such devices can be taped out to most of the integrated photonics foundries without any special treatment. It is worth mentioning that the combination of NB structures and new materials such as 2D materials and lithium niobate attracts increasing attention [25]. Tremendous efforts have been made toward further improving the performance of integrated modulators [21].

In order to illustrate the NB-MZI-based logic elements more vividly, we perform a 2.5D variational finite-difference-time-domain (FDTD) simulation of a typical NB-MZI as an example, with the schematic configuration shown in Fig. 2. This structure consists of two identical 3-dB directional couplers and two NB arms on a silicon-on-insulator (SOI) platform with SiO2 cladding. Each NB includes 20 etched holes to form the mirror sections and taper sections. The waveguide width is chosen as 530 nm in the whole structure. The height of the silicon layer is the standard 220 nm. The coupling length and gap for the directional coupler are 8.5 µm and 150 nm, respectively. Taking the device performance and fabrication limitation into consideration, we chose the parameters for the holes from [26] as follows: d1 = 150 nm, d2 = 162 nm, d3 = 172 nm, d4 = 182 nm, d5 = 192 nm, di = 202 nm (i = 6,7,…10), p0 = 284 nm, p1 = 290 nm, p2 = 310 nm, p3 = 330 nm, p4 = 350 nm, p5 = 370 nm, pi = 390 nm (i = 6,7,…9). As shown in Fig. 3, when the NBs are off resonance, the light will be reflected by two arms and then will be redirected to the Bar-1 port. When it is on resonance at 1544.54 nm, the light will go through the arms and propagate to the Cross-1 port. After the refractive index is changed by 0.003 via the carrier dispersion effect, the spectra will shift by 0.43 nm, causing a switch in the output if we fix the wavelength to a certain value such as 1544.54 nm. The total footprint of the device is 7 µm × 50 µm. It can be further reduced by minimizing the bending radius and optimizing the 3 dB directional couplers. The Q factor is about 4000 and insertion loss is about 0.5 dB.

 figure: Fig. 2.

Fig. 2. (a) Schematic diagram of a NB-MZI. (b) Zoom-in diagram of the NB section which consists of two mirror sections and two taper sections. (c) The electric field distribution along the NB section.

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 figure: Fig. 3.

Fig. 3. The power density profile of Fig. 2 at off-resonance (a) and on-resonance (b) conditions. (c) shows the transmission at the Bar-1 and Cross-1 ports.

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Conventional MZI based EO modulators are not normally regarded as suitable for digital optical computing mainly due to their large size. NB-MZIs make such computing feasible by significantly shrinking logic footprint by roughly two orders of magnitude. In addition, it also adds wavelength selectivity to the device that further increases the capability of realizing WDM- based logic functions. As compared to microring- or microdisk-based logic gates which also exhibit ultrasmall size and good wavelength selectivity but normally are used as a 1×1 or 1×2 logic gates, this proposed 2×2 logic gate has a convenient feed-forward geometry for easy cascading of elements (and does not use the curved-back waveguide of the 1 × 2 microring /microdisk). Our 2× 2 EOLs have the added capability of processing two inputs at the same time, even including cases where the two inputs are at different wavelengths.

In the remaining sections of this paper, we will show the formation of six logic-gate functions that are created from a series connection of two MZI gates, both of which operate at the same wavelength. Then we will propose wavelength-multiplexed EO logic and will illustrate how gates whose input signals are encoded at two nearby wavelengths can be connected to create a decoder circuit. After that, we show how two independent electrical logic signals Va and Vb can be applied to one “cavities modified” NB MZI to obtain OR or NAND or XNOR gating. We call this a “multi operand” gate. Finally, we show how optical logic signals can be regenerated by adding a photodetector circuit to one NB MZI. This PD demodulates the incoming optical logic pulse train and applies the resulting electrical pulses to the EO NBs that are fed by a strong CW optical source.

3. NB MZI-based logic gate

Figure 4 shows two fundamental logic gates, marked as a grey box and an orange box, using NB MZIs. The light input that can be continuous wave (CW) light or modulated light goes into one of the left ports and generates logic outputs at the right side of the MZI, optical outputs that contain the information of the electrical inputs. The difference between these two gates lies in the position of the laser’s operating wavelength λop relative to the notch (or peak) in the MZI bar (or cross) output spectrum. This is shown in Fig. 4, where we propose λop (grey) = λro (grey) along with λop(orange) = λrv (orange). At this point, we have a choice. We can elect to use different-wavelength inputs for the grey and orange devices, or we can demand the same wavelength for gray and orange. We believe that the most practical choice is λop (grey) = λop (orange). Then, according to Fig. 4, the zero-bias resonance-wavelength offset Δλ between gray and orange is governed by the specific voltage addressing. For example, if we assume that Δλ = 2 δλ is used for grey bar logic “1”, then we find that λro (orange) = λro (grey) – 2 δλ. Having found the offset, another choice should be made; (1) we could manufacture different gray and orange boxes by designing the orange PhC NB lattice to be slightly different from the grey PhC lattice so as to produce the Δλ offset, or (2) we could make every device an orange box and could then deploy a strong direct current to a TO heater to convert the orange device into the gray device by maintaining the needed Δλ for any gray box. This power-hungry TO approach is not good, and it is better to make permanent dimensional differences between gray or orange. In other words, lattice design and NB construction can satisfy the λro (orange) = λro (grey) – Δλ requirement. In view of this “deliberate” wavelength offset, we shall designate the logic gates discussed below as “gate shifted” logic. To make a desired (arbitrary) logic circuit, multiple orange and gray boxes will be connected, all of them driven by one CW laser.

 figure: Fig. 4.

Fig. 4. Two proposed types of logic gates based on NB MZIs, a gray gate (a) and an orange gate (b). These two gates have slightly different transmission spectra as shown in the insets at various control inputs. As a result, the logic outputs for these gates are exactly the opposite, which can be used in some complementary situations.

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As shown in Fig. 4, the logic outputs are exactly the opposite at bar and cross outputs for these two gates, which can be used in a complementary mode for different applications. Unlike microrings/disks with an example circuit shown in [27], one advantage of the NB MZI is that the light keeps moving forward at both outputs naturally without the assistance of U-shaped waveguide bends and crossings. As a result, the logic circuit based on NB MZIs will emerge in a neater and more compact topology for many applications.

We propose that cascading two such logic gates in a series connection will allow realization of several fundamental two-operand logic functions including AND, OR, NAND, NOR, XOR, XNOR, and so on, in a very simple format as shown in Fig. 5. Take the XOR gate as an example. The logic functions generated by the first gate are a and $\bar{a}$ at the two output ports, respectively. Then they are converted to $a\bar{b}$ and $\bar{a}b$ at the upper port by the second gate, which combined is equivalent to XOR. As discussed, the two types of logic gates operate at the same laser wavelength. Besides the presented solutions in the figure, there are many other possible solutions using the gray and orange gates to achieve these functions. It should also be noted that the “1” in the figure represents the “logic one” not actual optical intensity. The open ends of the optical waveguide routes are terminated by optical absorbers (not shown in Fig. 5) in order to avoid signal crosstalk.

 figure: Fig. 5.

Fig. 5. Two-operand logic gates achieved by these two types of logic gates.

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A combination of these two-operand logic gates can further lead us to various useful functional circuits where the conciseness remains. Figures 6(a) and 6(b) show a circuit of an N-bit parity checker which is composed of various XNOR gates. In a parity checker, the even-parity port will output logic-1 only when there are an even number of logic-1s in the input sequence. Otherwise, logic-0 will be achieved at this port while the odd-parity port will generate logic-1. The truth table is shown in Table 1. A microring-based circuit has been proposed and demonstrated in Ref. [27] with unavoidable U-shaped bends and crossings in each bit, which occupy extra precious space on a chip and introduce additional loss. On the contrary, the proposed NB MZI- based circuits have the ability to eliminate these drawbacks since the light at the two ports are both propagating forward naturally. Specifically, the efficient footprint of the microring-based device is about 600×300 µm2 as reported in [20]. The optical waveguide part will still take 300×100 µm2 even if we optimize the space among each bit. As a comparison, in our case, the device only occupies about 50×21 µm2.

 figure: Fig. 6.

Fig. 6. (a) and (b): N-bit Parity checker based on NB MZIs. (c): N-bit full adder.

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Tables Icon

Table 1. Truth table of a parity checker

Another example of an N-bit scalable NB MZI-based full adder is shown in Fig. 6(c). Each bit realizes a function of ${C_n} = {p_n}{C_{n - 1}} + {g_n}$ [9]. For instance, at the first bit, a grey gate is initially used to convert the input carry signal into ${p_1}{C_0}$ with the output port on the right bottom. The orange box owns two input sources, logic-1 (CW) and the previous output. With those, along with the electrical signal, it will generate the final output carry signal at the lower right port.

4. WDM-based logic gates

The NB is a wavelength-sensitive structure making it possible to realize wavelength-division multiplexed (WDM)-based logic. Multiple signals with different wavelengths are now able to share the same logic gate or even the same port so as to achieve more functions efficiently in terms of size and thus dynamic power consumption. We consider the two-wavelength case. Figure 7 illustrates the new approach that an MZI can provide multiple logic functions if two CW laser sources having different wavelength are inputted simultaneously to that MZI, provided that one laser is at λro and the other is at λrv. We shall denote this new category of logic gates as “two-tone” logic (referring to the wavelengths). Figure 7 shows four samples of the WDM-based logic gate with different wavelengths and port selections. Take Fig. 7(a) as an example. This device can be regarded as a mixture of a grey and an orange logic gate. Optical signals with two different wavelengths are injected into the logic gate through upper and lower ports, respectively. This kind of multiplexing both in space and wavelength enables a more compact and efficient computing circuit since the same logic gates now are being used multiple times. When the output ports are connected to a broadband photodetector covering both wavelength-signals, the final output logic is the OR between the logic at two wavelengths. As an example, a 3–8 decoder circuit consisting of multiple WDM-based logic gates is shown in Fig. 7(e) [28]. Two light beams with different wavelengths will propagate in the same network simultaneously from the origin to the end, before which there are several passive optical filters to separate the two light beams with different wavelengths into two output ports.

 figure: Fig. 7.

Fig. 7. (a-d) WDM-based logic gate with different wavelength and port selections. (e) A 3–8 decoder circuit realized by WDM-based logic gates. f: filters.

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5. Multi-operand logic gate

The multi-operand approach to EO logic gates was discussed in Ying et al. [29] for the case of an EO microdisk coupled to two bus waveguides. The basic idea is to divide the EO control region (in one device) into two or more active regions that are controlled independently by different electrical logic signals. Then a single MZI device can give performance equivalent to two cascaded devices. The addressing can be related to δλ and Δλ associated with the resonant gate. As described above in this paper, the condition Δλ = δλ is the minimum acceptable shift, and this applies also to the new multi-operand case. Turning now to our NB MZI’s, Fig. 8 illustrates the schematic top view of the simplest multiple operand logic (MOL) gate: the two-signal MOL gate in which each NB cavity region contains two separated PN junction regions controlled by Va and Vb, respectively. The full reverse-bias “V” that is applied to each is V = Va = Vb = 3 Volts for example. And here the requirement is that Va =V, Vb=0 or Va=0, Vb=V can produce Δλ = δλ, whereas when Va=V, Vb=V are applied, we get Δλ = 2 δλ, as detailed earlier in Fig. 4 of [29] where the three possible resonance positions are shown along with three choices of operation wavelength λop. Figure 4 of [29] applies immediately to one 2-op NB MZI, and the λop choice determines whether the resulting logic-gate function shall be y = a OR b, or y = a NAND b, or y = a XNOR b.

 figure: Fig. 8.

Fig. 8. Two-operand NB MZI logic device constructed to have two independent EO controlled PN-junction “depleters” within each NB cavity region. The inputted electrical digital logic signals are Va and Vb.

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6. Optical-to-electrical-to-optical repeater for gain in logic circuits

In the sequential logic approach and in the pipelined logic structure [30], the optical logic signals pass through a series or sequence of EO logic gates, and during that travel, the optical signal level becomes reduced or degraded because of the optical insertion loss IL presented by each gate. As a consequence, there is a need to restore the optical signal level at the end of each sequence, which could be done, in principle, by a semiconductor optical amplifier (SOA) that exhibits spontaneous emission noise. There is a better alternative to the SOA method, which we propose here as the optical-to-electrical-to-optical (OEO) gain structure. The structure suggested here for this application is the above dual-NB MZI, but with an electrical drive for the EO cavity “modulators” that is provided by a photodetector signal (plus a dc bias voltage in the connection). The OEO here is analogous to the OEO previously reported for micro disk resonator structures [31], where two bus waveguides were side coupled to the disk to provide 2 × 2 EO modulation in response to a waveguided PD signal.

The device proposed here is shown in Fig. 9, a schematic top view of the waveguided MZI and the necessary waveguide-integrated photodetector offering high 1550-nm responsivity provided by a GeSn lateral PIN photodiode, rather than the more traditional Ge PD approach. The logic-modulated optical input to the PD is demodulated to create a composite electrical logic signal that is fed in turn to the EO NB MZI structure acting as an EO modulator of CW light signals that enter either input of the MZI, thereby regenerating the optical logic signal at the outputs of the MZI. Gain occurs because the intensity of CW light coming in is selected to be larger than the peak intensity inputted to the PD. For the MZI, there are several choices of operation: (1) one CW input only, with the second input terminated, (2) two simultaneous different-wavelength inputs, or (3) two inputs at the same wavelength, with one source On while the other source is Off. In other words, there is versatility in how the optical repeater can be deployed.

 figure: Fig. 9.

Fig. 9. OEO optical repeater for regeneration and restoration of optical logic levels in a logic circuit.

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7. Conclusion

In conclusion, we have proposed NB MZI-based 2 × 2 electro-optical logic gates and circuits which exhibit much smaller circuit size as compared to conventional MZIs. We start with the performance of a single 2 × 2 NB MZI switch, and then use it to serve as one logic gate. After that, we propose several new combinations of 2 × 2 logic gates that enable many practical and complex functional logic circuits with very neat topology. WDM-based and OEO-based logic circuits are also discussed for further extending NB MZI functionality. Results show that this NB MZI is another promising candidate for high-speed large-scale electronic-photonic digital computing.

Funding

Air Force Office of Scientific Research (FA9550-17-1-0354, FA9550-19-1-0341).

Disclosures

The authors declare no conflicts of interest.

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20. R. Soref, “N x N x Mλ electro-optical nanobeam wavelength-multiplexed cross-connect switches using push-push addressing,” Opt. Express 28(17), 25060 (2020). [CrossRef]  

21. D. Yang, X. Liu, X. Li, B. Duan, A. Wang, and Y. Xiao, “Photoic crystal nanobeam cavity devices for on-chip integrated silicon photonics,” J. Semicond 42(2), 023103 (2021). [CrossRef]  

22. R. Zhang, Y. He, Y. Zhang, S. An, Q. Zhu, X. Li, and Y. Su, “Ultracompact and low-power-consumption silicon thermo-optic switch for high-speed data,” Nanophotonics 10(2), 937–945 (2021). [CrossRef]  

23. A. Shakoor, K. Nozaki, E. Kuramochi, K. Nishiguchi, A. Shinya, and M. Notomi, “Compact 1D-silicon photonic crystal electro-optic modulator operating with ultra-low switching voltage and energy,” Opt. Express 22(23), 28623 (2014). [CrossRef]  

24. N. M. Fahrenkopf, C. McDonough, G. L. Leake, Z. Su, E. Timurdogan, and D. D. Coolbaugh, “The AIM Photonics MPW: A Highly Accessible Cutting Edge Technology for Rapid Prototyping of Photonic Integrated Circuits,” IEEE J. Sel. Top. Quantum Electron. 25(5), 1–6 (2019). [CrossRef]  

25. T. Pan, C. Qiu, J. Wu, X. Jiang, B. Liu, Y. Yang, H. Zhou, R. Soref, and Y. Su, “Analysis of an electro-optic modulator based on a graphene-silicon hybrid 1D photonic crystal nanobeam cavity,” Opt. Express 23(18), 23357 (2015). [CrossRef]  

26. Y. Zhang, R. Zhang, Q. Zhu, Y. Yuan, and Y. Su, “Architecture and Devices for Silicon Photonic Switching in Wavelength, Polarization and Mode,” J. Lightwave Technol. 38(2), 215–225 (2020). [CrossRef]  

27. Z. Liu, X. Wu, H. Xiao, X. Han, W. Chen, M. Liao, T. Zhao, H. Jia, J. Yang, and Y. Tian, “On-chip optical parity checker using silicon photonic integrated circuits,” Nanophotonics 7(12), 1939–1948 (2018). [CrossRef]  

28. C. Feng, Z. Ying, Z. Zhao, J. Gu, D. Z. Pan, and R. T. Chen, “Wavelength-division-multiplexing (WDM)-based integrated electronic–photonic switching network (EPSN) for high-speed data processing and transportation,” Nanophotinics 9(15), 4579–4588(2020). [CrossRef]  

29. Z. Ying, C. Feng, Z. Zhao, R. Soref, D. Pan, and R. T. Chen, “Integrated multi-operand electro-optic logic gates for optical computing,” Appl. Phys. Lett. 115(17), 171104 (2019). [CrossRef]  

30. Z. Ying, C. Feng, Z. Zhao, J. Gu, R. Soref, D. Pan, and R. T. Chen, “Sequential logic and pipelining in chip-based electronic-photonic digital computing,” IEEE Photonics Journal 12(6), 1–11 (2020). [CrossRef]  

31. R. Soref, F. De Leonardis, Z. Ying, V. M. N. Passaro, and R. T. Chen, “Silicon-Based Group-IV O-E-O Devices for Gain, Logic, and Wavelength Conversion,” ACS Photonics 7(3), 800–811(2020). [CrossRef]  

References

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  1. A. Rickman, “The commercialization of silicon photonics,” Nat. Photonics 8(8), 579–582 (2014).
    [Crossref]
  2. D. Thomson, A. Zilkie, J. E. Bowers, T. Komlijenovic, G. T. Reed, L. Vivien, D. Marris-Morini, E. Cassan, L. Virot, J. Fédéli, J. Hartmann, J. H. Schmid, D. Xu, F. Boeuf, P. O’Brien, G. Z. Mashanovich, and M. Nedeljkovic, “Roadmap on silicon photonics,” J. Opt 18(7), 073003(2016).
    [Crossref]
  3. D. A. B. Miller, “Attojoule Optoelectronics for Low-Energy Information Processing and Communications,” J. Lightwave Technol. 35(3), 346–396 (2017).
    [Crossref]
  4. H. Yan, C. J. Yang, N. Tang, Y. Zou, S. Chakravarty, A. Roth, and R. T. Chen, “Specific Detection of Antibiotics by Silicon-on-Chip Photonic Crystal Biosensor Arrays,” IEEE Sens. J. 17(18), 5915–5919 (2017).
    [Crossref]
  5. S. Chakravarty, X. Chen, N. Tang, W. C. Lai, Y. Zou, H. Yan, and R. T. Chen, “Review of design principles of 2D photonic crystal microcavity biosensors in silicon and their applications,” Front. Optoelectron. 9(2), 206–224 (2016).
    [Crossref]
  6. J. Sun, E. Timurdogan, A. Yaacobi, E. S. Hosseini, and M. R. Watts, “Large-scale nanophotonic phased array,” Nature 493(7431), 195–199 (2013).
    [Crossref]
  7. E. Mounier and J.-L. M. Collaborates, “Silicon Photonics 2018 - Market & Technology Report,” (2018).
  8. Z. Ying, C. Feng, Z. Zhao, S. Dhar, H. Dalir, J. Gu, R. Soref, D. Z. Pan, and R. T. Chen, “Electronic-photonic arithmetic logic unit for high-speed computing,” Nat. Commun. 11(1), 2154–2159 (2020).
    [Crossref]
  9. Z. Ying, Z. Wang, Z. Zhao, S. Dhar, D. Z. Pan, R. Soref, and R. T. Chen, “Silicon microdisk-based full adders for optical computing,” Opt. Lett. 43(5), 983–986 (2018).
    [Crossref]
  10. Y. Shen, N. C. Harris, S. Skirlo, D. Englund, and M. Soljačić, “Deep learning with coherent nanophotonic circuits,” Nat. Photonics 11(7), 441–446 (2017).
    [Crossref]
  11. K. Vandoorne, P. Mechet, T. Van Vaerenbergh, M. Fiers, G. Morthier, D. Verstraeten, B. Schrauwen, J. Dambre, and P. Bienstman, “Experimental demonstration of reservoir computing on a silicon photonics chip,” Nat. Commun. 5(1), 3541–3546 (2014).
    [Crossref]
  12. G. T. Reed, G. Mashanovich, F. Y. Gardes, and D. J. Thomson, “Silicon optical modulators,” Nat. Photonics 4(8), 518–526 (2010).
    [Crossref]
  13. E. Timurdogan, C. M. Sorace-Agaskar, J. Sun, E. Shah Hosseini, A. Biberman, and M. R. Watts, “An ultralow power athermal silicon modulator,” Nat. Commun. 5(1), 4008 (2014).
    [Crossref]
  14. M. Pantouvaki, S. A. Srinivasan, Y. Ban, P. De Heyn, P. Verheyen, G. Lepage, H. Chen, J. De Coster, N. Golshani, S. Balakrishnan, P. Absil, and J. Van Campenhout, “Active Components for 50Gb/s NRZ-OOK Optical Interconnects in a Silicon Photonics Platform,” J. Lightwave Technol. 35(4), 631–638 (2017).
    [Crossref]
  15. G. T. Reed, G. Z. Mashanovich, F. Y. Gardes, M. Nedeljkovic, Y. Hu, D. J. Thomson, K. Li, P. R. Wilson, S. W. Chen, and S. S. Hsu, “Recent breakthroughs in carrier depletion based silicon optical modulators,” Nanophotonics 3(4-5), 229–245 (2014).
    [Crossref]
  16. M. van Niekerk, S. Jahani, J. Bickford, P. Cho, S. Anderson, G. Leake, D. Coleman, M. L. Fanto, C. C. Tison, G. A. Howland, Z. Jacob, and S. F. Preble, “Two-dimensional extreme skin depth engineering for CMOS photonics,” (2020).
  17. J. Hendrickson, R. Soref, J. Sweet, and W. Buchwald, “Ultrasensitive silicon photonic-crystal nanobeam electro-optical modulator: Design and simulation,” Opt. Express 22(3), 3271 (2014).
    [Crossref]
  18. Q. Quan, P. B. Deotare, and M. Loncar, “Photonic crystal nanobeam cavity strongly coupled to the feeding waveguide,” Appl. Phys. Lett. 96(20), 203102 (2010).
    [Crossref]
  19. J. P. Vasco, D. Gerace, K. Seibold, and V. Savona, “Monolithic silicon-based nanobeam cavities for integrated nonlinear and quantum photonics,” Phys. Rev. Appl. 13(3), 034070 (2020).
    [Crossref]
  20. R. Soref, “N x N x Mλ electro-optical nanobeam wavelength-multiplexed cross-connect switches using push-push addressing,” Opt. Express 28(17), 25060 (2020).
    [Crossref]
  21. D. Yang, X. Liu, X. Li, B. Duan, A. Wang, and Y. Xiao, “Photoic crystal nanobeam cavity devices for on-chip integrated silicon photonics,” J. Semicond 42(2), 023103 (2021).
    [Crossref]
  22. R. Zhang, Y. He, Y. Zhang, S. An, Q. Zhu, X. Li, and Y. Su, “Ultracompact and low-power-consumption silicon thermo-optic switch for high-speed data,” Nanophotonics 10(2), 937–945 (2021).
    [Crossref]
  23. A. Shakoor, K. Nozaki, E. Kuramochi, K. Nishiguchi, A. Shinya, and M. Notomi, “Compact 1D-silicon photonic crystal electro-optic modulator operating with ultra-low switching voltage and energy,” Opt. Express 22(23), 28623 (2014).
    [Crossref]
  24. N. M. Fahrenkopf, C. McDonough, G. L. Leake, Z. Su, E. Timurdogan, and D. D. Coolbaugh, “The AIM Photonics MPW: A Highly Accessible Cutting Edge Technology for Rapid Prototyping of Photonic Integrated Circuits,” IEEE J. Sel. Top. Quantum Electron. 25(5), 1–6 (2019).
    [Crossref]
  25. T. Pan, C. Qiu, J. Wu, X. Jiang, B. Liu, Y. Yang, H. Zhou, R. Soref, and Y. Su, “Analysis of an electro-optic modulator based on a graphene-silicon hybrid 1D photonic crystal nanobeam cavity,” Opt. Express 23(18), 23357 (2015).
    [Crossref]
  26. Y. Zhang, R. Zhang, Q. Zhu, Y. Yuan, and Y. Su, “Architecture and Devices for Silicon Photonic Switching in Wavelength, Polarization and Mode,” J. Lightwave Technol. 38(2), 215–225 (2020).
    [Crossref]
  27. Z. Liu, X. Wu, H. Xiao, X. Han, W. Chen, M. Liao, T. Zhao, H. Jia, J. Yang, and Y. Tian, “On-chip optical parity checker using silicon photonic integrated circuits,” Nanophotonics 7(12), 1939–1948 (2018).
    [Crossref]
  28. C. Feng, Z. Ying, Z. Zhao, J. Gu, D. Z. Pan, and R. T. Chen, “Wavelength-division-multiplexing (WDM)-based integrated electronic–photonic switching network (EPSN) for high-speed data processing and transportation,” Nanophotinics 9(15), 4579–4588(2020).
    [Crossref]
  29. Z. Ying, C. Feng, Z. Zhao, R. Soref, D. Pan, and R. T. Chen, “Integrated multi-operand electro-optic logic gates for optical computing,” Appl. Phys. Lett. 115(17), 171104 (2019).
    [Crossref]
  30. Z. Ying, C. Feng, Z. Zhao, J. Gu, R. Soref, D. Pan, and R. T. Chen, “Sequential logic and pipelining in chip-based electronic-photonic digital computing,” IEEE Photonics Journal 12(6), 1–11 (2020).
    [Crossref]
  31. R. Soref, F. De Leonardis, Z. Ying, V. M. N. Passaro, and R. T. Chen, “Silicon-Based Group-IV O-E-O Devices for Gain, Logic, and Wavelength Conversion,” ACS Photonics 7(3), 800–811(2020).
    [Crossref]

2021 (2)

D. Yang, X. Liu, X. Li, B. Duan, A. Wang, and Y. Xiao, “Photoic crystal nanobeam cavity devices for on-chip integrated silicon photonics,” J. Semicond 42(2), 023103 (2021).
[Crossref]

R. Zhang, Y. He, Y. Zhang, S. An, Q. Zhu, X. Li, and Y. Su, “Ultracompact and low-power-consumption silicon thermo-optic switch for high-speed data,” Nanophotonics 10(2), 937–945 (2021).
[Crossref]

2020 (7)

Y. Zhang, R. Zhang, Q. Zhu, Y. Yuan, and Y. Su, “Architecture and Devices for Silicon Photonic Switching in Wavelength, Polarization and Mode,” J. Lightwave Technol. 38(2), 215–225 (2020).
[Crossref]

C. Feng, Z. Ying, Z. Zhao, J. Gu, D. Z. Pan, and R. T. Chen, “Wavelength-division-multiplexing (WDM)-based integrated electronic–photonic switching network (EPSN) for high-speed data processing and transportation,” Nanophotinics 9(15), 4579–4588(2020).
[Crossref]

Z. Ying, C. Feng, Z. Zhao, J. Gu, R. Soref, D. Pan, and R. T. Chen, “Sequential logic and pipelining in chip-based electronic-photonic digital computing,” IEEE Photonics Journal 12(6), 1–11 (2020).
[Crossref]

R. Soref, F. De Leonardis, Z. Ying, V. M. N. Passaro, and R. T. Chen, “Silicon-Based Group-IV O-E-O Devices for Gain, Logic, and Wavelength Conversion,” ACS Photonics 7(3), 800–811(2020).
[Crossref]

Z. Ying, C. Feng, Z. Zhao, S. Dhar, H. Dalir, J. Gu, R. Soref, D. Z. Pan, and R. T. Chen, “Electronic-photonic arithmetic logic unit for high-speed computing,” Nat. Commun. 11(1), 2154–2159 (2020).
[Crossref]

J. P. Vasco, D. Gerace, K. Seibold, and V. Savona, “Monolithic silicon-based nanobeam cavities for integrated nonlinear and quantum photonics,” Phys. Rev. Appl. 13(3), 034070 (2020).
[Crossref]

R. Soref, “N x N x Mλ electro-optical nanobeam wavelength-multiplexed cross-connect switches using push-push addressing,” Opt. Express 28(17), 25060 (2020).
[Crossref]

2019 (2)

Z. Ying, C. Feng, Z. Zhao, R. Soref, D. Pan, and R. T. Chen, “Integrated multi-operand electro-optic logic gates for optical computing,” Appl. Phys. Lett. 115(17), 171104 (2019).
[Crossref]

N. M. Fahrenkopf, C. McDonough, G. L. Leake, Z. Su, E. Timurdogan, and D. D. Coolbaugh, “The AIM Photonics MPW: A Highly Accessible Cutting Edge Technology for Rapid Prototyping of Photonic Integrated Circuits,” IEEE J. Sel. Top. Quantum Electron. 25(5), 1–6 (2019).
[Crossref]

2018 (2)

Z. Liu, X. Wu, H. Xiao, X. Han, W. Chen, M. Liao, T. Zhao, H. Jia, J. Yang, and Y. Tian, “On-chip optical parity checker using silicon photonic integrated circuits,” Nanophotonics 7(12), 1939–1948 (2018).
[Crossref]

Z. Ying, Z. Wang, Z. Zhao, S. Dhar, D. Z. Pan, R. Soref, and R. T. Chen, “Silicon microdisk-based full adders for optical computing,” Opt. Lett. 43(5), 983–986 (2018).
[Crossref]

2017 (4)

Y. Shen, N. C. Harris, S. Skirlo, D. Englund, and M. Soljačić, “Deep learning with coherent nanophotonic circuits,” Nat. Photonics 11(7), 441–446 (2017).
[Crossref]

D. A. B. Miller, “Attojoule Optoelectronics for Low-Energy Information Processing and Communications,” J. Lightwave Technol. 35(3), 346–396 (2017).
[Crossref]

H. Yan, C. J. Yang, N. Tang, Y. Zou, S. Chakravarty, A. Roth, and R. T. Chen, “Specific Detection of Antibiotics by Silicon-on-Chip Photonic Crystal Biosensor Arrays,” IEEE Sens. J. 17(18), 5915–5919 (2017).
[Crossref]

M. Pantouvaki, S. A. Srinivasan, Y. Ban, P. De Heyn, P. Verheyen, G. Lepage, H. Chen, J. De Coster, N. Golshani, S. Balakrishnan, P. Absil, and J. Van Campenhout, “Active Components for 50Gb/s NRZ-OOK Optical Interconnects in a Silicon Photonics Platform,” J. Lightwave Technol. 35(4), 631–638 (2017).
[Crossref]

2016 (2)

D. Thomson, A. Zilkie, J. E. Bowers, T. Komlijenovic, G. T. Reed, L. Vivien, D. Marris-Morini, E. Cassan, L. Virot, J. Fédéli, J. Hartmann, J. H. Schmid, D. Xu, F. Boeuf, P. O’Brien, G. Z. Mashanovich, and M. Nedeljkovic, “Roadmap on silicon photonics,” J. Opt 18(7), 073003(2016).
[Crossref]

S. Chakravarty, X. Chen, N. Tang, W. C. Lai, Y. Zou, H. Yan, and R. T. Chen, “Review of design principles of 2D photonic crystal microcavity biosensors in silicon and their applications,” Front. Optoelectron. 9(2), 206–224 (2016).
[Crossref]

2015 (1)

2014 (6)

A. Shakoor, K. Nozaki, E. Kuramochi, K. Nishiguchi, A. Shinya, and M. Notomi, “Compact 1D-silicon photonic crystal electro-optic modulator operating with ultra-low switching voltage and energy,” Opt. Express 22(23), 28623 (2014).
[Crossref]

E. Timurdogan, C. M. Sorace-Agaskar, J. Sun, E. Shah Hosseini, A. Biberman, and M. R. Watts, “An ultralow power athermal silicon modulator,” Nat. Commun. 5(1), 4008 (2014).
[Crossref]

K. Vandoorne, P. Mechet, T. Van Vaerenbergh, M. Fiers, G. Morthier, D. Verstraeten, B. Schrauwen, J. Dambre, and P. Bienstman, “Experimental demonstration of reservoir computing on a silicon photonics chip,” Nat. Commun. 5(1), 3541–3546 (2014).
[Crossref]

A. Rickman, “The commercialization of silicon photonics,” Nat. Photonics 8(8), 579–582 (2014).
[Crossref]

G. T. Reed, G. Z. Mashanovich, F. Y. Gardes, M. Nedeljkovic, Y. Hu, D. J. Thomson, K. Li, P. R. Wilson, S. W. Chen, and S. S. Hsu, “Recent breakthroughs in carrier depletion based silicon optical modulators,” Nanophotonics 3(4-5), 229–245 (2014).
[Crossref]

J. Hendrickson, R. Soref, J. Sweet, and W. Buchwald, “Ultrasensitive silicon photonic-crystal nanobeam electro-optical modulator: Design and simulation,” Opt. Express 22(3), 3271 (2014).
[Crossref]

2013 (1)

J. Sun, E. Timurdogan, A. Yaacobi, E. S. Hosseini, and M. R. Watts, “Large-scale nanophotonic phased array,” Nature 493(7431), 195–199 (2013).
[Crossref]

2010 (2)

G. T. Reed, G. Mashanovich, F. Y. Gardes, and D. J. Thomson, “Silicon optical modulators,” Nat. Photonics 4(8), 518–526 (2010).
[Crossref]

Q. Quan, P. B. Deotare, and M. Loncar, “Photonic crystal nanobeam cavity strongly coupled to the feeding waveguide,” Appl. Phys. Lett. 96(20), 203102 (2010).
[Crossref]

Absil, P.

An, S.

R. Zhang, Y. He, Y. Zhang, S. An, Q. Zhu, X. Li, and Y. Su, “Ultracompact and low-power-consumption silicon thermo-optic switch for high-speed data,” Nanophotonics 10(2), 937–945 (2021).
[Crossref]

Anderson, S.

M. van Niekerk, S. Jahani, J. Bickford, P. Cho, S. Anderson, G. Leake, D. Coleman, M. L. Fanto, C. C. Tison, G. A. Howland, Z. Jacob, and S. F. Preble, “Two-dimensional extreme skin depth engineering for CMOS photonics,” (2020).

Balakrishnan, S.

Ban, Y.

Biberman, A.

E. Timurdogan, C. M. Sorace-Agaskar, J. Sun, E. Shah Hosseini, A. Biberman, and M. R. Watts, “An ultralow power athermal silicon modulator,” Nat. Commun. 5(1), 4008 (2014).
[Crossref]

Bickford, J.

M. van Niekerk, S. Jahani, J. Bickford, P. Cho, S. Anderson, G. Leake, D. Coleman, M. L. Fanto, C. C. Tison, G. A. Howland, Z. Jacob, and S. F. Preble, “Two-dimensional extreme skin depth engineering for CMOS photonics,” (2020).

Bienstman, P.

K. Vandoorne, P. Mechet, T. Van Vaerenbergh, M. Fiers, G. Morthier, D. Verstraeten, B. Schrauwen, J. Dambre, and P. Bienstman, “Experimental demonstration of reservoir computing on a silicon photonics chip,” Nat. Commun. 5(1), 3541–3546 (2014).
[Crossref]

Boeuf, F.

D. Thomson, A. Zilkie, J. E. Bowers, T. Komlijenovic, G. T. Reed, L. Vivien, D. Marris-Morini, E. Cassan, L. Virot, J. Fédéli, J. Hartmann, J. H. Schmid, D. Xu, F. Boeuf, P. O’Brien, G. Z. Mashanovich, and M. Nedeljkovic, “Roadmap on silicon photonics,” J. Opt 18(7), 073003(2016).
[Crossref]

Bowers, J. E.

D. Thomson, A. Zilkie, J. E. Bowers, T. Komlijenovic, G. T. Reed, L. Vivien, D. Marris-Morini, E. Cassan, L. Virot, J. Fédéli, J. Hartmann, J. H. Schmid, D. Xu, F. Boeuf, P. O’Brien, G. Z. Mashanovich, and M. Nedeljkovic, “Roadmap on silicon photonics,” J. Opt 18(7), 073003(2016).
[Crossref]

Buchwald, W.

Cassan, E.

D. Thomson, A. Zilkie, J. E. Bowers, T. Komlijenovic, G. T. Reed, L. Vivien, D. Marris-Morini, E. Cassan, L. Virot, J. Fédéli, J. Hartmann, J. H. Schmid, D. Xu, F. Boeuf, P. O’Brien, G. Z. Mashanovich, and M. Nedeljkovic, “Roadmap on silicon photonics,” J. Opt 18(7), 073003(2016).
[Crossref]

Chakravarty, S.

H. Yan, C. J. Yang, N. Tang, Y. Zou, S. Chakravarty, A. Roth, and R. T. Chen, “Specific Detection of Antibiotics by Silicon-on-Chip Photonic Crystal Biosensor Arrays,” IEEE Sens. J. 17(18), 5915–5919 (2017).
[Crossref]

S. Chakravarty, X. Chen, N. Tang, W. C. Lai, Y. Zou, H. Yan, and R. T. Chen, “Review of design principles of 2D photonic crystal microcavity biosensors in silicon and their applications,” Front. Optoelectron. 9(2), 206–224 (2016).
[Crossref]

Chen, H.

Chen, R. T.

Z. Ying, C. Feng, Z. Zhao, S. Dhar, H. Dalir, J. Gu, R. Soref, D. Z. Pan, and R. T. Chen, “Electronic-photonic arithmetic logic unit for high-speed computing,” Nat. Commun. 11(1), 2154–2159 (2020).
[Crossref]

C. Feng, Z. Ying, Z. Zhao, J. Gu, D. Z. Pan, and R. T. Chen, “Wavelength-division-multiplexing (WDM)-based integrated electronic–photonic switching network (EPSN) for high-speed data processing and transportation,” Nanophotinics 9(15), 4579–4588(2020).
[Crossref]

Z. Ying, C. Feng, Z. Zhao, J. Gu, R. Soref, D. Pan, and R. T. Chen, “Sequential logic and pipelining in chip-based electronic-photonic digital computing,” IEEE Photonics Journal 12(6), 1–11 (2020).
[Crossref]

R. Soref, F. De Leonardis, Z. Ying, V. M. N. Passaro, and R. T. Chen, “Silicon-Based Group-IV O-E-O Devices for Gain, Logic, and Wavelength Conversion,” ACS Photonics 7(3), 800–811(2020).
[Crossref]

Z. Ying, C. Feng, Z. Zhao, R. Soref, D. Pan, and R. T. Chen, “Integrated multi-operand electro-optic logic gates for optical computing,” Appl. Phys. Lett. 115(17), 171104 (2019).
[Crossref]

Z. Ying, Z. Wang, Z. Zhao, S. Dhar, D. Z. Pan, R. Soref, and R. T. Chen, “Silicon microdisk-based full adders for optical computing,” Opt. Lett. 43(5), 983–986 (2018).
[Crossref]

H. Yan, C. J. Yang, N. Tang, Y. Zou, S. Chakravarty, A. Roth, and R. T. Chen, “Specific Detection of Antibiotics by Silicon-on-Chip Photonic Crystal Biosensor Arrays,” IEEE Sens. J. 17(18), 5915–5919 (2017).
[Crossref]

S. Chakravarty, X. Chen, N. Tang, W. C. Lai, Y. Zou, H. Yan, and R. T. Chen, “Review of design principles of 2D photonic crystal microcavity biosensors in silicon and their applications,” Front. Optoelectron. 9(2), 206–224 (2016).
[Crossref]

Chen, S. W.

G. T. Reed, G. Z. Mashanovich, F. Y. Gardes, M. Nedeljkovic, Y. Hu, D. J. Thomson, K. Li, P. R. Wilson, S. W. Chen, and S. S. Hsu, “Recent breakthroughs in carrier depletion based silicon optical modulators,” Nanophotonics 3(4-5), 229–245 (2014).
[Crossref]

Chen, W.

Z. Liu, X. Wu, H. Xiao, X. Han, W. Chen, M. Liao, T. Zhao, H. Jia, J. Yang, and Y. Tian, “On-chip optical parity checker using silicon photonic integrated circuits,” Nanophotonics 7(12), 1939–1948 (2018).
[Crossref]

Chen, X.

S. Chakravarty, X. Chen, N. Tang, W. C. Lai, Y. Zou, H. Yan, and R. T. Chen, “Review of design principles of 2D photonic crystal microcavity biosensors in silicon and their applications,” Front. Optoelectron. 9(2), 206–224 (2016).
[Crossref]

Cho, P.

M. van Niekerk, S. Jahani, J. Bickford, P. Cho, S. Anderson, G. Leake, D. Coleman, M. L. Fanto, C. C. Tison, G. A. Howland, Z. Jacob, and S. F. Preble, “Two-dimensional extreme skin depth engineering for CMOS photonics,” (2020).

Coleman, D.

M. van Niekerk, S. Jahani, J. Bickford, P. Cho, S. Anderson, G. Leake, D. Coleman, M. L. Fanto, C. C. Tison, G. A. Howland, Z. Jacob, and S. F. Preble, “Two-dimensional extreme skin depth engineering for CMOS photonics,” (2020).

Collaborates, J.-L. M.

E. Mounier and J.-L. M. Collaborates, “Silicon Photonics 2018 - Market & Technology Report,” (2018).

Coolbaugh, D. D.

N. M. Fahrenkopf, C. McDonough, G. L. Leake, Z. Su, E. Timurdogan, and D. D. Coolbaugh, “The AIM Photonics MPW: A Highly Accessible Cutting Edge Technology for Rapid Prototyping of Photonic Integrated Circuits,” IEEE J. Sel. Top. Quantum Electron. 25(5), 1–6 (2019).
[Crossref]

Dalir, H.

Z. Ying, C. Feng, Z. Zhao, S. Dhar, H. Dalir, J. Gu, R. Soref, D. Z. Pan, and R. T. Chen, “Electronic-photonic arithmetic logic unit for high-speed computing,” Nat. Commun. 11(1), 2154–2159 (2020).
[Crossref]

Dambre, J.

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Z. Ying, Z. Wang, Z. Zhao, S. Dhar, D. Z. Pan, R. Soref, and R. T. Chen, “Silicon microdisk-based full adders for optical computing,” Opt. Lett. 43(5), 983–986 (2018).
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D. Thomson, A. Zilkie, J. E. Bowers, T. Komlijenovic, G. T. Reed, L. Vivien, D. Marris-Morini, E. Cassan, L. Virot, J. Fédéli, J. Hartmann, J. H. Schmid, D. Xu, F. Boeuf, P. O’Brien, G. Z. Mashanovich, and M. Nedeljkovic, “Roadmap on silicon photonics,” J. Opt 18(7), 073003(2016).
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Z. Ying, C. Feng, Z. Zhao, S. Dhar, H. Dalir, J. Gu, R. Soref, D. Z. Pan, and R. T. Chen, “Electronic-photonic arithmetic logic unit for high-speed computing,” Nat. Commun. 11(1), 2154–2159 (2020).
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C. Feng, Z. Ying, Z. Zhao, J. Gu, D. Z. Pan, and R. T. Chen, “Wavelength-division-multiplexing (WDM)-based integrated electronic–photonic switching network (EPSN) for high-speed data processing and transportation,” Nanophotinics 9(15), 4579–4588(2020).
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Z. Ying, C. Feng, Z. Zhao, J. Gu, R. Soref, D. Pan, and R. T. Chen, “Sequential logic and pipelining in chip-based electronic-photonic digital computing,” IEEE Photonics Journal 12(6), 1–11 (2020).
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Z. Ying, C. Feng, Z. Zhao, R. Soref, D. Pan, and R. T. Chen, “Integrated multi-operand electro-optic logic gates for optical computing,” Appl. Phys. Lett. 115(17), 171104 (2019).
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K. Vandoorne, P. Mechet, T. Van Vaerenbergh, M. Fiers, G. Morthier, D. Verstraeten, B. Schrauwen, J. Dambre, and P. Bienstman, “Experimental demonstration of reservoir computing on a silicon photonics chip,” Nat. Commun. 5(1), 3541–3546 (2014).
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G. T. Reed, G. Z. Mashanovich, F. Y. Gardes, M. Nedeljkovic, Y. Hu, D. J. Thomson, K. Li, P. R. Wilson, S. W. Chen, and S. S. Hsu, “Recent breakthroughs in carrier depletion based silicon optical modulators,” Nanophotonics 3(4-5), 229–245 (2014).
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G. T. Reed, G. Mashanovich, F. Y. Gardes, and D. J. Thomson, “Silicon optical modulators,” Nat. Photonics 4(8), 518–526 (2010).
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J. P. Vasco, D. Gerace, K. Seibold, and V. Savona, “Monolithic silicon-based nanobeam cavities for integrated nonlinear and quantum photonics,” Phys. Rev. Appl. 13(3), 034070 (2020).
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Gu, J.

Z. Ying, C. Feng, Z. Zhao, S. Dhar, H. Dalir, J. Gu, R. Soref, D. Z. Pan, and R. T. Chen, “Electronic-photonic arithmetic logic unit for high-speed computing,” Nat. Commun. 11(1), 2154–2159 (2020).
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Z. Ying, C. Feng, Z. Zhao, J. Gu, R. Soref, D. Pan, and R. T. Chen, “Sequential logic and pipelining in chip-based electronic-photonic digital computing,” IEEE Photonics Journal 12(6), 1–11 (2020).
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C. Feng, Z. Ying, Z. Zhao, J. Gu, D. Z. Pan, and R. T. Chen, “Wavelength-division-multiplexing (WDM)-based integrated electronic–photonic switching network (EPSN) for high-speed data processing and transportation,” Nanophotinics 9(15), 4579–4588(2020).
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Z. Liu, X. Wu, H. Xiao, X. Han, W. Chen, M. Liao, T. Zhao, H. Jia, J. Yang, and Y. Tian, “On-chip optical parity checker using silicon photonic integrated circuits,” Nanophotonics 7(12), 1939–1948 (2018).
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Y. Shen, N. C. Harris, S. Skirlo, D. Englund, and M. Soljačić, “Deep learning with coherent nanophotonic circuits,” Nat. Photonics 11(7), 441–446 (2017).
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D. Thomson, A. Zilkie, J. E. Bowers, T. Komlijenovic, G. T. Reed, L. Vivien, D. Marris-Morini, E. Cassan, L. Virot, J. Fédéli, J. Hartmann, J. H. Schmid, D. Xu, F. Boeuf, P. O’Brien, G. Z. Mashanovich, and M. Nedeljkovic, “Roadmap on silicon photonics,” J. Opt 18(7), 073003(2016).
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R. Zhang, Y. He, Y. Zhang, S. An, Q. Zhu, X. Li, and Y. Su, “Ultracompact and low-power-consumption silicon thermo-optic switch for high-speed data,” Nanophotonics 10(2), 937–945 (2021).
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Hosseini, E. S.

J. Sun, E. Timurdogan, A. Yaacobi, E. S. Hosseini, and M. R. Watts, “Large-scale nanophotonic phased array,” Nature 493(7431), 195–199 (2013).
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M. van Niekerk, S. Jahani, J. Bickford, P. Cho, S. Anderson, G. Leake, D. Coleman, M. L. Fanto, C. C. Tison, G. A. Howland, Z. Jacob, and S. F. Preble, “Two-dimensional extreme skin depth engineering for CMOS photonics,” (2020).

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G. T. Reed, G. Z. Mashanovich, F. Y. Gardes, M. Nedeljkovic, Y. Hu, D. J. Thomson, K. Li, P. R. Wilson, S. W. Chen, and S. S. Hsu, “Recent breakthroughs in carrier depletion based silicon optical modulators,” Nanophotonics 3(4-5), 229–245 (2014).
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G. T. Reed, G. Z. Mashanovich, F. Y. Gardes, M. Nedeljkovic, Y. Hu, D. J. Thomson, K. Li, P. R. Wilson, S. W. Chen, and S. S. Hsu, “Recent breakthroughs in carrier depletion based silicon optical modulators,” Nanophotonics 3(4-5), 229–245 (2014).
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M. van Niekerk, S. Jahani, J. Bickford, P. Cho, S. Anderson, G. Leake, D. Coleman, M. L. Fanto, C. C. Tison, G. A. Howland, Z. Jacob, and S. F. Preble, “Two-dimensional extreme skin depth engineering for CMOS photonics,” (2020).

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M. van Niekerk, S. Jahani, J. Bickford, P. Cho, S. Anderson, G. Leake, D. Coleman, M. L. Fanto, C. C. Tison, G. A. Howland, Z. Jacob, and S. F. Preble, “Two-dimensional extreme skin depth engineering for CMOS photonics,” (2020).

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Z. Liu, X. Wu, H. Xiao, X. Han, W. Chen, M. Liao, T. Zhao, H. Jia, J. Yang, and Y. Tian, “On-chip optical parity checker using silicon photonic integrated circuits,” Nanophotonics 7(12), 1939–1948 (2018).
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D. Thomson, A. Zilkie, J. E. Bowers, T. Komlijenovic, G. T. Reed, L. Vivien, D. Marris-Morini, E. Cassan, L. Virot, J. Fédéli, J. Hartmann, J. H. Schmid, D. Xu, F. Boeuf, P. O’Brien, G. Z. Mashanovich, and M. Nedeljkovic, “Roadmap on silicon photonics,” J. Opt 18(7), 073003(2016).
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Kuramochi, E.

Lai, W. C.

S. Chakravarty, X. Chen, N. Tang, W. C. Lai, Y. Zou, H. Yan, and R. T. Chen, “Review of design principles of 2D photonic crystal microcavity biosensors in silicon and their applications,” Front. Optoelectron. 9(2), 206–224 (2016).
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M. van Niekerk, S. Jahani, J. Bickford, P. Cho, S. Anderson, G. Leake, D. Coleman, M. L. Fanto, C. C. Tison, G. A. Howland, Z. Jacob, and S. F. Preble, “Two-dimensional extreme skin depth engineering for CMOS photonics,” (2020).

Leake, G. L.

N. M. Fahrenkopf, C. McDonough, G. L. Leake, Z. Su, E. Timurdogan, and D. D. Coolbaugh, “The AIM Photonics MPW: A Highly Accessible Cutting Edge Technology for Rapid Prototyping of Photonic Integrated Circuits,” IEEE J. Sel. Top. Quantum Electron. 25(5), 1–6 (2019).
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Lepage, G.

Li, K.

G. T. Reed, G. Z. Mashanovich, F. Y. Gardes, M. Nedeljkovic, Y. Hu, D. J. Thomson, K. Li, P. R. Wilson, S. W. Chen, and S. S. Hsu, “Recent breakthroughs in carrier depletion based silicon optical modulators,” Nanophotonics 3(4-5), 229–245 (2014).
[Crossref]

Li, X.

R. Zhang, Y. He, Y. Zhang, S. An, Q. Zhu, X. Li, and Y. Su, “Ultracompact and low-power-consumption silicon thermo-optic switch for high-speed data,” Nanophotonics 10(2), 937–945 (2021).
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D. Yang, X. Liu, X. Li, B. Duan, A. Wang, and Y. Xiao, “Photoic crystal nanobeam cavity devices for on-chip integrated silicon photonics,” J. Semicond 42(2), 023103 (2021).
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Liao, M.

Z. Liu, X. Wu, H. Xiao, X. Han, W. Chen, M. Liao, T. Zhao, H. Jia, J. Yang, and Y. Tian, “On-chip optical parity checker using silicon photonic integrated circuits,” Nanophotonics 7(12), 1939–1948 (2018).
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Liu, X.

D. Yang, X. Liu, X. Li, B. Duan, A. Wang, and Y. Xiao, “Photoic crystal nanobeam cavity devices for on-chip integrated silicon photonics,” J. Semicond 42(2), 023103 (2021).
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Z. Liu, X. Wu, H. Xiao, X. Han, W. Chen, M. Liao, T. Zhao, H. Jia, J. Yang, and Y. Tian, “On-chip optical parity checker using silicon photonic integrated circuits,” Nanophotonics 7(12), 1939–1948 (2018).
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Q. Quan, P. B. Deotare, and M. Loncar, “Photonic crystal nanobeam cavity strongly coupled to the feeding waveguide,” Appl. Phys. Lett. 96(20), 203102 (2010).
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D. Thomson, A. Zilkie, J. E. Bowers, T. Komlijenovic, G. T. Reed, L. Vivien, D. Marris-Morini, E. Cassan, L. Virot, J. Fédéli, J. Hartmann, J. H. Schmid, D. Xu, F. Boeuf, P. O’Brien, G. Z. Mashanovich, and M. Nedeljkovic, “Roadmap on silicon photonics,” J. Opt 18(7), 073003(2016).
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G. T. Reed, G. Mashanovich, F. Y. Gardes, and D. J. Thomson, “Silicon optical modulators,” Nat. Photonics 4(8), 518–526 (2010).
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Mashanovich, G. Z.

D. Thomson, A. Zilkie, J. E. Bowers, T. Komlijenovic, G. T. Reed, L. Vivien, D. Marris-Morini, E. Cassan, L. Virot, J. Fédéli, J. Hartmann, J. H. Schmid, D. Xu, F. Boeuf, P. O’Brien, G. Z. Mashanovich, and M. Nedeljkovic, “Roadmap on silicon photonics,” J. Opt 18(7), 073003(2016).
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G. T. Reed, G. Z. Mashanovich, F. Y. Gardes, M. Nedeljkovic, Y. Hu, D. J. Thomson, K. Li, P. R. Wilson, S. W. Chen, and S. S. Hsu, “Recent breakthroughs in carrier depletion based silicon optical modulators,” Nanophotonics 3(4-5), 229–245 (2014).
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N. M. Fahrenkopf, C. McDonough, G. L. Leake, Z. Su, E. Timurdogan, and D. D. Coolbaugh, “The AIM Photonics MPW: A Highly Accessible Cutting Edge Technology for Rapid Prototyping of Photonic Integrated Circuits,” IEEE J. Sel. Top. Quantum Electron. 25(5), 1–6 (2019).
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K. Vandoorne, P. Mechet, T. Van Vaerenbergh, M. Fiers, G. Morthier, D. Verstraeten, B. Schrauwen, J. Dambre, and P. Bienstman, “Experimental demonstration of reservoir computing on a silicon photonics chip,” Nat. Commun. 5(1), 3541–3546 (2014).
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Morthier, G.

K. Vandoorne, P. Mechet, T. Van Vaerenbergh, M. Fiers, G. Morthier, D. Verstraeten, B. Schrauwen, J. Dambre, and P. Bienstman, “Experimental demonstration of reservoir computing on a silicon photonics chip,” Nat. Commun. 5(1), 3541–3546 (2014).
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D. Thomson, A. Zilkie, J. E. Bowers, T. Komlijenovic, G. T. Reed, L. Vivien, D. Marris-Morini, E. Cassan, L. Virot, J. Fédéli, J. Hartmann, J. H. Schmid, D. Xu, F. Boeuf, P. O’Brien, G. Z. Mashanovich, and M. Nedeljkovic, “Roadmap on silicon photonics,” J. Opt 18(7), 073003(2016).
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G. T. Reed, G. Z. Mashanovich, F. Y. Gardes, M. Nedeljkovic, Y. Hu, D. J. Thomson, K. Li, P. R. Wilson, S. W. Chen, and S. S. Hsu, “Recent breakthroughs in carrier depletion based silicon optical modulators,” Nanophotonics 3(4-5), 229–245 (2014).
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Notomi, M.

Nozaki, K.

O’Brien, P.

D. Thomson, A. Zilkie, J. E. Bowers, T. Komlijenovic, G. T. Reed, L. Vivien, D. Marris-Morini, E. Cassan, L. Virot, J. Fédéli, J. Hartmann, J. H. Schmid, D. Xu, F. Boeuf, P. O’Brien, G. Z. Mashanovich, and M. Nedeljkovic, “Roadmap on silicon photonics,” J. Opt 18(7), 073003(2016).
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Z. Ying, C. Feng, Z. Zhao, J. Gu, R. Soref, D. Pan, and R. T. Chen, “Sequential logic and pipelining in chip-based electronic-photonic digital computing,” IEEE Photonics Journal 12(6), 1–11 (2020).
[Crossref]

Z. Ying, C. Feng, Z. Zhao, R. Soref, D. Pan, and R. T. Chen, “Integrated multi-operand electro-optic logic gates for optical computing,” Appl. Phys. Lett. 115(17), 171104 (2019).
[Crossref]

Pan, D. Z.

C. Feng, Z. Ying, Z. Zhao, J. Gu, D. Z. Pan, and R. T. Chen, “Wavelength-division-multiplexing (WDM)-based integrated electronic–photonic switching network (EPSN) for high-speed data processing and transportation,” Nanophotinics 9(15), 4579–4588(2020).
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Z. Ying, C. Feng, Z. Zhao, S. Dhar, H. Dalir, J. Gu, R. Soref, D. Z. Pan, and R. T. Chen, “Electronic-photonic arithmetic logic unit for high-speed computing,” Nat. Commun. 11(1), 2154–2159 (2020).
[Crossref]

Z. Ying, Z. Wang, Z. Zhao, S. Dhar, D. Z. Pan, R. Soref, and R. T. Chen, “Silicon microdisk-based full adders for optical computing,” Opt. Lett. 43(5), 983–986 (2018).
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Pan, T.

Pantouvaki, M.

Passaro, V. M. N.

R. Soref, F. De Leonardis, Z. Ying, V. M. N. Passaro, and R. T. Chen, “Silicon-Based Group-IV O-E-O Devices for Gain, Logic, and Wavelength Conversion,” ACS Photonics 7(3), 800–811(2020).
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M. van Niekerk, S. Jahani, J. Bickford, P. Cho, S. Anderson, G. Leake, D. Coleman, M. L. Fanto, C. C. Tison, G. A. Howland, Z. Jacob, and S. F. Preble, “Two-dimensional extreme skin depth engineering for CMOS photonics,” (2020).

Qiu, C.

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Q. Quan, P. B. Deotare, and M. Loncar, “Photonic crystal nanobeam cavity strongly coupled to the feeding waveguide,” Appl. Phys. Lett. 96(20), 203102 (2010).
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D. Thomson, A. Zilkie, J. E. Bowers, T. Komlijenovic, G. T. Reed, L. Vivien, D. Marris-Morini, E. Cassan, L. Virot, J. Fédéli, J. Hartmann, J. H. Schmid, D. Xu, F. Boeuf, P. O’Brien, G. Z. Mashanovich, and M. Nedeljkovic, “Roadmap on silicon photonics,” J. Opt 18(7), 073003(2016).
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G. T. Reed, G. Z. Mashanovich, F. Y. Gardes, M. Nedeljkovic, Y. Hu, D. J. Thomson, K. Li, P. R. Wilson, S. W. Chen, and S. S. Hsu, “Recent breakthroughs in carrier depletion based silicon optical modulators,” Nanophotonics 3(4-5), 229–245 (2014).
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G. T. Reed, G. Mashanovich, F. Y. Gardes, and D. J. Thomson, “Silicon optical modulators,” Nat. Photonics 4(8), 518–526 (2010).
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A. Rickman, “The commercialization of silicon photonics,” Nat. Photonics 8(8), 579–582 (2014).
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H. Yan, C. J. Yang, N. Tang, Y. Zou, S. Chakravarty, A. Roth, and R. T. Chen, “Specific Detection of Antibiotics by Silicon-on-Chip Photonic Crystal Biosensor Arrays,” IEEE Sens. J. 17(18), 5915–5919 (2017).
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J. P. Vasco, D. Gerace, K. Seibold, and V. Savona, “Monolithic silicon-based nanobeam cavities for integrated nonlinear and quantum photonics,” Phys. Rev. Appl. 13(3), 034070 (2020).
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D. Thomson, A. Zilkie, J. E. Bowers, T. Komlijenovic, G. T. Reed, L. Vivien, D. Marris-Morini, E. Cassan, L. Virot, J. Fédéli, J. Hartmann, J. H. Schmid, D. Xu, F. Boeuf, P. O’Brien, G. Z. Mashanovich, and M. Nedeljkovic, “Roadmap on silicon photonics,” J. Opt 18(7), 073003(2016).
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K. Vandoorne, P. Mechet, T. Van Vaerenbergh, M. Fiers, G. Morthier, D. Verstraeten, B. Schrauwen, J. Dambre, and P. Bienstman, “Experimental demonstration of reservoir computing on a silicon photonics chip,” Nat. Commun. 5(1), 3541–3546 (2014).
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J. P. Vasco, D. Gerace, K. Seibold, and V. Savona, “Monolithic silicon-based nanobeam cavities for integrated nonlinear and quantum photonics,” Phys. Rev. Appl. 13(3), 034070 (2020).
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E. Timurdogan, C. M. Sorace-Agaskar, J. Sun, E. Shah Hosseini, A. Biberman, and M. R. Watts, “An ultralow power athermal silicon modulator,” Nat. Commun. 5(1), 4008 (2014).
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Shen, Y.

Y. Shen, N. C. Harris, S. Skirlo, D. Englund, and M. Soljačić, “Deep learning with coherent nanophotonic circuits,” Nat. Photonics 11(7), 441–446 (2017).
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Skirlo, S.

Y. Shen, N. C. Harris, S. Skirlo, D. Englund, and M. Soljačić, “Deep learning with coherent nanophotonic circuits,” Nat. Photonics 11(7), 441–446 (2017).
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Y. Shen, N. C. Harris, S. Skirlo, D. Englund, and M. Soljačić, “Deep learning with coherent nanophotonic circuits,” Nat. Photonics 11(7), 441–446 (2017).
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Sorace-Agaskar, C. M.

E. Timurdogan, C. M. Sorace-Agaskar, J. Sun, E. Shah Hosseini, A. Biberman, and M. R. Watts, “An ultralow power athermal silicon modulator,” Nat. Commun. 5(1), 4008 (2014).
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R. Soref, “N x N x Mλ electro-optical nanobeam wavelength-multiplexed cross-connect switches using push-push addressing,” Opt. Express 28(17), 25060 (2020).
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Z. Ying, C. Feng, Z. Zhao, S. Dhar, H. Dalir, J. Gu, R. Soref, D. Z. Pan, and R. T. Chen, “Electronic-photonic arithmetic logic unit for high-speed computing,” Nat. Commun. 11(1), 2154–2159 (2020).
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Z. Ying, C. Feng, Z. Zhao, J. Gu, R. Soref, D. Pan, and R. T. Chen, “Sequential logic and pipelining in chip-based electronic-photonic digital computing,” IEEE Photonics Journal 12(6), 1–11 (2020).
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R. Soref, F. De Leonardis, Z. Ying, V. M. N. Passaro, and R. T. Chen, “Silicon-Based Group-IV O-E-O Devices for Gain, Logic, and Wavelength Conversion,” ACS Photonics 7(3), 800–811(2020).
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Z. Ying, Z. Wang, Z. Zhao, S. Dhar, D. Z. Pan, R. Soref, and R. T. Chen, “Silicon microdisk-based full adders for optical computing,” Opt. Lett. 43(5), 983–986 (2018).
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T. Pan, C. Qiu, J. Wu, X. Jiang, B. Liu, Y. Yang, H. Zhou, R. Soref, and Y. Su, “Analysis of an electro-optic modulator based on a graphene-silicon hybrid 1D photonic crystal nanobeam cavity,” Opt. Express 23(18), 23357 (2015).
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Su, Y.

Su, Z.

N. M. Fahrenkopf, C. McDonough, G. L. Leake, Z. Su, E. Timurdogan, and D. D. Coolbaugh, “The AIM Photonics MPW: A Highly Accessible Cutting Edge Technology for Rapid Prototyping of Photonic Integrated Circuits,” IEEE J. Sel. Top. Quantum Electron. 25(5), 1–6 (2019).
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Sun, J.

E. Timurdogan, C. M. Sorace-Agaskar, J. Sun, E. Shah Hosseini, A. Biberman, and M. R. Watts, “An ultralow power athermal silicon modulator,” Nat. Commun. 5(1), 4008 (2014).
[Crossref]

J. Sun, E. Timurdogan, A. Yaacobi, E. S. Hosseini, and M. R. Watts, “Large-scale nanophotonic phased array,” Nature 493(7431), 195–199 (2013).
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Sweet, J.

Tang, N.

H. Yan, C. J. Yang, N. Tang, Y. Zou, S. Chakravarty, A. Roth, and R. T. Chen, “Specific Detection of Antibiotics by Silicon-on-Chip Photonic Crystal Biosensor Arrays,” IEEE Sens. J. 17(18), 5915–5919 (2017).
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S. Chakravarty, X. Chen, N. Tang, W. C. Lai, Y. Zou, H. Yan, and R. T. Chen, “Review of design principles of 2D photonic crystal microcavity biosensors in silicon and their applications,” Front. Optoelectron. 9(2), 206–224 (2016).
[Crossref]

Thomson, D.

D. Thomson, A. Zilkie, J. E. Bowers, T. Komlijenovic, G. T. Reed, L. Vivien, D. Marris-Morini, E. Cassan, L. Virot, J. Fédéli, J. Hartmann, J. H. Schmid, D. Xu, F. Boeuf, P. O’Brien, G. Z. Mashanovich, and M. Nedeljkovic, “Roadmap on silicon photonics,” J. Opt 18(7), 073003(2016).
[Crossref]

Thomson, D. J.

G. T. Reed, G. Z. Mashanovich, F. Y. Gardes, M. Nedeljkovic, Y. Hu, D. J. Thomson, K. Li, P. R. Wilson, S. W. Chen, and S. S. Hsu, “Recent breakthroughs in carrier depletion based silicon optical modulators,” Nanophotonics 3(4-5), 229–245 (2014).
[Crossref]

G. T. Reed, G. Mashanovich, F. Y. Gardes, and D. J. Thomson, “Silicon optical modulators,” Nat. Photonics 4(8), 518–526 (2010).
[Crossref]

Tian, Y.

Z. Liu, X. Wu, H. Xiao, X. Han, W. Chen, M. Liao, T. Zhao, H. Jia, J. Yang, and Y. Tian, “On-chip optical parity checker using silicon photonic integrated circuits,” Nanophotonics 7(12), 1939–1948 (2018).
[Crossref]

Timurdogan, E.

N. M. Fahrenkopf, C. McDonough, G. L. Leake, Z. Su, E. Timurdogan, and D. D. Coolbaugh, “The AIM Photonics MPW: A Highly Accessible Cutting Edge Technology for Rapid Prototyping of Photonic Integrated Circuits,” IEEE J. Sel. Top. Quantum Electron. 25(5), 1–6 (2019).
[Crossref]

E. Timurdogan, C. M. Sorace-Agaskar, J. Sun, E. Shah Hosseini, A. Biberman, and M. R. Watts, “An ultralow power athermal silicon modulator,” Nat. Commun. 5(1), 4008 (2014).
[Crossref]

J. Sun, E. Timurdogan, A. Yaacobi, E. S. Hosseini, and M. R. Watts, “Large-scale nanophotonic phased array,” Nature 493(7431), 195–199 (2013).
[Crossref]

Tison, C. C.

M. van Niekerk, S. Jahani, J. Bickford, P. Cho, S. Anderson, G. Leake, D. Coleman, M. L. Fanto, C. C. Tison, G. A. Howland, Z. Jacob, and S. F. Preble, “Two-dimensional extreme skin depth engineering for CMOS photonics,” (2020).

Van Campenhout, J.

van Niekerk, M.

M. van Niekerk, S. Jahani, J. Bickford, P. Cho, S. Anderson, G. Leake, D. Coleman, M. L. Fanto, C. C. Tison, G. A. Howland, Z. Jacob, and S. F. Preble, “Two-dimensional extreme skin depth engineering for CMOS photonics,” (2020).

Van Vaerenbergh, T.

K. Vandoorne, P. Mechet, T. Van Vaerenbergh, M. Fiers, G. Morthier, D. Verstraeten, B. Schrauwen, J. Dambre, and P. Bienstman, “Experimental demonstration of reservoir computing on a silicon photonics chip,” Nat. Commun. 5(1), 3541–3546 (2014).
[Crossref]

Vandoorne, K.

K. Vandoorne, P. Mechet, T. Van Vaerenbergh, M. Fiers, G. Morthier, D. Verstraeten, B. Schrauwen, J. Dambre, and P. Bienstman, “Experimental demonstration of reservoir computing on a silicon photonics chip,” Nat. Commun. 5(1), 3541–3546 (2014).
[Crossref]

Vasco, J. P.

J. P. Vasco, D. Gerace, K. Seibold, and V. Savona, “Monolithic silicon-based nanobeam cavities for integrated nonlinear and quantum photonics,” Phys. Rev. Appl. 13(3), 034070 (2020).
[Crossref]

Verheyen, P.

Verstraeten, D.

K. Vandoorne, P. Mechet, T. Van Vaerenbergh, M. Fiers, G. Morthier, D. Verstraeten, B. Schrauwen, J. Dambre, and P. Bienstman, “Experimental demonstration of reservoir computing on a silicon photonics chip,” Nat. Commun. 5(1), 3541–3546 (2014).
[Crossref]

Virot, L.

D. Thomson, A. Zilkie, J. E. Bowers, T. Komlijenovic, G. T. Reed, L. Vivien, D. Marris-Morini, E. Cassan, L. Virot, J. Fédéli, J. Hartmann, J. H. Schmid, D. Xu, F. Boeuf, P. O’Brien, G. Z. Mashanovich, and M. Nedeljkovic, “Roadmap on silicon photonics,” J. Opt 18(7), 073003(2016).
[Crossref]

Vivien, L.

D. Thomson, A. Zilkie, J. E. Bowers, T. Komlijenovic, G. T. Reed, L. Vivien, D. Marris-Morini, E. Cassan, L. Virot, J. Fédéli, J. Hartmann, J. H. Schmid, D. Xu, F. Boeuf, P. O’Brien, G. Z. Mashanovich, and M. Nedeljkovic, “Roadmap on silicon photonics,” J. Opt 18(7), 073003(2016).
[Crossref]

Wang, A.

D. Yang, X. Liu, X. Li, B. Duan, A. Wang, and Y. Xiao, “Photoic crystal nanobeam cavity devices for on-chip integrated silicon photonics,” J. Semicond 42(2), 023103 (2021).
[Crossref]

Wang, Z.

Watts, M. R.

E. Timurdogan, C. M. Sorace-Agaskar, J. Sun, E. Shah Hosseini, A. Biberman, and M. R. Watts, “An ultralow power athermal silicon modulator,” Nat. Commun. 5(1), 4008 (2014).
[Crossref]

J. Sun, E. Timurdogan, A. Yaacobi, E. S. Hosseini, and M. R. Watts, “Large-scale nanophotonic phased array,” Nature 493(7431), 195–199 (2013).
[Crossref]

Wilson, P. R.

G. T. Reed, G. Z. Mashanovich, F. Y. Gardes, M. Nedeljkovic, Y. Hu, D. J. Thomson, K. Li, P. R. Wilson, S. W. Chen, and S. S. Hsu, “Recent breakthroughs in carrier depletion based silicon optical modulators,” Nanophotonics 3(4-5), 229–245 (2014).
[Crossref]

Wu, J.

Wu, X.

Z. Liu, X. Wu, H. Xiao, X. Han, W. Chen, M. Liao, T. Zhao, H. Jia, J. Yang, and Y. Tian, “On-chip optical parity checker using silicon photonic integrated circuits,” Nanophotonics 7(12), 1939–1948 (2018).
[Crossref]

Xiao, H.

Z. Liu, X. Wu, H. Xiao, X. Han, W. Chen, M. Liao, T. Zhao, H. Jia, J. Yang, and Y. Tian, “On-chip optical parity checker using silicon photonic integrated circuits,” Nanophotonics 7(12), 1939–1948 (2018).
[Crossref]

Xiao, Y.

D. Yang, X. Liu, X. Li, B. Duan, A. Wang, and Y. Xiao, “Photoic crystal nanobeam cavity devices for on-chip integrated silicon photonics,” J. Semicond 42(2), 023103 (2021).
[Crossref]

Xu, D.

D. Thomson, A. Zilkie, J. E. Bowers, T. Komlijenovic, G. T. Reed, L. Vivien, D. Marris-Morini, E. Cassan, L. Virot, J. Fédéli, J. Hartmann, J. H. Schmid, D. Xu, F. Boeuf, P. O’Brien, G. Z. Mashanovich, and M. Nedeljkovic, “Roadmap on silicon photonics,” J. Opt 18(7), 073003(2016).
[Crossref]

Yaacobi, A.

J. Sun, E. Timurdogan, A. Yaacobi, E. S. Hosseini, and M. R. Watts, “Large-scale nanophotonic phased array,” Nature 493(7431), 195–199 (2013).
[Crossref]

Yan, H.

H. Yan, C. J. Yang, N. Tang, Y. Zou, S. Chakravarty, A. Roth, and R. T. Chen, “Specific Detection of Antibiotics by Silicon-on-Chip Photonic Crystal Biosensor Arrays,” IEEE Sens. J. 17(18), 5915–5919 (2017).
[Crossref]

S. Chakravarty, X. Chen, N. Tang, W. C. Lai, Y. Zou, H. Yan, and R. T. Chen, “Review of design principles of 2D photonic crystal microcavity biosensors in silicon and their applications,” Front. Optoelectron. 9(2), 206–224 (2016).
[Crossref]

Yang, C. J.

H. Yan, C. J. Yang, N. Tang, Y. Zou, S. Chakravarty, A. Roth, and R. T. Chen, “Specific Detection of Antibiotics by Silicon-on-Chip Photonic Crystal Biosensor Arrays,” IEEE Sens. J. 17(18), 5915–5919 (2017).
[Crossref]

Yang, D.

D. Yang, X. Liu, X. Li, B. Duan, A. Wang, and Y. Xiao, “Photoic crystal nanobeam cavity devices for on-chip integrated silicon photonics,” J. Semicond 42(2), 023103 (2021).
[Crossref]

Yang, J.

Z. Liu, X. Wu, H. Xiao, X. Han, W. Chen, M. Liao, T. Zhao, H. Jia, J. Yang, and Y. Tian, “On-chip optical parity checker using silicon photonic integrated circuits,” Nanophotonics 7(12), 1939–1948 (2018).
[Crossref]

Yang, Y.

Ying, Z.

C. Feng, Z. Ying, Z. Zhao, J. Gu, D. Z. Pan, and R. T. Chen, “Wavelength-division-multiplexing (WDM)-based integrated electronic–photonic switching network (EPSN) for high-speed data processing and transportation,” Nanophotinics 9(15), 4579–4588(2020).
[Crossref]

Z. Ying, C. Feng, Z. Zhao, J. Gu, R. Soref, D. Pan, and R. T. Chen, “Sequential logic and pipelining in chip-based electronic-photonic digital computing,” IEEE Photonics Journal 12(6), 1–11 (2020).
[Crossref]

R. Soref, F. De Leonardis, Z. Ying, V. M. N. Passaro, and R. T. Chen, “Silicon-Based Group-IV O-E-O Devices for Gain, Logic, and Wavelength Conversion,” ACS Photonics 7(3), 800–811(2020).
[Crossref]

Z. Ying, C. Feng, Z. Zhao, S. Dhar, H. Dalir, J. Gu, R. Soref, D. Z. Pan, and R. T. Chen, “Electronic-photonic arithmetic logic unit for high-speed computing,” Nat. Commun. 11(1), 2154–2159 (2020).
[Crossref]

Z. Ying, C. Feng, Z. Zhao, R. Soref, D. Pan, and R. T. Chen, “Integrated multi-operand electro-optic logic gates for optical computing,” Appl. Phys. Lett. 115(17), 171104 (2019).
[Crossref]

Z. Ying, Z. Wang, Z. Zhao, S. Dhar, D. Z. Pan, R. Soref, and R. T. Chen, “Silicon microdisk-based full adders for optical computing,” Opt. Lett. 43(5), 983–986 (2018).
[Crossref]

Yuan, Y.

Zhang, R.

R. Zhang, Y. He, Y. Zhang, S. An, Q. Zhu, X. Li, and Y. Su, “Ultracompact and low-power-consumption silicon thermo-optic switch for high-speed data,” Nanophotonics 10(2), 937–945 (2021).
[Crossref]

Y. Zhang, R. Zhang, Q. Zhu, Y. Yuan, and Y. Su, “Architecture and Devices for Silicon Photonic Switching in Wavelength, Polarization and Mode,” J. Lightwave Technol. 38(2), 215–225 (2020).
[Crossref]

Zhang, Y.

R. Zhang, Y. He, Y. Zhang, S. An, Q. Zhu, X. Li, and Y. Su, “Ultracompact and low-power-consumption silicon thermo-optic switch for high-speed data,” Nanophotonics 10(2), 937–945 (2021).
[Crossref]

Y. Zhang, R. Zhang, Q. Zhu, Y. Yuan, and Y. Su, “Architecture and Devices for Silicon Photonic Switching in Wavelength, Polarization and Mode,” J. Lightwave Technol. 38(2), 215–225 (2020).
[Crossref]

Zhao, T.

Z. Liu, X. Wu, H. Xiao, X. Han, W. Chen, M. Liao, T. Zhao, H. Jia, J. Yang, and Y. Tian, “On-chip optical parity checker using silicon photonic integrated circuits,” Nanophotonics 7(12), 1939–1948 (2018).
[Crossref]

Zhao, Z.

C. Feng, Z. Ying, Z. Zhao, J. Gu, D. Z. Pan, and R. T. Chen, “Wavelength-division-multiplexing (WDM)-based integrated electronic–photonic switching network (EPSN) for high-speed data processing and transportation,” Nanophotinics 9(15), 4579–4588(2020).
[Crossref]

Z. Ying, C. Feng, Z. Zhao, J. Gu, R. Soref, D. Pan, and R. T. Chen, “Sequential logic and pipelining in chip-based electronic-photonic digital computing,” IEEE Photonics Journal 12(6), 1–11 (2020).
[Crossref]

Z. Ying, C. Feng, Z. Zhao, S. Dhar, H. Dalir, J. Gu, R. Soref, D. Z. Pan, and R. T. Chen, “Electronic-photonic arithmetic logic unit for high-speed computing,” Nat. Commun. 11(1), 2154–2159 (2020).
[Crossref]

Z. Ying, C. Feng, Z. Zhao, R. Soref, D. Pan, and R. T. Chen, “Integrated multi-operand electro-optic logic gates for optical computing,” Appl. Phys. Lett. 115(17), 171104 (2019).
[Crossref]

Z. Ying, Z. Wang, Z. Zhao, S. Dhar, D. Z. Pan, R. Soref, and R. T. Chen, “Silicon microdisk-based full adders for optical computing,” Opt. Lett. 43(5), 983–986 (2018).
[Crossref]

Zhou, H.

Zhu, Q.

R. Zhang, Y. He, Y. Zhang, S. An, Q. Zhu, X. Li, and Y. Su, “Ultracompact and low-power-consumption silicon thermo-optic switch for high-speed data,” Nanophotonics 10(2), 937–945 (2021).
[Crossref]

Y. Zhang, R. Zhang, Q. Zhu, Y. Yuan, and Y. Su, “Architecture and Devices for Silicon Photonic Switching in Wavelength, Polarization and Mode,” J. Lightwave Technol. 38(2), 215–225 (2020).
[Crossref]

Zilkie, A.

D. Thomson, A. Zilkie, J. E. Bowers, T. Komlijenovic, G. T. Reed, L. Vivien, D. Marris-Morini, E. Cassan, L. Virot, J. Fédéli, J. Hartmann, J. H. Schmid, D. Xu, F. Boeuf, P. O’Brien, G. Z. Mashanovich, and M. Nedeljkovic, “Roadmap on silicon photonics,” J. Opt 18(7), 073003(2016).
[Crossref]

Zou, Y.

H. Yan, C. J. Yang, N. Tang, Y. Zou, S. Chakravarty, A. Roth, and R. T. Chen, “Specific Detection of Antibiotics by Silicon-on-Chip Photonic Crystal Biosensor Arrays,” IEEE Sens. J. 17(18), 5915–5919 (2017).
[Crossref]

S. Chakravarty, X. Chen, N. Tang, W. C. Lai, Y. Zou, H. Yan, and R. T. Chen, “Review of design principles of 2D photonic crystal microcavity biosensors in silicon and their applications,” Front. Optoelectron. 9(2), 206–224 (2016).
[Crossref]

ACS Photonics (1)

R. Soref, F. De Leonardis, Z. Ying, V. M. N. Passaro, and R. T. Chen, “Silicon-Based Group-IV O-E-O Devices for Gain, Logic, and Wavelength Conversion,” ACS Photonics 7(3), 800–811(2020).
[Crossref]

Appl. Phys. Lett. (2)

Z. Ying, C. Feng, Z. Zhao, R. Soref, D. Pan, and R. T. Chen, “Integrated multi-operand electro-optic logic gates for optical computing,” Appl. Phys. Lett. 115(17), 171104 (2019).
[Crossref]

Q. Quan, P. B. Deotare, and M. Loncar, “Photonic crystal nanobeam cavity strongly coupled to the feeding waveguide,” Appl. Phys. Lett. 96(20), 203102 (2010).
[Crossref]

Front. Optoelectron. (1)

S. Chakravarty, X. Chen, N. Tang, W. C. Lai, Y. Zou, H. Yan, and R. T. Chen, “Review of design principles of 2D photonic crystal microcavity biosensors in silicon and their applications,” Front. Optoelectron. 9(2), 206–224 (2016).
[Crossref]

IEEE J. Sel. Top. Quantum Electron. (1)

N. M. Fahrenkopf, C. McDonough, G. L. Leake, Z. Su, E. Timurdogan, and D. D. Coolbaugh, “The AIM Photonics MPW: A Highly Accessible Cutting Edge Technology for Rapid Prototyping of Photonic Integrated Circuits,” IEEE J. Sel. Top. Quantum Electron. 25(5), 1–6 (2019).
[Crossref]

IEEE Photonics Journal (1)

Z. Ying, C. Feng, Z. Zhao, J. Gu, R. Soref, D. Pan, and R. T. Chen, “Sequential logic and pipelining in chip-based electronic-photonic digital computing,” IEEE Photonics Journal 12(6), 1–11 (2020).
[Crossref]

IEEE Sens. J. (1)

H. Yan, C. J. Yang, N. Tang, Y. Zou, S. Chakravarty, A. Roth, and R. T. Chen, “Specific Detection of Antibiotics by Silicon-on-Chip Photonic Crystal Biosensor Arrays,” IEEE Sens. J. 17(18), 5915–5919 (2017).
[Crossref]

J. Lightwave Technol. (3)

J. Opt (1)

D. Thomson, A. Zilkie, J. E. Bowers, T. Komlijenovic, G. T. Reed, L. Vivien, D. Marris-Morini, E. Cassan, L. Virot, J. Fédéli, J. Hartmann, J. H. Schmid, D. Xu, F. Boeuf, P. O’Brien, G. Z. Mashanovich, and M. Nedeljkovic, “Roadmap on silicon photonics,” J. Opt 18(7), 073003(2016).
[Crossref]

J. Semicond (1)

D. Yang, X. Liu, X. Li, B. Duan, A. Wang, and Y. Xiao, “Photoic crystal nanobeam cavity devices for on-chip integrated silicon photonics,” J. Semicond 42(2), 023103 (2021).
[Crossref]

Nanophotinics (1)

C. Feng, Z. Ying, Z. Zhao, J. Gu, D. Z. Pan, and R. T. Chen, “Wavelength-division-multiplexing (WDM)-based integrated electronic–photonic switching network (EPSN) for high-speed data processing and transportation,” Nanophotinics 9(15), 4579–4588(2020).
[Crossref]

Nanophotonics (3)

R. Zhang, Y. He, Y. Zhang, S. An, Q. Zhu, X. Li, and Y. Su, “Ultracompact and low-power-consumption silicon thermo-optic switch for high-speed data,” Nanophotonics 10(2), 937–945 (2021).
[Crossref]

Z. Liu, X. Wu, H. Xiao, X. Han, W. Chen, M. Liao, T. Zhao, H. Jia, J. Yang, and Y. Tian, “On-chip optical parity checker using silicon photonic integrated circuits,” Nanophotonics 7(12), 1939–1948 (2018).
[Crossref]

G. T. Reed, G. Z. Mashanovich, F. Y. Gardes, M. Nedeljkovic, Y. Hu, D. J. Thomson, K. Li, P. R. Wilson, S. W. Chen, and S. S. Hsu, “Recent breakthroughs in carrier depletion based silicon optical modulators,” Nanophotonics 3(4-5), 229–245 (2014).
[Crossref]

Nat. Commun. (3)

K. Vandoorne, P. Mechet, T. Van Vaerenbergh, M. Fiers, G. Morthier, D. Verstraeten, B. Schrauwen, J. Dambre, and P. Bienstman, “Experimental demonstration of reservoir computing on a silicon photonics chip,” Nat. Commun. 5(1), 3541–3546 (2014).
[Crossref]

E. Timurdogan, C. M. Sorace-Agaskar, J. Sun, E. Shah Hosseini, A. Biberman, and M. R. Watts, “An ultralow power athermal silicon modulator,” Nat. Commun. 5(1), 4008 (2014).
[Crossref]

Z. Ying, C. Feng, Z. Zhao, S. Dhar, H. Dalir, J. Gu, R. Soref, D. Z. Pan, and R. T. Chen, “Electronic-photonic arithmetic logic unit for high-speed computing,” Nat. Commun. 11(1), 2154–2159 (2020).
[Crossref]

Nat. Photonics (3)

A. Rickman, “The commercialization of silicon photonics,” Nat. Photonics 8(8), 579–582 (2014).
[Crossref]

Y. Shen, N. C. Harris, S. Skirlo, D. Englund, and M. Soljačić, “Deep learning with coherent nanophotonic circuits,” Nat. Photonics 11(7), 441–446 (2017).
[Crossref]

G. T. Reed, G. Mashanovich, F. Y. Gardes, and D. J. Thomson, “Silicon optical modulators,” Nat. Photonics 4(8), 518–526 (2010).
[Crossref]

Nature (1)

J. Sun, E. Timurdogan, A. Yaacobi, E. S. Hosseini, and M. R. Watts, “Large-scale nanophotonic phased array,” Nature 493(7431), 195–199 (2013).
[Crossref]

Opt. Express (4)

Opt. Lett. (1)

Phys. Rev. Appl. (1)

J. P. Vasco, D. Gerace, K. Seibold, and V. Savona, “Monolithic silicon-based nanobeam cavities for integrated nonlinear and quantum photonics,” Phys. Rev. Appl. 13(3), 034070 (2020).
[Crossref]

Other (2)

M. van Niekerk, S. Jahani, J. Bickford, P. Cho, S. Anderson, G. Leake, D. Coleman, M. L. Fanto, C. C. Tison, G. A. Howland, Z. Jacob, and S. F. Preble, “Two-dimensional extreme skin depth engineering for CMOS photonics,” (2020).

E. Mounier and J.-L. M. Collaborates, “Silicon Photonics 2018 - Market & Technology Report,” (2018).

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Figures (9)

Fig. 1.
Fig. 1. Top view of proposed EO NB MZI 2 × 2 logic element, many of which form an integrated-photonic logic circuit in the SOI platform.
Fig. 2.
Fig. 2. (a) Schematic diagram of a NB-MZI. (b) Zoom-in diagram of the NB section which consists of two mirror sections and two taper sections. (c) The electric field distribution along the NB section.
Fig. 3.
Fig. 3. The power density profile of Fig. 2 at off-resonance (a) and on-resonance (b) conditions. (c) shows the transmission at the Bar-1 and Cross-1 ports.
Fig. 4.
Fig. 4. Two proposed types of logic gates based on NB MZIs, a gray gate (a) and an orange gate (b). These two gates have slightly different transmission spectra as shown in the insets at various control inputs. As a result, the logic outputs for these gates are exactly the opposite, which can be used in some complementary situations.
Fig. 5.
Fig. 5. Two-operand logic gates achieved by these two types of logic gates.
Fig. 6.
Fig. 6. (a) and (b): N-bit Parity checker based on NB MZIs. (c): N-bit full adder.
Fig. 7.
Fig. 7. (a-d) WDM-based logic gate with different wavelength and port selections. (e) A 3–8 decoder circuit realized by WDM-based logic gates. f: filters.
Fig. 8.
Fig. 8. Two-operand NB MZI logic device constructed to have two independent EO controlled PN-junction “depleters” within each NB cavity region. The inputted electrical digital logic signals are Va and Vb.
Fig. 9.
Fig. 9. OEO optical repeater for regeneration and restoration of optical logic levels in a logic circuit.

Tables (1)

Tables Icon

Table 1. Truth table of a parity checker

Metrics