Abstract

A novel technique for realization of configurable/one-time programmable (OTP) silicon photonic circuits is presented. Once the proposed photonic circuit is programmed, its signal routing is retained without the need for additional power consumption. This technology can potentially enable a multi-purpose design of photonic chips for a range of different applications and performance requirements, as it can be programmed for each specific application after chip fabrication. Therefore, the production costs per chip can be reduced because of the increase in production volume, and rapid prototyping of new photonic circuits is enabled. Essential building blocks for the configurable circuits in the form of erasable directional couplers (DCs) were designed and fabricated, using ion implanted waveguides. We demonstrate permanent switching of optical signals between the drop port and through the port of the DCs using a localized post-fabrication laser annealing process. Proof-of-principle demonstrators in the form of generic 1×4 and 2×2 programmable switching circuits were fabricated and subsequently programmed.

Published by The Optical Society under the terms of the Creative Commons Attribution 4.0 License. Further distribution of this work must maintain attribution to the author(s) and the published article's title, journal citation, and DOI.

1. Introduction

Silicon photonics is regarded as one of the most promising technologies to realize large-scale integration of optical circuits [13]. Due to its capability for high-density integration and low fabrication cost at high volume, silicon photonics is widely used as a high-speed and low-cost solution for short reach interconnects [46]. It is also proposed that silicon photonics can be potentially used in a much wider range of applications, such as sensing and computing [711].

In this paper, we demonstrate a new technology for building configurable or one-time programmable (OTP) silicon photonics circuits, in which the system architecture can be permanently programmed on demand by a post-fabrication, localised laser annealing process. This is analogous to the OTP ROM (read-only memory) or OTP microcontroller chip widely used in electronic industry, where many logic blocks can be “wired” on demand into a desired configuration after device fabrication, in order to suit different applications. We have demonstrated high-efficiency erasable direction couplers (DCs) for silicon photonics circuits, and have used them to construct more sophisticated photonic switching circuits. By utilising this technology, after wafer fabrication, one single silicon photonics chip could be programmed to perform various functions.

The high cost caused by comparatively low production volume has been hindering the commercialisation and expansion of silicon photonics [12]. One major envisaged impact of our proposed technology is to standardise the photonic circuit design for a variety of applications and therefore reduce the cost per chip. One multi-purpose chip can be designed and fabricated with many functional components, and later be programmed for specific applications. Such a photonic chip can then be fabricated in a much larger volume, and the cost for each chip can therefore be reduced by a few orders of magnitude, according to the JePPIX roadmap in 2015 (http://www.jeppix.eu).

For example, there are many subcategories of data communication links in broadband optical communication networks and high-performance computing systems that impose different requirements on the silicon photonics transceivers [13] currently employed, in terms of bandwidth, link distance, power budget, cost per bit etc. In order to meet those requirements, different types of silicon photonic transceivers are available, such as 100G PSM4 (Parallel Single Mode fibre 4-lane) optical transceiver, 4×25G WDM4 (4 channels Wavelength-Division Multiplexing) transceiver, or the more advanced QAM16 (16-ary Quadrature Amplitude Modulation) [14]. Architectures of the silicon photonic transmitter chip that is required for the transceivers in each of these cases are all different. The production volume of each silicon photonic chip is therefore hindered by this market segmentation. However, with the technology demonstrated in this paper, it is now possible to make one single silicon photonic chip design in large volume, and then programme it to suit various applications.

The proposed OTP photonic circuits facilitate deployable and practical programmable circuits for the first time in a format that does not require huge amounts of electrical power to sustain them. Conventional programmable photonic circuits [1528] are attracting a lot of interest recently for computing, microwave photonics, and quantum applications. Most previous programmable or reconfigurable photonic circuits use separate heaters to precisely control the temperature of each switching unit. Therefore, very large numbers of heaters are included in these circuits, leading to large power consumption. This may be necessary to achieve reconfigurable/full programmable photonic circuit. However, those approaches are not practical to achieve OTP photonic circuits, especially when we scale the photonic circuits up to hundreds or thousands of switching units, as most of the power will be used to maintain the operating point of each individual heater, and hence the configuration of the photonic circuits. Free-carrier dispersion effects can also be utilised to realise programmable photonic circuits, however a constant voltage supply is required for each component during operation. Comparatively, our technique involves physically changing the routing of the photonic waveguide, requiring no additional power to retain the configuration when programmed.

In this work, integrated sub-micron erasable waveguides were realized for the first time on a silicon-on-insulator (SOI) platform. The waveguides were formed by ion implantation induced damage, which can be subsequently processed with a localized laser treatment step to repair the crystalline structure. By employing such implanted waveguides, erasable directional couplers have been demonstrated with high coupling efficiency, which form the basic building block of an OTP photonic circuit. As a proof-of-principle demonstration, we successfully realised 1×4 and 2×2 OTP switching circuits on an SOI wafer.

2. Erasable waveguides and directional couplers

Directional couplers (DCs) are one of the most basic elements that can enable a configurable/OTP photonic circuit. Compared to other options for making switches, such as MZIs [29] and ring resonators [16], they can be much smaller in size, and footprint is a major consideration for measuring the cost in the semiconductor industry. Furthermore, the performance of DCs is insensitive to temperature fluctuations [30]. A typical cross section of a proposed device is shown in Fig. 1(a). Implanted waveguides are successfully formed in the slab region of the conventional rib waveguide to couple light in/out, which can be erased by a laser annealing process. The laser annealing setup was the same as presented in our previous work [29].

 figure: Fig. 1.

Fig. 1. Structures of the implanted waveguides (WGs) and DCs. (a) Cross sectional view of the erasable DC with a conventional rib waveguide and an ion implanted waveguide. (b) Simulation result for the Ge implanted process using the Silvaco software, the density of damage to the crystal lattice is shown in the figure. (c) Illustration of the single-stage DC. (d) Illustration of the two-stage DC. Optical microscope images of (e) a fabricated single-stage DC and (f) a two-stage DC on a SOI wafer.

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The ion implantation induced refractive index change was previously utilised to demonstrate wafer-scale testing [31, 32] and post-fabrication trimming applications [29, 3335]. However, for those works, the optical modes were guided in conventional etched silicon waveguides. No integrated waveguide has been demonstrated in silicon photonics, which is formed solely by an ion implantation process. The depth of the implanted waveguide is 140 nm into the silicon layer according to our calculation [Fig. 1(b)]. Two types of DCs were designed and fabricated, as shown in Fig. 1(c) (single-stage DC) and Fig. 1(d) (two-stage DC). Optical microscope images of a typical fabricated single-stage DC and two-stage DC are shown in Fig. 1(e) and Fig. 1(f), respectively. For the ion implantation process, we have chosen only to consider ion species that are CMOS compatible. Furthermore, light ion species, such as hydrogen and oxygen, would require very high doses to induce enough defects in order to create amorphous silicon. We also want to avoid those ion species that may induce additional free carriers after laser annealing, such as boron. Therefore, Silicon itself would be a good candidate for implantation as it causes no doping or contamination. Germanium is even better as it is also a Group IV element, but is heavier than Silicon, causing more damage per ion, and hence minimising the implantation dose. Therefore Ge ions were used for our work [29].

A variational FDTD solver from Lumerical MODE solutions was employed to calculate the performance of the DC designs at a wavelength of 1550 nm. A 10 nm mesh size around the waveguide core was used in our calculations. The real part of the refractive index of the implanted silicon is approximately 3.96 yielding a Δn of 0.48, which is in good agreement with the expected Δn from the literature at a wavelength of 1.55 μm. The imaginary part of the refractive index of the Ge implanted Si is calculated to be 0.00085. This is calculated based on the 33 dB/mm propagation loss experimentally measured for the ion implanted waveguides. The profile of the implantation damage density in silicon is calculated by Silvaco software.

A single-stage DC consists of a 500 nm wide conventional input waveguide, a straight implanted waveguide for light coupling, an S-bend made of an implanted waveguide and a conventional output waveguide [Fig. 1(c)]. 500 nm is a common width for conventional single-mode silicon photonic waveguides (at 1550 nm wavelength) on a 220 nm SOI platform. According to our previous measurement results, this choice of waveguide width represents a good trade-off between the single-mode condition and the propagation loss. The length of the straight implanted waveguide is defined as the coupling length Lc. The S-bend is in the shape of a sinusoidal curve of 45 μm in length and 20 μm in displacement as shown in Fig. 1(e). Approximately 93% (-0.32 dB) coupling efficiency can be achieved according to our simulation results for a coupling length of 8 μm and an ion implanted width of 540 nm, and a 200 nm wide (edge-to-edge) gap between the conventional and implanted waveguide. A two-stage DC, as shown in Fig. 1(d), consists of a conventional input waveguide, a straight ion implanted waveguide for coupling the light and transferring it to another conventional waveguide coupling to the drop port. The gap between the input waveguide and the implanted waveguide is the same as the gap between the implanted waveguide and the output waveguide to the drop port. Our simulations suggest that a coupling efficiency of over 95% (-0.22 dB) is achievable for such two-stage coupling structures with a 200 nm gap, a 15 μm coupling length and a width of 560 nm for the implanted waveguide. For both DCs, 200 nm is the minimum achievable trench width using our DUV lithography scanner. The implantation width was also optimized by simulations. Furthermore, DCs with various widths of the implanted waveguide were fabricated and tested, and the above mentioned designs achieved the best efficiency. The simulation result for this two-stage DC is shown in Fig. 2. The calculated effective index for the optical mode is 2.61 for the convention silicon waveguide, and is 2.79 for implanted waveguide.

 figure: Fig. 2.

Fig. 2. (a) Calculated fundamental optical mode for the 500 nm wide silicon waveguide. (b) Calculated fundamental optical mode for the 560 nm wide germanium implanted silicon waveguide. (c) Top view of the simulation result for the optimized two-stage directional coupler.

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In our simulation, we defined a step-index profile for the implanted waveguide, where the refractive index is 3.96 in the implanted region and then changed to crystal silicon (3.48 for 1550 nm wavelength) outside the implanted region. The width of the implanted region was defined by considering the region with over 80% crystal lattice displacement, which is 30 nm wider than the actual opening of the implantation mask at each edge according to our calculations, as illustrated in Fig. 1(b).

All devices were fabricated on an SOI platform, with a 220 nm top silicon layer and a 2 μm thick buried oxide (BOX) layer [Fig. 1(a)]. Conventional 500 nm wide SOI rib waveguides were formed by a 70 nm partial etch (leaving a 150 nm thick silicon slab layer) to support only single-mode propagation, which is typically used for silicon photonic circuits. The conventional waveguides were fabricated by electron beam lithography and a plasma etching process. A 25 nm thick oxide layer was then deposited by Plasma-Enhanced Chemical Deposition (PECVD) as a protective layer. After this fabrication step, a 400 nm thick photoresist layer was deposited as a mask layer for Ge ion implantation. An ion energy and fluence of 130 keV and 1 × 1015 ions/cm2 were used, respectively. The implanted waveguides were then formed in the slab layer next to the conventional waveguide.

The propagation loss of germanium ion implanted waveguides with various widths were first characterised using the cut-back method. For each width, implanted waveguides with different lengths were fabricated and characterised. Grating couplers and conventional waveguides were employed as optical input/output, which were butt-coupled (direct end-to-end connection) with the implanted waveguides. Experimental results are shown in Fig. 3. A linear dotted line was fitted to each device group measured, and the function equations shown in the figure in the corresponding order. According to our measured results, the average propagation loss of the implanted waveguides are 28 dB/mm, 32.6 dB/mm, 32.4 dB/mm and 33.5 dB/mm for the 360 nm, 560 nm, 760 nm and 960 nm widths, respectively. This loss is very high compared to conventional waveguides. However, only a short section of implanted waveguide (∼10 μm) is needed for each switching device, corresponding to a total propagation loss of only 0.3 dB. The loss may be further reduced by optimising the implantation dose or device design. The average transition loss between conventional and implanted waveguides is approximately 0.9 dB. We believe that this loss is mainly caused by absorption within the implanted silicon. The loss is therefore lower for narrower waveguides as more optical power will propagate in the low-loss crystal silicon slab surrounding the implanted waveguide. The propagation loss increases with waveguide width as more light will be guided in the waveguide core of the implanted silicon.

 figure: Fig. 3.

Fig. 3. Measured propagation losses of the implanted waveguides. A linear dotted line was fitted to each device group measured. Each device group includes waveguides from the same silicon chip. The corresponding function equations are shown in the figure. The width of the implanted waveguides are: (a) 360 nm, (b) 560 nm, (c) 760 nm, and (d) 960 nm.

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For all measurements, the optical transmissions were normalised to the fibre-to-fibre optical loss of a reference waveguide in each case, which consists of only the grating coupler at the input and output, and a conventional waveguide with the same length as that was used for coupling light to the implanted waveguides or the photonics devices. For the fabricated devices, each grating coupler has an insertion loss of approximately 4 dB, and the propagation loss of the conventional waveguide is approximately 3 dB/cm. Only the fundamental TE mode is coupled to the waveguides. When characterizing the single-stage DCs, the additional propagation loss in the S-bend and the transition loss to conventional waveguide were deducted.

The measured results of single-stage DCs and two-stage DCs are plotted in Fig. 4(a) and Fig. 4(b), respectively. Over 80% coupling efficiency was experimentally obtained for a coupling length of around 6 μm for the single-stage DCs. Calculated results are plotted as a reference. Over 90% coupling efficiency was obtained for coupling lengths around 12 μm for the two-stage DCs. It worth noting that in the case of a single-stage DC, the power coming out from the drop and through port will ideally sum up to about 100% of the input optical power, in the absence of any waveguide propagation loss. However, it is not the same case for a two-stage DC. As shown in Fig. 4(b) and the calculated optical field pattern in Fig. 2(c), during the coupling process from the bottom input waveguide to the upper output waveguide, light needs to pass through the ion implanted waveguide in the middle. In this ion implanted waveguide, if there is any part of optical power left when reaching the end of the waveguide, this part of optical power will be eventually scattered leading to additional optical loss.

 figure: Fig. 4.

Fig. 4. Measured optical transmission of the: (a) single-stage DCs with various coupling lengths, and (b) two-stage DCs with various coupling lengths. Simulated results (dotted line), with a step-index profile assumed for the implanted waveguides, are plotted as a reference. (c) SEM image of a typical opening in the implantation mask after Ge ion implantation. The original designed width of the opening is 500 nm (marked in yellow). However, the width was increased to around 620 - 660 nm after ion implantation.

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Compared to our initial simulation results, we found that the measured coupling lengths were shorter for both types of DCs. Such reduction of the coupling length is most likely caused by an increased overlap of the optical mode in the two coupled waveguides, which means that the actual optical mode in the implanted waveguide is wider than the optical mode used in our simulations. We noticed through SEM measurements that the E-beam resist, which was used as the implantation mask, shrank during the implantation process as shown in Fig. 4(c). A 500 nm wide opening developed for Ge implantation was increased to around 620 nm - 660 nm in width after implantation according to our measurement. This will lead to a wider implanted waveguide with a graded index profile, and therefore a reduced coupling length as we measured. Our simulation results were adjusted accordingly, and plotted in Figs. 4(a) and 4(b). For example, we increased the width of the step-index implanted waveguide from 540 nm to 680 nm (70 nm added each side) for the single-stage DCs, and slightly reduced the refractive index of waveguide core from 3.96 to 3.92, in order to approximate the graded-index profile actually created by the Ge implantation because of the shrinking mask. The shrinkage of the resist layer could be caused by the heat induced by the ion implantation process. Replacing the resist-based implantation mask with a hard mask would eliminate this uncertainty in the fabrication process.

An OTP optical switch was demonstrated by localized laser annealing of a two-stage DC, which is the most basic component for photonic programmable circuits. An illustration of the localized laser annealing process is shown in Fig. 5(a). The implanted waveguide was annealed by a focused laser spot in a step by step fashion, in order to maximize the coupling efficiency to the drop port with an optimum coupling length Lc. The raster scan step of the laser was 1 µm, to ensure uniform coverage of the area. Light propagating through the device will be mostly guided to the through port when the implanted waveguide is annealed completely (Lc = 0). After annealing, the implanted silicon was almost completely recrystallized, which was confirmed by Raman spectroscopy measurements. We estimate the residual index differences (both the real and imaginary parts) between crystalline silicon and the implanted silicon after recrystallization are negligible, as the peak germanium concentration in the silicon is less than 0.3% after implantation according to our simulations. We did not detect any difference in performance between the annealed silicon and the original crystal silicon during our experimental characterization of the photonic devices.

 figure: Fig. 5.

Fig. 5. (a) Illustration of the laser annealing process for the two-stage DCs. (b) Measured results for the two-stage DCs with various coupling lengths after laser annealing. The original coupling length for the directional couplers used for this test are 20 μm. Simulation results (dotted line) were plotted as a reference.

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A continuous wave (CW) Argon ion laser was used for the annealing process. The laser output signal is a mix of all lasing lines in the argon ion spectrum, dominated by 488 nm and 514.5 nm in almost equal parts. CW laser-based annealing has been shown to produce larger silicon crystal grain sizes with fewer defects than those obtained by pulsed laser source systems, resulting in a qualitative improvement in the crystallization of the amorphous silicon for enhanced material quality [36, 37]. This has been attributed to the lower cooling rate after laser irradiation from continuous wave sources. The laser beam was guided to the surface of the silicon chip in a controlled and precise manner. A half wave plate and a polarization beam cube splitter were used to adjust the laser power. The laser beam was focused onto the chip surface using a 20× microscope objective lens, which produced a spot size of approximately 2 µm in diameter. The launched laser power was 45 mW for annealing experiments. The sample was scanned under the laser beam using a set of linear micro-precision stages whilst a pellicle beam splitter and a CCD camera were used for imaging and control. The laser scanning speed was 10 μm/s. The laser spot was aligned by visual referencing to an alignment mark. Such a visual system can typically achieve an accuracy of 0.5 µm [29]. More importantly, the accuracy of the step movement of the laser spot can be as good as 0.1 µm (such as the stepper motor NRT100/M from Thorlabs).

The experimental results of the laser annealing test for the two-stage DCs are plotted in Fig. 5(b). For all the DCs measured in this experiment, the original coupling lengths (before annealing) were 20 µm. Several devices were characterised with various lengths of the implanted waveguide left unannealed (coupling length Lc). The measured results are in good agreement with our simulation results. A coupling efficiency of 89% (-0.5 dB) is achieved with a coupling length of approximately 11 or 12 µm, with an average residual transmission of 5% (-13 dB) to the through port. When the implanted waveguide is fully annealed, there is approximately 3% (-15 dB) cross coupling to the drop port, with 97% (-0.13 dB) transmission in the through port. For the above mentioned DCs, we only experimentally demonstrated one-time on-off switching, which is targeted for OTP burn-in photonic device. However, it is possible to switch the device on and off a few more times with a longer implanted waveguide section (and hence multiple coupling lengths), which will meanwhile induce a slightly higher insertion loss.

3. Demonstration of OTP photonics circuits

Based on the permanent programming of the optical coupling described previously, we have demonstrated 1×4 and 2×2 OTP switching circuits as proof-of-principle demonstrations of the OTP photonic circuit implemented with our proposed technology. The microscopic images of the switching circuits are shown in Figs. 6(a) and 6(b).

The 1×4 switching circuit comprises three two-stage DCs in series. The drop ports of those DCs lead to outputs P1, P2, and P3, respectively. The through port leads to output P4. After device fabrication, the optical signal can be permanently programmed to output at any of the four output ports, depending on the specific requirements arising from the application. For the fabricated device, the coupling length was designed to be 13 µm for all of the DCs. This coupling length is not yet optimised to the best efficiency to the drop port. Therefore, we need to anneal the coupling length to 11.5 µm to maximize the coupling efficiency, as suggested by the previous results [Fig. 5(b)]. This optimal coupling length can be directly fabricated in the future, then the initial annealing step can be avoided.

The algorithm for programming the output to port P1 is simply trimming the first DC to its maximum coupling efficiency to the drop port. The measured results for all the four output ports are shown in Fig. 6(c). The transmission is about -0.5 dB for P1, which matches well with our previous results for the discrete two-stage DC devices. The crosstalk to P2 is -14.4 dB at 1550 nm wavelength, as plotted in the figure. For programming the output to port P2, we annealed the whole implanted waveguide for the first DC, and then annealed the coupling length to 11.5 µm for the second DC to optimise its coupling efficiency to P2. As shown in Fig. 6(d), the transmission to P2 is approximately -0.8 dB, which includes a 0.13 dB residual coupling loss at the first DC and a 0.5 dB loss while coupling to the drop port at the second DC. There is a 0.17 dB discrepancy between the expected loss values and the measured result at 1550 nm, which could be attributed to the measurement uncertainty and the imperfections associated with the fabrication process. Similarly, we can programme the output to port P3 and P4 by optimizing the coupling efficiency of the third DC, or anneal all the three DCs by laser annealing, respectively. The measured results in these cases are plotted in Fig. 6(e) and Fig. 6(f).

 figure: Fig. 6.

Fig. 6. (a) Optical microscope images of a 1×4 programmable photonic switching circuit and (b) a 2×2 photonic switching circuit. Measurement results for the photonic switching circuits. The 1×4 photonic switching circuit was programmed by laser annealing to produce an output at one of the four ports sequentially (c, d, e and f). (c) Measured results when P1 is set to be the output port. (d) Measured results when P2 is set to be the output port. (e) Measured results when P3 is set to be the output port. (f) Measured results when P4 is set to be the output port. The 2×2 switching circuit was programmed to operate in two modes by laser annealing: (g) cross-coupling modes or, (h) through-coupling mode.

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The 2×2 OTP switching circuit is comprised of a 2×2 array of two-stage DCs arranged in a pattern as shown in Fig. 6(b) to enable cross coupling between two signal paths. There are two signal inputs T1, T2 and two outputs P1, P2. Although a simple 2×2 switch can be made using the two outputs and inputs of a single DC, our design with the 2×2 array of DCs can offer a much lower crosstalk [38] and more functionality. After device fabrication, the optical signal can be permanently programmed into two operating modes: a cross-coupling mode and a through-coupling mode, depending on the requirements arising from the applications.

When all the DCs are operating at the optimum coupling point to the drop port (with Lc = 11. 5 µm), the 2×2 switching circuit is operating in cross-coupling mode. The optical signal inserted in T1 will be coupled to a bridging waveguide (conventional shallow-etched waveguide) at the first DC, and then coupled over to P2 at the next DC. Similarly, the optical signal inserted in T2 will be coupled to P1. The measured results are shown in Fig. 6(g). The transmission losses of T1-P2 and T2-P1 channel are about 2.3 dB on average, which includes approximately 0.5 dB insertion loss at each two-stage DCs in addition to the insertion loss of the waveguide cross in the middle of the bridging waveguide. The loss of the waveguide cross was characterised to be 0.6 dB with separate testing structures. However, this loss figure can be potentially improved to 0.16 dB with a better design [3941]. There is -20.6 dB crosstalk at 1550 nm according to the measurement results for both transmission channels, corresponding to an -18.3 dB crosstalk [Fig. 6(g)].

When all the implanted waveguides of the two-stage DCs are annealed by the laser, the 2×2 switching circuit is working in a through-coupling mode, when the light signals can go straight through the two DCs at each side from T1 to P1, or from T2 to P2. The measured results are shown in Fig. 6(h). The transmission of both channels (T1-P1 and T2-P2) is around -0.2 dB on average, which is also expected due to the insertion loss of the two fully annealed DCs. The crosstalk in this through-coupling mode is approximately -23.1 dB.

4. Discussion and conclusion

More generic photonic programmable circuits can also be built based on more advanced algorithms [2023]. For most applications, energy consumption is one of the key metrics for photonic devices. Previously demonstrated integrated linear photonic circuits require constant power to maintain each switching component, and the power consumption will grow exponentially with the number of inputs and outputs the linear circuit has. Comparatively, the technology proposed here requires no additional power after it has been programmed into the target configuration, making it a potentially key technology that enables low cost and low power consumption silicon photonic devices.

In order to successfully implement the proposed technology, additional processing steps (ion implantation and laser annealing) are required, which add to process complexity. Ion implantation is a CMOS compatible process which is widely available in semiconductor fabrication facilities, and modification for Germanium implantation is feasible, but not yet commonplace. The additional costs associated with this implantation process, once implemented for Germanium, are not significant, compared with the tens of fabrication steps usually required for separate production process of a series of different silicon photonics chips, each for a different application. The laser annealing process can be implemented at both wafer and chip scale using a machine similar to the those widely used for automated testing of photonic devices and circuits, in research laboratories and commercial foundries. By employing a 3-axis positioning stage, it is possible to accurately position optical probe and fibre arrays to specific locations of the chip. Therefore, it is possible to deliver the annealing laser power with a standard optical fibre and illuminate the top silicon surface. Our annealing system can achieve an accuracy of about 0.5 μm [29] for positioning the laser spot. Should higher accuracy is required, an active feed-back system can be implemented [35] to control the laser spot movement. Furthermore, it is also possible to use an electrical heater to realise localised electrical annealing [42] instead of the laser. Hence, the additional cost to implement our proposed technology can be minimized.

In summary, the essential building blocks, in the form of a single-stage and two-stage DCs, were designed and fabricated for configurable/OTP silicon photonic circuits. By using waveguides formed by ion implantation induced damage, the output light can be switched permanently between the drop port and through port by a localised laser annealing process. Approximately 89% (-0.5 dB) and 97% (-0.13 dB) coupling efficiency was experimentally demonstrated while coupling to the drop port and through port, respectively, for a two-stage DC. Further reduction of the transmission loss of the DCs is possible if we can reduce the coupling length and implantation dose, in order to reduce the optical absorption due to the defect states, whilst keeping the high coupling efficiency. 1×4 and 2×2 OTP switching circuits were fabricated and characterized as proof-of-principle demonstrations. The circuits have been successfully programed using laser annealing to operate in all the possible configurations. It is possible to achieve a transmission of better than -1 dB for all the channels with an improved waveguide propagation and crossing loss.

Funding

Engineering and Physical Sciences Research Council (EP/L00044X/1, EP/L021129/1, EP/M022757/1, EP/N013247/1).

Acknowledgments

Reed is a Royal Society Wolfson Research Merit Award holder. He is grateful to the Wolfson Foundation and the Royal Society for funding of the award. Thomson acknowledges funding from the Royal Society for his University Research Fellowship. Yu acknowledges funding from the Scholarship Council of China.

Disclosures

The authors declare that there are no conflicts of interest related to this article.

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12. T. Baehr-Jones, T. Pinguet, P. Lo Guo-Qiang, S. Danziger, D. Prather, and M. Hochberg, “Myths and rumours of silicon photonics,” Nat. Photonics 6(4), 206–208 (2012). [CrossRef]  

13. Y. A. Vlasov, “Silicon cmos-integrated nano-photonics for computer and data communications beyond 100G,” IEEE Commun. Mag. 50(2), s67–s72 (2012). [CrossRef]  

14. P. Dong, X. Liu, S. Chandrasekhar, L. L. Buhl, R. Aroca, and Y. K. Chen, “Monolithic silicon photonic integrated circuits for compact 100+ Gb/s coherent optical receivers and transmitters,” IEEE J. Sel. Top. Quantum Electron. 20(4), 150–157 (2014). [CrossRef]  

15. V. R. Almeida, C. A. Barrios, R. R. Panepucci, and M. Lipson, “All-optical control of light on a silicon chip,” Nature 431(7012), 1081–1084 (2004). [CrossRef]  

16. Q. F. Xu and M. Lipson, “All-optical logic based on silicon micro-ring resonators,” Opt. Express 15(3), 924–929 (2007). [CrossRef]  

17. Y. Vlasov, W. M. J. Green, and F. Xia, “High-throughput silicon nanophotonic wavelength-insensitive switch for on-chip optical networks,” Nat. Photonics 2(4), 242–246 (2008). [CrossRef]  

18. S. Nakamura, S. Takahashi, M. Sakauchi, T. Hino, M. B. Yu, and G. Q. Lo, “Wavelength selective switching with one-chip silicon photonic circuit including 8 × 8 matrix switch,” Optical Fiber Communication Conference and Exposition (OFC/NFOEC) and the National Fiber Optic Engineers Conference (Optical Society of America, 2011), paper OTuM2.

19. D. A. B. Miller, “Perfect optics with imperfect components,” Optica 2(8), 747–750 (2015). [CrossRef]  

20. D. Perez, I. Gasulla, L. Crudgington, D. J. Thomson, A. Z. Khokhar, K. Li, W. Cao, G. Z. Mashanovich, and J. Capmany, “Multipurpose silicon photonics signal processor core,” Nat. Commun. 8(1), 636 (2017). [CrossRef]  

21. J. Carolan, C. Harrold, C. Sparrow, E. Martin-Lopez, N. J. Russell, J. W. Silverstone, P. J. Shadbolt, N. Matsuda, M. Oguma, M. Itoh, G. D. Marshall, M. G. Thompson, J. C. F. Matthews, T. Hashimoto, J. L. O’Brien, and A. Laing, “Universal linear optics,” Science 349(6249), 711–716 (2015). [CrossRef]  

22. A. Ribeiro, A. Ruocco, L. Vanacker, and W. Bogaerts, “Demonstration of a 4 ( 4-port universal linear circuit,” Optica 3(12), 1348–1357 (2016). [CrossRef]  

23. M. Reck, A. Zeilinger, H. J. Bernstein, and P. Bertani, “Experimental realization of any discrete unitary operator,” Phys. Rev. Lett. 73(1), 58–61 (1994). [CrossRef]  

24. L. M. Zhuang, C. G. H. Roeloffzen, M. Hoekman, K. J. Boller, and A. J. Lowery, “Programmable photonic signal processor chip for radiofrequency applications,” Optica 2(10), 854–859 (2015). [CrossRef]  

25. J. Capmany, I. Gasulla, and D. Perez, “Microwave photonics the programmable processor,” Nat. Photonics 10(1), 6–8 (2016). [CrossRef]  

26. N. C. Harris, G. R. Steinbrecher, M. Prabhu, Y. Lahini, J. Mower, D. Bunandar, C. C. Chen, F. N. C. Wong, T. Baehr-Jones, M. Hochberg, S. Lloyd, and D. Englund, “Quantum transport simulations in a programmable nanophotonic processor,” Nat. Photonics 11(7), 447–452 (2017). [CrossRef]  

27. Y. C. Shen, N. C. Harris, S. Skirlo, M. Prabhu, T. Baehr-Jones, M. Hochberg, X. Sun, S. J. Zhao, H. Larochelle, D. Englund, and M. Soljacic, “Deep learning with coherent nanophotonic circuits,” Nat. Photonics 11(7), 441–446 (2017). [CrossRef]  

28. S. T. Chen, Y. C. Shi, S. L. He, and D. X. Dai, “Compact eight-channel thermally reconfigurable optical add/drop multiplexers on silicon,” IEEE Photonics Technol. Lett. 28(17), 1874–1877 (2016). [CrossRef]  

29. X. Chen, M. M. Milosevic, D. J. Thomson, A. Z. Khokhar, Y. Franz, A. F. J. Runge, S. Mailis, A. C. Peacock, and G. T. Reed, “Post-fabrication phase trimming of mach-zehnder interferometers by laser annealing of germanium implanted waveguides,” Photonics Res. 5(6), 578–582 (2017). [CrossRef]  

30. H. Morino, T. Maruyama, and K. Iiyama, “Reduction of wavelength dependence of coupling characteristics using si optical waveguide curved directional coupler,” J. Lightwave Technol. 32(12), 2188–2192 (2014). [CrossRef]  

31. R. Topley, G. Martinez-Jimenez, L. O’Faolain, N. Healy, S. Mailis, D. J. Thomson, F. Y. Gardes, A. C. Peacock, D. N. R. Payne, G. Z. Mashanovich, and G. T. Reed, “Locally erasable couplers for optical device testing in silicon on insulator,” J. Lightwave Technol. 32(12), 2248–2253 (2014). [CrossRef]  

32. R. Topley, L. O’Faolain, D. J. Thomson, F. Y. Gardes, G. Z. Mashanovich, and G. T. Reed, “Planar surface implanted diffractive grating couplers in soi,” Opt. Express 22(1), 1077–1084 (2014). [CrossRef]  

33. J. J. Ackert, J. K. Doylend, D. F. Logan, P. E. Jessop, R. Vafaei, L. Chrostowski, and A. P. Knights, “Defect-mediated resonance shift of silicon-on-insulator racetrack resonators,” Opt. Express 19(13), 11969–11976 (2011). [CrossRef]  

34. M. M. Milosevic, X. Chen, W. Cao, A. F. J. Runge, Y. Franz, C. G. Littlejohns, S. Mailis, A. C. Peacock, D. J. Thomson, and G. T. Reed, “Ion implantation in silicon for trimming the operating wavelength of ring resonators,” IEEE J. Sel. Top. Quantum Electron. 24(4), 1–7 (2018). [CrossRef]  

35. B. G. Chen, X. S. Yu, X. Chen, M. M. Milosevic, D. J. Thomson, A. Z. Khokhar, S. Saito, O. L. Muskens, and G. T. Reed, “Real-time monitoring and gradient feedback enable accurate trimming of ion-implanted silicon photonic devices,” Opt. Express 26(19), 24953–24963 (2018). [CrossRef]  

36. K. Kitahara, Y. Ohashi, Y. Katoh, A. Hara, and N. Sasaki, “Submicron-scale characterization of poly-si thin films crystallized by excimer laser and continuous-wave laser,” J. Appl. Phys. 95(12), 7850–7855 (2004). [CrossRef]  

37. M. M. Milosevic, X. Chen, X. Yu, N. Dinsdale, O. Aktas, S. Z. Oo, A. Z. Khokhar, D. J. Thompson, O. Muskens, H. M. H. Chong, A. C. Peacock, S. Saito, and G. T. Reed, “Ion implantation of germanium into silicon for critical coupling control of racetrack resonators,” J. Lightwave Technol. 38(7), 1865–1873 (2020). [CrossRef]  

38. Y. Shoji, K. Kintaka, S. Suda, H. Kawashima, T. Hasama, and H. Ishikawa, “Low-crosstalk 2 ( 2 thermo-optic switch with silicon wire waveguides,” Opt. Express 18(9), 9071–9075 (2010). [CrossRef]  

39. W. Bogaerts, P. Dumon, D. Van Thourhout, and R. Baets, “Low-loss, low-cross-talk crossings for silicon-on-insulator nanophotonic waveguides,” Opt. Lett. 32(19), 2801–2803 (2007). [CrossRef]  

40. P. Sanchis, J. V. Galan, A. Griol, J. Marti, M. A. Piqueras, and J. M. Perdigues, “Low-crosstalk in silicon-on-insulator waveguide crossings with optimized-angle,” IEEE Photonics Technol. Lett. 19(20), 1583–1585 (2007). [CrossRef]  

41. P. Sanchis, P. Villalba, F. Cuesta, A. Hakansson, A. Griol, J. V. Galan, A. Brimont, and J. Marti, “Highly efficient crossing structure for silicon-on-insulator waveguides,” Opt. Lett. 34(18), 2760–2762 (2009). [CrossRef]  

42. X. Yu, X. Chen, M. M. Milosevic, X. Yan, S. Saito, and G. T. Reed, “Ion implantation and electrical annealing for trimming silicon mzis and facilitating one-time programmable photonic circuits,” in IEEE 16th International Conference on Group IV Photonics (GFP) (IEEE, 2019), pp. 1–2.

References

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  13. Y. A. Vlasov, “Silicon cmos-integrated nano-photonics for computer and data communications beyond 100G,” IEEE Commun. Mag. 50(2), s67–s72 (2012).
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  14. P. Dong, X. Liu, S. Chandrasekhar, L. L. Buhl, R. Aroca, and Y. K. Chen, “Monolithic silicon photonic integrated circuits for compact 100+ Gb/s coherent optical receivers and transmitters,” IEEE J. Sel. Top. Quantum Electron. 20(4), 150–157 (2014).
    [Crossref]
  15. V. R. Almeida, C. A. Barrios, R. R. Panepucci, and M. Lipson, “All-optical control of light on a silicon chip,” Nature 431(7012), 1081–1084 (2004).
    [Crossref]
  16. Q. F. Xu and M. Lipson, “All-optical logic based on silicon micro-ring resonators,” Opt. Express 15(3), 924–929 (2007).
    [Crossref]
  17. Y. Vlasov, W. M. J. Green, and F. Xia, “High-throughput silicon nanophotonic wavelength-insensitive switch for on-chip optical networks,” Nat. Photonics 2(4), 242–246 (2008).
    [Crossref]
  18. S. Nakamura, S. Takahashi, M. Sakauchi, T. Hino, M. B. Yu, and G. Q. Lo, “Wavelength selective switching with one-chip silicon photonic circuit including 8 × 8 matrix switch,” Optical Fiber Communication Conference and Exposition (OFC/NFOEC) and the National Fiber Optic Engineers Conference (Optical Society of America, 2011), paper OTuM2.
  19. D. A. B. Miller, “Perfect optics with imperfect components,” Optica 2(8), 747–750 (2015).
    [Crossref]
  20. D. Perez, I. Gasulla, L. Crudgington, D. J. Thomson, A. Z. Khokhar, K. Li, W. Cao, G. Z. Mashanovich, and J. Capmany, “Multipurpose silicon photonics signal processor core,” Nat. Commun. 8(1), 636 (2017).
    [Crossref]
  21. J. Carolan, C. Harrold, C. Sparrow, E. Martin-Lopez, N. J. Russell, J. W. Silverstone, P. J. Shadbolt, N. Matsuda, M. Oguma, M. Itoh, G. D. Marshall, M. G. Thompson, J. C. F. Matthews, T. Hashimoto, J. L. O’Brien, and A. Laing, “Universal linear optics,” Science 349(6249), 711–716 (2015).
    [Crossref]
  22. A. Ribeiro, A. Ruocco, L. Vanacker, and W. Bogaerts, “Demonstration of a 4 ( 4-port universal linear circuit,” Optica 3(12), 1348–1357 (2016).
    [Crossref]
  23. M. Reck, A. Zeilinger, H. J. Bernstein, and P. Bertani, “Experimental realization of any discrete unitary operator,” Phys. Rev. Lett. 73(1), 58–61 (1994).
    [Crossref]
  24. L. M. Zhuang, C. G. H. Roeloffzen, M. Hoekman, K. J. Boller, and A. J. Lowery, “Programmable photonic signal processor chip for radiofrequency applications,” Optica 2(10), 854–859 (2015).
    [Crossref]
  25. J. Capmany, I. Gasulla, and D. Perez, “Microwave photonics the programmable processor,” Nat. Photonics 10(1), 6–8 (2016).
    [Crossref]
  26. N. C. Harris, G. R. Steinbrecher, M. Prabhu, Y. Lahini, J. Mower, D. Bunandar, C. C. Chen, F. N. C. Wong, T. Baehr-Jones, M. Hochberg, S. Lloyd, and D. Englund, “Quantum transport simulations in a programmable nanophotonic processor,” Nat. Photonics 11(7), 447–452 (2017).
    [Crossref]
  27. Y. C. Shen, N. C. Harris, S. Skirlo, M. Prabhu, T. Baehr-Jones, M. Hochberg, X. Sun, S. J. Zhao, H. Larochelle, D. Englund, and M. Soljacic, “Deep learning with coherent nanophotonic circuits,” Nat. Photonics 11(7), 441–446 (2017).
    [Crossref]
  28. S. T. Chen, Y. C. Shi, S. L. He, and D. X. Dai, “Compact eight-channel thermally reconfigurable optical add/drop multiplexers on silicon,” IEEE Photonics Technol. Lett. 28(17), 1874–1877 (2016).
    [Crossref]
  29. X. Chen, M. M. Milosevic, D. J. Thomson, A. Z. Khokhar, Y. Franz, A. F. J. Runge, S. Mailis, A. C. Peacock, and G. T. Reed, “Post-fabrication phase trimming of mach-zehnder interferometers by laser annealing of germanium implanted waveguides,” Photonics Res. 5(6), 578–582 (2017).
    [Crossref]
  30. H. Morino, T. Maruyama, and K. Iiyama, “Reduction of wavelength dependence of coupling characteristics using si optical waveguide curved directional coupler,” J. Lightwave Technol. 32(12), 2188–2192 (2014).
    [Crossref]
  31. R. Topley, G. Martinez-Jimenez, L. O’Faolain, N. Healy, S. Mailis, D. J. Thomson, F. Y. Gardes, A. C. Peacock, D. N. R. Payne, G. Z. Mashanovich, and G. T. Reed, “Locally erasable couplers for optical device testing in silicon on insulator,” J. Lightwave Technol. 32(12), 2248–2253 (2014).
    [Crossref]
  32. R. Topley, L. O’Faolain, D. J. Thomson, F. Y. Gardes, G. Z. Mashanovich, and G. T. Reed, “Planar surface implanted diffractive grating couplers in soi,” Opt. Express 22(1), 1077–1084 (2014).
    [Crossref]
  33. J. J. Ackert, J. K. Doylend, D. F. Logan, P. E. Jessop, R. Vafaei, L. Chrostowski, and A. P. Knights, “Defect-mediated resonance shift of silicon-on-insulator racetrack resonators,” Opt. Express 19(13), 11969–11976 (2011).
    [Crossref]
  34. M. M. Milosevic, X. Chen, W. Cao, A. F. J. Runge, Y. Franz, C. G. Littlejohns, S. Mailis, A. C. Peacock, D. J. Thomson, and G. T. Reed, “Ion implantation in silicon for trimming the operating wavelength of ring resonators,” IEEE J. Sel. Top. Quantum Electron. 24(4), 1–7 (2018).
    [Crossref]
  35. B. G. Chen, X. S. Yu, X. Chen, M. M. Milosevic, D. J. Thomson, A. Z. Khokhar, S. Saito, O. L. Muskens, and G. T. Reed, “Real-time monitoring and gradient feedback enable accurate trimming of ion-implanted silicon photonic devices,” Opt. Express 26(19), 24953–24963 (2018).
    [Crossref]
  36. K. Kitahara, Y. Ohashi, Y. Katoh, A. Hara, and N. Sasaki, “Submicron-scale characterization of poly-si thin films crystallized by excimer laser and continuous-wave laser,” J. Appl. Phys. 95(12), 7850–7855 (2004).
    [Crossref]
  37. M. M. Milosevic, X. Chen, X. Yu, N. Dinsdale, O. Aktas, S. Z. Oo, A. Z. Khokhar, D. J. Thompson, O. Muskens, H. M. H. Chong, A. C. Peacock, S. Saito, and G. T. Reed, “Ion implantation of germanium into silicon for critical coupling control of racetrack resonators,” J. Lightwave Technol. 38(7), 1865–1873 (2020).
    [Crossref]
  38. Y. Shoji, K. Kintaka, S. Suda, H. Kawashima, T. Hasama, and H. Ishikawa, “Low-crosstalk 2 ( 2 thermo-optic switch with silicon wire waveguides,” Opt. Express 18(9), 9071–9075 (2010).
    [Crossref]
  39. W. Bogaerts, P. Dumon, D. Van Thourhout, and R. Baets, “Low-loss, low-cross-talk crossings for silicon-on-insulator nanophotonic waveguides,” Opt. Lett. 32(19), 2801–2803 (2007).
    [Crossref]
  40. P. Sanchis, J. V. Galan, A. Griol, J. Marti, M. A. Piqueras, and J. M. Perdigues, “Low-crosstalk in silicon-on-insulator waveguide crossings with optimized-angle,” IEEE Photonics Technol. Lett. 19(20), 1583–1585 (2007).
    [Crossref]
  41. P. Sanchis, P. Villalba, F. Cuesta, A. Hakansson, A. Griol, J. V. Galan, A. Brimont, and J. Marti, “Highly efficient crossing structure for silicon-on-insulator waveguides,” Opt. Lett. 34(18), 2760–2762 (2009).
    [Crossref]
  42. X. Yu, X. Chen, M. M. Milosevic, X. Yan, S. Saito, and G. T. Reed, “Ion implantation and electrical annealing for trimming silicon mzis and facilitating one-time programmable photonic circuits,” in IEEE 16th International Conference on Group IV Photonics (GFP) (IEEE, 2019), pp. 1–2.

2020 (1)

2018 (2)

M. M. Milosevic, X. Chen, W. Cao, A. F. J. Runge, Y. Franz, C. G. Littlejohns, S. Mailis, A. C. Peacock, D. J. Thomson, and G. T. Reed, “Ion implantation in silicon for trimming the operating wavelength of ring resonators,” IEEE J. Sel. Top. Quantum Electron. 24(4), 1–7 (2018).
[Crossref]

B. G. Chen, X. S. Yu, X. Chen, M. M. Milosevic, D. J. Thomson, A. Z. Khokhar, S. Saito, O. L. Muskens, and G. T. Reed, “Real-time monitoring and gradient feedback enable accurate trimming of ion-implanted silicon photonic devices,” Opt. Express 26(19), 24953–24963 (2018).
[Crossref]

2017 (4)

X. Chen, M. M. Milosevic, D. J. Thomson, A. Z. Khokhar, Y. Franz, A. F. J. Runge, S. Mailis, A. C. Peacock, and G. T. Reed, “Post-fabrication phase trimming of mach-zehnder interferometers by laser annealing of germanium implanted waveguides,” Photonics Res. 5(6), 578–582 (2017).
[Crossref]

D. Perez, I. Gasulla, L. Crudgington, D. J. Thomson, A. Z. Khokhar, K. Li, W. Cao, G. Z. Mashanovich, and J. Capmany, “Multipurpose silicon photonics signal processor core,” Nat. Commun. 8(1), 636 (2017).
[Crossref]

N. C. Harris, G. R. Steinbrecher, M. Prabhu, Y. Lahini, J. Mower, D. Bunandar, C. C. Chen, F. N. C. Wong, T. Baehr-Jones, M. Hochberg, S. Lloyd, and D. Englund, “Quantum transport simulations in a programmable nanophotonic processor,” Nat. Photonics 11(7), 447–452 (2017).
[Crossref]

Y. C. Shen, N. C. Harris, S. Skirlo, M. Prabhu, T. Baehr-Jones, M. Hochberg, X. Sun, S. J. Zhao, H. Larochelle, D. Englund, and M. Soljacic, “Deep learning with coherent nanophotonic circuits,” Nat. Photonics 11(7), 441–446 (2017).
[Crossref]

2016 (5)

S. T. Chen, Y. C. Shi, S. L. He, and D. X. Dai, “Compact eight-channel thermally reconfigurable optical add/drop multiplexers on silicon,” IEEE Photonics Technol. Lett. 28(17), 1874–1877 (2016).
[Crossref]

J. Capmany, I. Gasulla, and D. Perez, “Microwave photonics the programmable processor,” Nat. Photonics 10(1), 6–8 (2016).
[Crossref]

A. Ribeiro, A. Ruocco, L. Vanacker, and W. Bogaerts, “Demonstration of a 4 ( 4-port universal linear circuit,” Optica 3(12), 1348–1357 (2016).
[Crossref]

D. Thomson, A. Zilkie, J. E. Bowers, T. Komljenovic, G. T. Reed, L. Vivien, D. Marris-Morini, E. Cassan, L. Virot, J. M. Fedeli, J. M. Hartmann, J. H. Schmid, D. X. Xu, F. Boeuf, P. O’Brien, G. Z. Mashanovich, and M. Nedeljkovic, “Roadmap on silicon photonics,” J. Opt. 18(7), 073003 (2016).
[Crossref]

J. W. Silverstone, D. Bonneau, J. L. O’Brien, and M. G. Thompson, “Silicon quantum photonics,” IEEE J. Sel. Top. Quantum Electron. 22(6), 390–402 (2016).
[Crossref]

2015 (3)

D. A. B. Miller, “Perfect optics with imperfect components,” Optica 2(8), 747–750 (2015).
[Crossref]

J. Carolan, C. Harrold, C. Sparrow, E. Martin-Lopez, N. J. Russell, J. W. Silverstone, P. J. Shadbolt, N. Matsuda, M. Oguma, M. Itoh, G. D. Marshall, M. G. Thompson, J. C. F. Matthews, T. Hashimoto, J. L. O’Brien, and A. Laing, “Universal linear optics,” Science 349(6249), 711–716 (2015).
[Crossref]

L. M. Zhuang, C. G. H. Roeloffzen, M. Hoekman, K. J. Boller, and A. J. Lowery, “Programmable photonic signal processor chip for radiofrequency applications,” Optica 2(10), 854–859 (2015).
[Crossref]

2014 (5)

2012 (3)

T. Baehr-Jones, T. Pinguet, P. Lo Guo-Qiang, S. Danziger, D. Prather, and M. Hochberg, “Myths and rumours of silicon photonics,” Nat. Photonics 6(4), 206–208 (2012).
[Crossref]

Y. A. Vlasov, “Silicon cmos-integrated nano-photonics for computer and data communications beyond 100G,” IEEE Commun. Mag. 50(2), s67–s72 (2012).
[Crossref]

Z. Z. Cheng, X. Chen, C. Y. Wong, K. Xu, and H. K. Tsang, “Mid-infrared suspended membrane waveguide and ring resonator on silicon-on-insulator,” IEEE Photonics J. 4(5), 1510–1519 (2012).
[Crossref]

2011 (3)

2010 (2)

Y. Shoji, K. Kintaka, S. Suda, H. Kawashima, T. Hasama, and H. Ishikawa, “Low-crosstalk 2 ( 2 thermo-optic switch with silicon wire waveguides,” Opt. Express 18(9), 9071–9075 (2010).
[Crossref]

G. Roelkens, L. Liu, D. Liang, R. Jones, A. Fang, B. Koch, and J. Bowers, “III-V/silicon photonics for on-chip and inter-chip optical interconnects,” Laser Photonics Rev. 4(6), 751–779 (2010).
[Crossref]

2009 (1)

2008 (1)

Y. Vlasov, W. M. J. Green, and F. Xia, “High-throughput silicon nanophotonic wavelength-insensitive switch for on-chip optical networks,” Nat. Photonics 2(4), 242–246 (2008).
[Crossref]

2007 (3)

Q. F. Xu and M. Lipson, “All-optical logic based on silicon micro-ring resonators,” Opt. Express 15(3), 924–929 (2007).
[Crossref]

W. Bogaerts, P. Dumon, D. Van Thourhout, and R. Baets, “Low-loss, low-cross-talk crossings for silicon-on-insulator nanophotonic waveguides,” Opt. Lett. 32(19), 2801–2803 (2007).
[Crossref]

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Almeida, V. R.

V. R. Almeida, C. A. Barrios, R. R. Panepucci, and M. Lipson, “All-optical control of light on a silicon chip,” Nature 431(7012), 1081–1084 (2004).
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N. C. Harris, G. R. Steinbrecher, M. Prabhu, Y. Lahini, J. Mower, D. Bunandar, C. C. Chen, F. N. C. Wong, T. Baehr-Jones, M. Hochberg, S. Lloyd, and D. Englund, “Quantum transport simulations in a programmable nanophotonic processor,” Nat. Photonics 11(7), 447–452 (2017).
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T. Baehr-Jones, T. Pinguet, P. Lo Guo-Qiang, S. Danziger, D. Prather, and M. Hochberg, “Myths and rumours of silicon photonics,” Nat. Photonics 6(4), 206–208 (2012).
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Bar, R.

A. Alduino, L. Liao, R. Jones, M. Morse, B. Kim, W.-Z. Lo, J. Basak, B. Koch, H.-F. Liu, H. Rong, M. Sysak, C. Krause, R. Saba, D. Lazar, L. Horwitz, R. Bar, S. Litski, A. Liu, K. Sullivan, O. Dosunmu, N. Na, T. Yin, F. Haubensack, I. w. Hsieh, J. Heck, R. Beatty, H. Park, J. Bovington, S. Lee, H. Nguyen, H. Au, K. Nguyen, P. Merani, M. Hakami, and M. Paniccia, “Demonstration of a high speed 4-channel integrated silicon photonics wdm link with hybrid silicon lasers,” in Integrated Photonics Research, Silicon and Nanophotonics and Photonics in Switching (Optical Society of America, 2010), paper PDIWI5.

Barrios, C. A.

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A. Alduino, L. Liao, R. Jones, M. Morse, B. Kim, W.-Z. Lo, J. Basak, B. Koch, H.-F. Liu, H. Rong, M. Sysak, C. Krause, R. Saba, D. Lazar, L. Horwitz, R. Bar, S. Litski, A. Liu, K. Sullivan, O. Dosunmu, N. Na, T. Yin, F. Haubensack, I. w. Hsieh, J. Heck, R. Beatty, H. Park, J. Bovington, S. Lee, H. Nguyen, H. Au, K. Nguyen, P. Merani, M. Hakami, and M. Paniccia, “Demonstration of a high speed 4-channel integrated silicon photonics wdm link with hybrid silicon lasers,” in Integrated Photonics Research, Silicon and Nanophotonics and Photonics in Switching (Optical Society of America, 2010), paper PDIWI5.

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A. Alduino, L. Liao, R. Jones, M. Morse, B. Kim, W.-Z. Lo, J. Basak, B. Koch, H.-F. Liu, H. Rong, M. Sysak, C. Krause, R. Saba, D. Lazar, L. Horwitz, R. Bar, S. Litski, A. Liu, K. Sullivan, O. Dosunmu, N. Na, T. Yin, F. Haubensack, I. w. Hsieh, J. Heck, R. Beatty, H. Park, J. Bovington, S. Lee, H. Nguyen, H. Au, K. Nguyen, P. Merani, M. Hakami, and M. Paniccia, “Demonstration of a high speed 4-channel integrated silicon photonics wdm link with hybrid silicon lasers,” in Integrated Photonics Research, Silicon and Nanophotonics and Photonics in Switching (Optical Society of America, 2010), paper PDIWI5.

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M. Reck, A. Zeilinger, H. J. Bernstein, and P. Bertani, “Experimental realization of any discrete unitary operator,” Phys. Rev. Lett. 73(1), 58–61 (1994).
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G. Roelkens, L. Liu, D. Liang, R. Jones, A. Fang, B. Koch, and J. Bowers, “III-V/silicon photonics for on-chip and inter-chip optical interconnects,” Laser Photonics Rev. 4(6), 751–779 (2010).
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Buchwald, A. R.

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Chen, Y. K.

P. Dong, X. Liu, S. Chandrasekhar, L. L. Buhl, R. Aroca, and Y. K. Chen, “Monolithic silicon photonic integrated circuits for compact 100+ Gb/s coherent optical receivers and transmitters,” IEEE J. Sel. Top. Quantum Electron. 20(4), 150–157 (2014).
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Chong, H. M. H.

Chrostowski, L.

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Cuesta, F.

Dai, D. X.

S. T. Chen, Y. C. Shi, S. L. He, and D. X. Dai, “Compact eight-channel thermally reconfigurable optical add/drop multiplexers on silicon,” IEEE Photonics Technol. Lett. 28(17), 1874–1877 (2016).
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K. Vandoorne, P. Mechet, T. Van Vaerenbergh, M. Fiers, G. Morthier, D. Verstraeten, B. Schrauwen, J. Dambre, and P. Bienstman, “Experimental demonstration of reservoir computing on a silicon photonics chip,” Nat. Commun. 5(1), 3541 (2014).
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Dinsdale, N.

Dong, P.

P. Dong, X. Liu, S. Chandrasekhar, L. L. Buhl, R. Aroca, and Y. K. Chen, “Monolithic silicon photonic integrated circuits for compact 100+ Gb/s coherent optical receivers and transmitters,” IEEE J. Sel. Top. Quantum Electron. 20(4), 150–157 (2014).
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A. Alduino, L. Liao, R. Jones, M. Morse, B. Kim, W.-Z. Lo, J. Basak, B. Koch, H.-F. Liu, H. Rong, M. Sysak, C. Krause, R. Saba, D. Lazar, L. Horwitz, R. Bar, S. Litski, A. Liu, K. Sullivan, O. Dosunmu, N. Na, T. Yin, F. Haubensack, I. w. Hsieh, J. Heck, R. Beatty, H. Park, J. Bovington, S. Lee, H. Nguyen, H. Au, K. Nguyen, P. Merani, M. Hakami, and M. Paniccia, “Demonstration of a high speed 4-channel integrated silicon photonics wdm link with hybrid silicon lasers,” in Integrated Photonics Research, Silicon and Nanophotonics and Photonics in Switching (Optical Society of America, 2010), paper PDIWI5.

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Dumon, P.

Emelett, S. J.

R. A. Soref, S. J. Emelett, and A. R. Buchwald, “Silicon waveguided components for the long-wave infrared region,” J. Opt. A: Pure Appl. Opt. 8(10), 840–848 (2006).
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Fedeli, J. M.

D. Thomson, A. Zilkie, J. E. Bowers, T. Komljenovic, G. T. Reed, L. Vivien, D. Marris-Morini, E. Cassan, L. Virot, J. M. Fedeli, J. M. Hartmann, J. H. Schmid, D. X. Xu, F. Boeuf, P. O’Brien, G. Z. Mashanovich, and M. Nedeljkovic, “Roadmap on silicon photonics,” J. Opt. 18(7), 073003 (2016).
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Gardes, F. Y.

Gasulla, I.

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J. Capmany, I. Gasulla, and D. Perez, “Microwave photonics the programmable processor,” Nat. Photonics 10(1), 6–8 (2016).
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Griol, A.

P. Sanchis, P. Villalba, F. Cuesta, A. Hakansson, A. Griol, J. V. Galan, A. Brimont, and J. Marti, “Highly efficient crossing structure for silicon-on-insulator waveguides,” Opt. Lett. 34(18), 2760–2762 (2009).
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P. Sanchis, J. V. Galan, A. Griol, J. Marti, M. A. Piqueras, and J. M. Perdigues, “Low-crosstalk in silicon-on-insulator waveguide crossings with optimized-angle,” IEEE Photonics Technol. Lett. 19(20), 1583–1585 (2007).
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Hakami, M.

A. Alduino, L. Liao, R. Jones, M. Morse, B. Kim, W.-Z. Lo, J. Basak, B. Koch, H.-F. Liu, H. Rong, M. Sysak, C. Krause, R. Saba, D. Lazar, L. Horwitz, R. Bar, S. Litski, A. Liu, K. Sullivan, O. Dosunmu, N. Na, T. Yin, F. Haubensack, I. w. Hsieh, J. Heck, R. Beatty, H. Park, J. Bovington, S. Lee, H. Nguyen, H. Au, K. Nguyen, P. Merani, M. Hakami, and M. Paniccia, “Demonstration of a high speed 4-channel integrated silicon photonics wdm link with hybrid silicon lasers,” in Integrated Photonics Research, Silicon and Nanophotonics and Photonics in Switching (Optical Society of America, 2010), paper PDIWI5.

Hakansson, A.

Hara, A.

K. Kitahara, Y. Ohashi, Y. Katoh, A. Hara, and N. Sasaki, “Submicron-scale characterization of poly-si thin films crystallized by excimer laser and continuous-wave laser,” J. Appl. Phys. 95(12), 7850–7855 (2004).
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Harris, N. C.

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Y. C. Shen, N. C. Harris, S. Skirlo, M. Prabhu, T. Baehr-Jones, M. Hochberg, X. Sun, S. J. Zhao, H. Larochelle, D. Englund, and M. Soljacic, “Deep learning with coherent nanophotonic circuits,” Nat. Photonics 11(7), 441–446 (2017).
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Schrauwen, B.

K. Vandoorne, P. Mechet, T. Van Vaerenbergh, M. Fiers, G. Morthier, D. Verstraeten, B. Schrauwen, J. Dambre, and P. Bienstman, “Experimental demonstration of reservoir computing on a silicon photonics chip,” Nat. Commun. 5(1), 3541 (2014).
[Crossref]

Shadbolt, P. J.

J. Carolan, C. Harrold, C. Sparrow, E. Martin-Lopez, N. J. Russell, J. W. Silverstone, P. J. Shadbolt, N. Matsuda, M. Oguma, M. Itoh, G. D. Marshall, M. G. Thompson, J. C. F. Matthews, T. Hashimoto, J. L. O’Brien, and A. Laing, “Universal linear optics,” Science 349(6249), 711–716 (2015).
[Crossref]

Shen, Y. C.

Y. C. Shen, N. C. Harris, S. Skirlo, M. Prabhu, T. Baehr-Jones, M. Hochberg, X. Sun, S. J. Zhao, H. Larochelle, D. Englund, and M. Soljacic, “Deep learning with coherent nanophotonic circuits,” Nat. Photonics 11(7), 441–446 (2017).
[Crossref]

Shi, Y. C.

S. T. Chen, Y. C. Shi, S. L. He, and D. X. Dai, “Compact eight-channel thermally reconfigurable optical add/drop multiplexers on silicon,” IEEE Photonics Technol. Lett. 28(17), 1874–1877 (2016).
[Crossref]

Shoji, Y.

Silverstone, J. W.

J. W. Silverstone, D. Bonneau, J. L. O’Brien, and M. G. Thompson, “Silicon quantum photonics,” IEEE J. Sel. Top. Quantum Electron. 22(6), 390–402 (2016).
[Crossref]

J. Carolan, C. Harrold, C. Sparrow, E. Martin-Lopez, N. J. Russell, J. W. Silverstone, P. J. Shadbolt, N. Matsuda, M. Oguma, M. Itoh, G. D. Marshall, M. G. Thompson, J. C. F. Matthews, T. Hashimoto, J. L. O’Brien, and A. Laing, “Universal linear optics,” Science 349(6249), 711–716 (2015).
[Crossref]

Skirlo, S.

Y. C. Shen, N. C. Harris, S. Skirlo, M. Prabhu, T. Baehr-Jones, M. Hochberg, X. Sun, S. J. Zhao, H. Larochelle, D. Englund, and M. Soljacic, “Deep learning with coherent nanophotonic circuits,” Nat. Photonics 11(7), 441–446 (2017).
[Crossref]

Soljacic, M.

Y. C. Shen, N. C. Harris, S. Skirlo, M. Prabhu, T. Baehr-Jones, M. Hochberg, X. Sun, S. J. Zhao, H. Larochelle, D. Englund, and M. Soljacic, “Deep learning with coherent nanophotonic circuits,” Nat. Photonics 11(7), 441–446 (2017).
[Crossref]

Soref, R. A.

R. A. Soref, S. J. Emelett, and A. R. Buchwald, “Silicon waveguided components for the long-wave infrared region,” J. Opt. A: Pure Appl. Opt. 8(10), 840–848 (2006).
[Crossref]

Sparrow, C.

J. Carolan, C. Harrold, C. Sparrow, E. Martin-Lopez, N. J. Russell, J. W. Silverstone, P. J. Shadbolt, N. Matsuda, M. Oguma, M. Itoh, G. D. Marshall, M. G. Thompson, J. C. F. Matthews, T. Hashimoto, J. L. O’Brien, and A. Laing, “Universal linear optics,” Science 349(6249), 711–716 (2015).
[Crossref]

Steinbrecher, G. R.

N. C. Harris, G. R. Steinbrecher, M. Prabhu, Y. Lahini, J. Mower, D. Bunandar, C. C. Chen, F. N. C. Wong, T. Baehr-Jones, M. Hochberg, S. Lloyd, and D. Englund, “Quantum transport simulations in a programmable nanophotonic processor,” Nat. Photonics 11(7), 447–452 (2017).
[Crossref]

Suda, S.

Sullivan, K.

A. Alduino, L. Liao, R. Jones, M. Morse, B. Kim, W.-Z. Lo, J. Basak, B. Koch, H.-F. Liu, H. Rong, M. Sysak, C. Krause, R. Saba, D. Lazar, L. Horwitz, R. Bar, S. Litski, A. Liu, K. Sullivan, O. Dosunmu, N. Na, T. Yin, F. Haubensack, I. w. Hsieh, J. Heck, R. Beatty, H. Park, J. Bovington, S. Lee, H. Nguyen, H. Au, K. Nguyen, P. Merani, M. Hakami, and M. Paniccia, “Demonstration of a high speed 4-channel integrated silicon photonics wdm link with hybrid silicon lasers,” in Integrated Photonics Research, Silicon and Nanophotonics and Photonics in Switching (Optical Society of America, 2010), paper PDIWI5.

Sun, X.

Y. C. Shen, N. C. Harris, S. Skirlo, M. Prabhu, T. Baehr-Jones, M. Hochberg, X. Sun, S. J. Zhao, H. Larochelle, D. Englund, and M. Soljacic, “Deep learning with coherent nanophotonic circuits,” Nat. Photonics 11(7), 441–446 (2017).
[Crossref]

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A. Alduino, L. Liao, R. Jones, M. Morse, B. Kim, W.-Z. Lo, J. Basak, B. Koch, H.-F. Liu, H. Rong, M. Sysak, C. Krause, R. Saba, D. Lazar, L. Horwitz, R. Bar, S. Litski, A. Liu, K. Sullivan, O. Dosunmu, N. Na, T. Yin, F. Haubensack, I. w. Hsieh, J. Heck, R. Beatty, H. Park, J. Bovington, S. Lee, H. Nguyen, H. Au, K. Nguyen, P. Merani, M. Hakami, and M. Paniccia, “Demonstration of a high speed 4-channel integrated silicon photonics wdm link with hybrid silicon lasers,” in Integrated Photonics Research, Silicon and Nanophotonics and Photonics in Switching (Optical Society of America, 2010), paper PDIWI5.

Takahashi, S.

S. Nakamura, S. Takahashi, M. Sakauchi, T. Hino, M. B. Yu, and G. Q. Lo, “Wavelength selective switching with one-chip silicon photonic circuit including 8 × 8 matrix switch,” Optical Fiber Communication Conference and Exposition (OFC/NFOEC) and the National Fiber Optic Engineers Conference (Optical Society of America, 2011), paper OTuM2.

Teo, E. J.

Thompson, D. J.

Thompson, M. G.

J. W. Silverstone, D. Bonneau, J. L. O’Brien, and M. G. Thompson, “Silicon quantum photonics,” IEEE J. Sel. Top. Quantum Electron. 22(6), 390–402 (2016).
[Crossref]

J. Carolan, C. Harrold, C. Sparrow, E. Martin-Lopez, N. J. Russell, J. W. Silverstone, P. J. Shadbolt, N. Matsuda, M. Oguma, M. Itoh, G. D. Marshall, M. G. Thompson, J. C. F. Matthews, T. Hashimoto, J. L. O’Brien, and A. Laing, “Universal linear optics,” Science 349(6249), 711–716 (2015).
[Crossref]

Thomson, D.

D. Thomson, A. Zilkie, J. E. Bowers, T. Komljenovic, G. T. Reed, L. Vivien, D. Marris-Morini, E. Cassan, L. Virot, J. M. Fedeli, J. M. Hartmann, J. H. Schmid, D. X. Xu, F. Boeuf, P. O’Brien, G. Z. Mashanovich, and M. Nedeljkovic, “Roadmap on silicon photonics,” J. Opt. 18(7), 073003 (2016).
[Crossref]

Thomson, D. J.

B. G. Chen, X. S. Yu, X. Chen, M. M. Milosevic, D. J. Thomson, A. Z. Khokhar, S. Saito, O. L. Muskens, and G. T. Reed, “Real-time monitoring and gradient feedback enable accurate trimming of ion-implanted silicon photonic devices,” Opt. Express 26(19), 24953–24963 (2018).
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M. M. Milosevic, X. Chen, W. Cao, A. F. J. Runge, Y. Franz, C. G. Littlejohns, S. Mailis, A. C. Peacock, D. J. Thomson, and G. T. Reed, “Ion implantation in silicon for trimming the operating wavelength of ring resonators,” IEEE J. Sel. Top. Quantum Electron. 24(4), 1–7 (2018).
[Crossref]

X. Chen, M. M. Milosevic, D. J. Thomson, A. Z. Khokhar, Y. Franz, A. F. J. Runge, S. Mailis, A. C. Peacock, and G. T. Reed, “Post-fabrication phase trimming of mach-zehnder interferometers by laser annealing of germanium implanted waveguides,” Photonics Res. 5(6), 578–582 (2017).
[Crossref]

D. Perez, I. Gasulla, L. Crudgington, D. J. Thomson, A. Z. Khokhar, K. Li, W. Cao, G. Z. Mashanovich, and J. Capmany, “Multipurpose silicon photonics signal processor core,” Nat. Commun. 8(1), 636 (2017).
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R. Topley, L. O’Faolain, D. J. Thomson, F. Y. Gardes, G. Z. Mashanovich, and G. T. Reed, “Planar surface implanted diffractive grating couplers in soi,” Opt. Express 22(1), 1077–1084 (2014).
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X. Chen, C. Li, and H. K. Tsang, “Device engineering for silicon photonics,” NPG Asia Mater. 3(1), 34–40 (2011).
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Van Thourhout, D.

Van Vaerenbergh, T.

K. Vandoorne, P. Mechet, T. Van Vaerenbergh, M. Fiers, G. Morthier, D. Verstraeten, B. Schrauwen, J. Dambre, and P. Bienstman, “Experimental demonstration of reservoir computing on a silicon photonics chip,” Nat. Commun. 5(1), 3541 (2014).
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K. Vandoorne, P. Mechet, T. Van Vaerenbergh, M. Fiers, G. Morthier, D. Verstraeten, B. Schrauwen, J. Dambre, and P. Bienstman, “Experimental demonstration of reservoir computing on a silicon photonics chip,” Nat. Commun. 5(1), 3541 (2014).
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D. Thomson, A. Zilkie, J. E. Bowers, T. Komljenovic, G. T. Reed, L. Vivien, D. Marris-Morini, E. Cassan, L. Virot, J. M. Fedeli, J. M. Hartmann, J. H. Schmid, D. X. Xu, F. Boeuf, P. O’Brien, G. Z. Mashanovich, and M. Nedeljkovic, “Roadmap on silicon photonics,” J. Opt. 18(7), 073003 (2016).
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D. Thomson, A. Zilkie, J. E. Bowers, T. Komljenovic, G. T. Reed, L. Vivien, D. Marris-Morini, E. Cassan, L. Virot, J. M. Fedeli, J. M. Hartmann, J. H. Schmid, D. X. Xu, F. Boeuf, P. O’Brien, G. Z. Mashanovich, and M. Nedeljkovic, “Roadmap on silicon photonics,” J. Opt. 18(7), 073003 (2016).
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Y. A. Vlasov, “Silicon cmos-integrated nano-photonics for computer and data communications beyond 100G,” IEEE Commun. Mag. 50(2), s67–s72 (2012).
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Z. Z. Cheng, X. Chen, C. Y. Wong, K. Xu, and H. K. Tsang, “Mid-infrared suspended membrane waveguide and ring resonator on silicon-on-insulator,” IEEE Photonics J. 4(5), 1510–1519 (2012).
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N. C. Harris, G. R. Steinbrecher, M. Prabhu, Y. Lahini, J. Mower, D. Bunandar, C. C. Chen, F. N. C. Wong, T. Baehr-Jones, M. Hochberg, S. Lloyd, and D. Englund, “Quantum transport simulations in a programmable nanophotonic processor,” Nat. Photonics 11(7), 447–452 (2017).
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Y. Vlasov, W. M. J. Green, and F. Xia, “High-throughput silicon nanophotonic wavelength-insensitive switch for on-chip optical networks,” Nat. Photonics 2(4), 242–246 (2008).
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Xu, D. X.

D. Thomson, A. Zilkie, J. E. Bowers, T. Komljenovic, G. T. Reed, L. Vivien, D. Marris-Morini, E. Cassan, L. Virot, J. M. Fedeli, J. M. Hartmann, J. H. Schmid, D. X. Xu, F. Boeuf, P. O’Brien, G. Z. Mashanovich, and M. Nedeljkovic, “Roadmap on silicon photonics,” J. Opt. 18(7), 073003 (2016).
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Z. Z. Cheng, X. Chen, C. Y. Wong, K. Xu, and H. K. Tsang, “Mid-infrared suspended membrane waveguide and ring resonator on silicon-on-insulator,” IEEE Photonics J. 4(5), 1510–1519 (2012).
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Xu, Q. F.

Yan, X.

X. Yu, X. Chen, M. M. Milosevic, X. Yan, S. Saito, and G. T. Reed, “Ion implantation and electrical annealing for trimming silicon mzis and facilitating one-time programmable photonic circuits,” in IEEE 16th International Conference on Group IV Photonics (GFP) (IEEE, 2019), pp. 1–2.

Yin, T.

A. Alduino, L. Liao, R. Jones, M. Morse, B. Kim, W.-Z. Lo, J. Basak, B. Koch, H.-F. Liu, H. Rong, M. Sysak, C. Krause, R. Saba, D. Lazar, L. Horwitz, R. Bar, S. Litski, A. Liu, K. Sullivan, O. Dosunmu, N. Na, T. Yin, F. Haubensack, I. w. Hsieh, J. Heck, R. Beatty, H. Park, J. Bovington, S. Lee, H. Nguyen, H. Au, K. Nguyen, P. Merani, M. Hakami, and M. Paniccia, “Demonstration of a high speed 4-channel integrated silicon photonics wdm link with hybrid silicon lasers,” in Integrated Photonics Research, Silicon and Nanophotonics and Photonics in Switching (Optical Society of America, 2010), paper PDIWI5.

Yu, M. B.

S. Nakamura, S. Takahashi, M. Sakauchi, T. Hino, M. B. Yu, and G. Q. Lo, “Wavelength selective switching with one-chip silicon photonic circuit including 8 × 8 matrix switch,” Optical Fiber Communication Conference and Exposition (OFC/NFOEC) and the National Fiber Optic Engineers Conference (Optical Society of America, 2011), paper OTuM2.

Yu, X.

M. M. Milosevic, X. Chen, X. Yu, N. Dinsdale, O. Aktas, S. Z. Oo, A. Z. Khokhar, D. J. Thompson, O. Muskens, H. M. H. Chong, A. C. Peacock, S. Saito, and G. T. Reed, “Ion implantation of germanium into silicon for critical coupling control of racetrack resonators,” J. Lightwave Technol. 38(7), 1865–1873 (2020).
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X. Yu, X. Chen, M. M. Milosevic, X. Yan, S. Saito, and G. T. Reed, “Ion implantation and electrical annealing for trimming silicon mzis and facilitating one-time programmable photonic circuits,” in IEEE 16th International Conference on Group IV Photonics (GFP) (IEEE, 2019), pp. 1–2.

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Y. C. Shen, N. C. Harris, S. Skirlo, M. Prabhu, T. Baehr-Jones, M. Hochberg, X. Sun, S. J. Zhao, H. Larochelle, D. Englund, and M. Soljacic, “Deep learning with coherent nanophotonic circuits,” Nat. Photonics 11(7), 441–446 (2017).
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Zhuang, L. M.

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D. Thomson, A. Zilkie, J. E. Bowers, T. Komljenovic, G. T. Reed, L. Vivien, D. Marris-Morini, E. Cassan, L. Virot, J. M. Fedeli, J. M. Hartmann, J. H. Schmid, D. X. Xu, F. Boeuf, P. O’Brien, G. Z. Mashanovich, and M. Nedeljkovic, “Roadmap on silicon photonics,” J. Opt. 18(7), 073003 (2016).
[Crossref]

IEEE Commun. Mag. (1)

Y. A. Vlasov, “Silicon cmos-integrated nano-photonics for computer and data communications beyond 100G,” IEEE Commun. Mag. 50(2), s67–s72 (2012).
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IEEE J. Sel. Top. Quantum Electron. (3)

P. Dong, X. Liu, S. Chandrasekhar, L. L. Buhl, R. Aroca, and Y. K. Chen, “Monolithic silicon photonic integrated circuits for compact 100+ Gb/s coherent optical receivers and transmitters,” IEEE J. Sel. Top. Quantum Electron. 20(4), 150–157 (2014).
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IEEE Photonics J. (1)

Z. Z. Cheng, X. Chen, C. Y. Wong, K. Xu, and H. K. Tsang, “Mid-infrared suspended membrane waveguide and ring resonator on silicon-on-insulator,” IEEE Photonics J. 4(5), 1510–1519 (2012).
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IEEE Photonics Technol. Lett. (2)

S. T. Chen, Y. C. Shi, S. L. He, and D. X. Dai, “Compact eight-channel thermally reconfigurable optical add/drop multiplexers on silicon,” IEEE Photonics Technol. Lett. 28(17), 1874–1877 (2016).
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D. Thomson, A. Zilkie, J. E. Bowers, T. Komljenovic, G. T. Reed, L. Vivien, D. Marris-Morini, E. Cassan, L. Virot, J. M. Fedeli, J. M. Hartmann, J. H. Schmid, D. X. Xu, F. Boeuf, P. O’Brien, G. Z. Mashanovich, and M. Nedeljkovic, “Roadmap on silicon photonics,” J. Opt. 18(7), 073003 (2016).
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R. A. Soref, S. J. Emelett, and A. R. Buchwald, “Silicon waveguided components for the long-wave infrared region,” J. Opt. A: Pure Appl. Opt. 8(10), 840–848 (2006).
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[Crossref]

D. Perez, I. Gasulla, L. Crudgington, D. J. Thomson, A. Z. Khokhar, K. Li, W. Cao, G. Z. Mashanovich, and J. Capmany, “Multipurpose silicon photonics signal processor core,” Nat. Commun. 8(1), 636 (2017).
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J. Capmany, I. Gasulla, and D. Perez, “Microwave photonics the programmable processor,” Nat. Photonics 10(1), 6–8 (2016).
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N. C. Harris, G. R. Steinbrecher, M. Prabhu, Y. Lahini, J. Mower, D. Bunandar, C. C. Chen, F. N. C. Wong, T. Baehr-Jones, M. Hochberg, S. Lloyd, and D. Englund, “Quantum transport simulations in a programmable nanophotonic processor,” Nat. Photonics 11(7), 447–452 (2017).
[Crossref]

Y. C. Shen, N. C. Harris, S. Skirlo, M. Prabhu, T. Baehr-Jones, M. Hochberg, X. Sun, S. J. Zhao, H. Larochelle, D. Englund, and M. Soljacic, “Deep learning with coherent nanophotonic circuits,” Nat. Photonics 11(7), 441–446 (2017).
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Opt. Express (6)

Opt. Lett. (2)

Optica (3)

Photonics Res. (1)

X. Chen, M. M. Milosevic, D. J. Thomson, A. Z. Khokhar, Y. Franz, A. F. J. Runge, S. Mailis, A. C. Peacock, and G. T. Reed, “Post-fabrication phase trimming of mach-zehnder interferometers by laser annealing of germanium implanted waveguides,” Photonics Res. 5(6), 578–582 (2017).
[Crossref]

Phys. Rev. Lett. (1)

M. Reck, A. Zeilinger, H. J. Bernstein, and P. Bertani, “Experimental realization of any discrete unitary operator,” Phys. Rev. Lett. 73(1), 58–61 (1994).
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Science (1)

J. Carolan, C. Harrold, C. Sparrow, E. Martin-Lopez, N. J. Russell, J. W. Silverstone, P. J. Shadbolt, N. Matsuda, M. Oguma, M. Itoh, G. D. Marshall, M. G. Thompson, J. C. F. Matthews, T. Hashimoto, J. L. O’Brien, and A. Laing, “Universal linear optics,” Science 349(6249), 711–716 (2015).
[Crossref]

Other (4)

S. Nakamura, S. Takahashi, M. Sakauchi, T. Hino, M. B. Yu, and G. Q. Lo, “Wavelength selective switching with one-chip silicon photonic circuit including 8 × 8 matrix switch,” Optical Fiber Communication Conference and Exposition (OFC/NFOEC) and the National Fiber Optic Engineers Conference (Optical Society of America, 2011), paper OTuM2.

A. Alduino, L. Liao, R. Jones, M. Morse, B. Kim, W.-Z. Lo, J. Basak, B. Koch, H.-F. Liu, H. Rong, M. Sysak, C. Krause, R. Saba, D. Lazar, L. Horwitz, R. Bar, S. Litski, A. Liu, K. Sullivan, O. Dosunmu, N. Na, T. Yin, F. Haubensack, I. w. Hsieh, J. Heck, R. Beatty, H. Park, J. Bovington, S. Lee, H. Nguyen, H. Au, K. Nguyen, P. Merani, M. Hakami, and M. Paniccia, “Demonstration of a high speed 4-channel integrated silicon photonics wdm link with hybrid silicon lasers,” in Integrated Photonics Research, Silicon and Nanophotonics and Photonics in Switching (Optical Society of America, 2010), paper PDIWI5.

G. T. Reed, Silicon photonics : The state of the art (Wiley, 2008).

X. Yu, X. Chen, M. M. Milosevic, X. Yan, S. Saito, and G. T. Reed, “Ion implantation and electrical annealing for trimming silicon mzis and facilitating one-time programmable photonic circuits,” in IEEE 16th International Conference on Group IV Photonics (GFP) (IEEE, 2019), pp. 1–2.

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Figures (6)

Fig. 1.
Fig. 1. Structures of the implanted waveguides (WGs) and DCs. (a) Cross sectional view of the erasable DC with a conventional rib waveguide and an ion implanted waveguide. (b) Simulation result for the Ge implanted process using the Silvaco software, the density of damage to the crystal lattice is shown in the figure. (c) Illustration of the single-stage DC. (d) Illustration of the two-stage DC. Optical microscope images of (e) a fabricated single-stage DC and (f) a two-stage DC on a SOI wafer.
Fig. 2.
Fig. 2. (a) Calculated fundamental optical mode for the 500 nm wide silicon waveguide. (b) Calculated fundamental optical mode for the 560 nm wide germanium implanted silicon waveguide. (c) Top view of the simulation result for the optimized two-stage directional coupler.
Fig. 3.
Fig. 3. Measured propagation losses of the implanted waveguides. A linear dotted line was fitted to each device group measured. Each device group includes waveguides from the same silicon chip. The corresponding function equations are shown in the figure. The width of the implanted waveguides are: (a) 360 nm, (b) 560 nm, (c) 760 nm, and (d) 960 nm.
Fig. 4.
Fig. 4. Measured optical transmission of the: (a) single-stage DCs with various coupling lengths, and (b) two-stage DCs with various coupling lengths. Simulated results (dotted line), with a step-index profile assumed for the implanted waveguides, are plotted as a reference. (c) SEM image of a typical opening in the implantation mask after Ge ion implantation. The original designed width of the opening is 500 nm (marked in yellow). However, the width was increased to around 620 - 660 nm after ion implantation.
Fig. 5.
Fig. 5. (a) Illustration of the laser annealing process for the two-stage DCs. (b) Measured results for the two-stage DCs with various coupling lengths after laser annealing. The original coupling length for the directional couplers used for this test are 20 μm. Simulation results (dotted line) were plotted as a reference.
Fig. 6.
Fig. 6. (a) Optical microscope images of a 1×4 programmable photonic switching circuit and (b) a 2×2 photonic switching circuit. Measurement results for the photonic switching circuits. The 1×4 photonic switching circuit was programmed by laser annealing to produce an output at one of the four ports sequentially (c, d, e and f). (c) Measured results when P1 is set to be the output port. (d) Measured results when P2 is set to be the output port. (e) Measured results when P3 is set to be the output port. (f) Measured results when P4 is set to be the output port. The 2×2 switching circuit was programmed to operate in two modes by laser annealing: (g) cross-coupling modes or, (h) through-coupling mode.

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