An ultracompact TE-pass 1 × 2 power splitter, using subwavelength grating (SWG) couplers and hybrid plasmonic gratings (HPGs), is proposed and analyzed in detail. As the input strip waveguide is tapered to a narrow wire, where TE mode is cutoff, the launched TE-mode can be evenly divided with high efficiency with the help of the SWG couplers, which are placed between the central silicon wire and two nearby output branches. The injected TM-mode will be perfectly reflected by the carefully designed HPG, whose periodically varied metal layer is located above the bottom strip and SWG waveguides. Consequently, a single device combining both the functions of polarization selection and power division can be realized. This is valuable for highly dense integrated circuits. Results show that, with a period number of 4 in HPG, the present device is only ~6.2-μm-long with an extinction ratio (ER) and an insertion loss (IL) of 25.4 and 0.53 dB at 1.55 μm, respectively, and its bandwidth of ER > 20 dB is ~180 nm with the IL < 0.8 dB, showing a broadband property. Besides, fabrication tolerances to the key dimensions are analyzed and modal field evolution through the device is also presented.
© 2018 Optical Society of America under the terms of the OSA Open Access Publishing Agreement
Integrated photonics, in particular, silicon photonics has become one of the most compelling and important platforms for producing ultracompact and high-yield photonic integrated circuits (PICs) due to its advantages of low manufacturing cost and CMOS-compatible processing [1,2]. For silicon photonics, silicon-on-insulator (SOI) nanowires with high index contrast (HIC) between core and cladding materials are usually used, making sub-micron optical components available. But this HIC of the SOI-based devices often brings about strong polarization dependence, becoming one of the major challenges for their wide use in the practical optical systems. Fortunately, polarization diversity schemes, which can separate and convert the incoming light of random polarization into two beams with identical polarization, have been proposed and/or demonstrated to construct the polarization-transparent circuits . In such schemes, polarization beam splitters (PBSs) [4,5] and rotators (PRs) [6,7] are key building blocks. Although introducing a polarization diversity scheme in PICs represents a feasible route to tackle the polarization issue, this approach will increase the structural complexity inevitably, and meanwhile lead to an expended device footprint. Another usually adopted simpler approach is to use an optical polarizer to eliminate the unwanted polarization and allow the other one to propagate with minimal loss. So far, various types of polarizers have been reported on the SOI platform, e.g., using silicon nanophotonic waveguide , photonic crystals (PhCs) [9,10], graphenes , or transparent conducting oxides . Besides, Bragg grating structure provides another kind of key mechanism to stop the optical power at certain wavelength or polarization state, and based on such structure, lots of efficient polarizers are also realized [13,14]. Recently, metal materials have been incorporated into the dielectric waveguides , forming the so-called hybrid plasmonic waveguides (HPWs) or gratings (HPGs), to generate high birefringence and construct compact polarizers [16–18]. These SOI-based polarizers provide good device performance, very suitable for on-chip applications.
In silicon photonics, optical power splitters/dividers are also one of the fundamental components and are used frequently for power distribution or as basic elements to build more complex devices [19–23], e.g., optical modulators , switches , and multiplexers . Over the years, enormous efforts have been devoted to this field and a large number of splitters have been proposed and/or demonstrated. In , a power splitter based on a hybrid plasmonic DC is proposed. Its length is 21.2 μm and the operating bandwidth is enlarged to ~100 nm around 1.55 μm, better than the traditional DC-based device. Li et al. have reported a low-loss power splitter for strip wires using the inverse tapers for evanescent coupling . In , a competitive splitter with a low loss of 0.06 dB and compact size of only ~3.6 × 11.5 μm2 is reported by elaborately designing the multimode interference (MMI) coupler. More recently, the subwavelength grating (SWG), composed of periodically interleaved high and low index materials with a pitch much smaller than one wavelength, has become a new research hotspot because of its unique features and promising applications [13,22,23,27–34]. The SWG can effectively suppress diffraction effects and behave as a homogenous media. In addition, its equivalent material index can be tailored flexibly by changing the duty radio. Therefore, such structure offers a new degree of freedom for the design of novel photonic components, and certainly it is also a good candidate for realizing efficient power dividers. For instance, Yun et al. have proposed a power splitter by utilizing two SWGs with tapered waveguide widths, showing a good balance in the two output ports with a low extra loss . In , a compact high-performance power splitter enabled by subwavelength grating slot is realized, having a good splitting ratio within a broad bandwidth of ~100 nm. These power splitters highly enrich the choices of devices for building high-performance PICs, involving on-chip optical switching and multiplexing systems.
Nevertheless, it is worth noting that the polarizers and splitters mentioned above are often discrete devices with single functionality, which is unfavorable for further improving the integration density of large-scale PICs. In fact, implementing two or even more functions in an individual optical device has been an irreversible tendency in recent years as it is helpful to simplify the structures and shrink the footprints of photonic integrated chips, and such typical devices include polarization splitter-rotators (PSRs) , hybrid multiplexers , etc. Since many or perhaps most of the present dividers are designed only for a certain polarization (e.g., TE polarization [19–23]), a front polarizer connected with these splitters is usually needed to filter the unwanted polarization, definitely increasing the device size. Furthermore, in some specific applications, such as optical modulation , power splitting function with only one polarization is naturally required. Therefore, realizing a single device that can function both as a TE- or TM-pass polarizer and a power splitter has vital practical significance. Yet to our knowledge, there has been rare attempt on designing such a device so far.
We here propose a compact and broadband TE-pass 1 × 2 power splitter by utilizing the SWG couplers and HPGs. The SWG couplers are located between the central and two nearby output strip waveguides, where SWG-based transitions are employed at the input/output ports, and the metal cap in HPG is placed above the bottom strip wires and SWGs. Owing to different modal features of the two polarized modes in the HPW, the bottom silicon structure is first designed individually for dividing the TE mode and the metal cap is then optimized to reflect the TM mode, enabling a clear and easy design procedure. Via careful optimization, the input TM-mode can be efficiently reflected by the HPG while the injected TE-mode will be gradually coupled into two output channels through the SWG couplers, almost unaffected by the above metal cap. As a consequence, an individual device having two functions of polarization filtering and power splitting is achieved. It should be noted that such silicon structure for the TE-mode division is proposed for the first time to our knowledge. From the results, the device is only ~6.2 μm in length due to the strong coupling of the TE mode, much shorter than the earlier splitters in [19–23]. In addition, it has a high extinction ratio (ER) of 25.4 dB and a low insertion loss (IL) of 0.53 dB at the wavelength of 1.55 μm, and its bandwidth of ER > 20 dB is up to ~180 nm with the IL < 0.8 dB.
2. Device structure and principle
Figure 1 shows the three-dimensional (3D) schematic layout of the proposed TE-pass 1 × 2 power splitter, as well as the enlarged views of the input/output SWG-based transitions and hybrid plasmonic grating. Silica is employed as the upper and bottom cladding material to facilitate integration with other components. The SWG couplers have the same pitch length Λ and duty ratio a/Λ, and a represents the length of the silicon in a period along the longitudinal (z) direction. As shown in Fig. 1, the periodically changed metal cap is located above the silicon wire and SWGs, forming a HPG, and its pitch, duty ratio, and width are Λ1, a1/Λ1, and w1, respectively. Here, a1 and h4 are the length and thickness of the thin metal in a period. Two different heights of the SiO2 layer between the metal and bottom layer are denoted as h2 and h3. The total length of the HPG is n5Λ1, depending on the period number n5. Silver (Ag) is chosen as the metal material owing to its low metallic absorption.
With the modal characteristics of the supported TE mode in the HPW and silicon wires, the input TE-mode transmits nearly totally in the bottom silicon section. When the TE mode enters into the device, it passes through the HPG region directly and then gradually tends to the tapered SWG when it propagates into the SWG-based transition, where the SWG width is tapered from w3 to w4 with a tapered length of n1Λ while the corresponding strip wire width is from w1 to w2. Notice that the HPG end is vertically aligned to the taper end. Here, w2 is fine chosen to ensure that the central silicon wire with such width is TE-cutoff. Profitably, the central TE mode will be further coupled into two neighboring strip channels through the SWG waveguide with a uniform width of w4 in a period number of n2. Finally, the coupled TE-mode in either side will pass through another SWG-based transition, being tapered from w6 to w7 in width with a period number of n4, and then output. To improve the performance, the following attempts have been made and the desired effects are received. Firstly, two identical extra tapered waveguides incorporated with both lateral ends of the transition are added, whose tip and butt widths are 0 and w5 with a length of L1. Then another two identical tapered segments, ranging from w5 to w1 in width, with a length of L2 are employed to lower the reflection and make the coupling process smoother. In addition, by using two bending structures with radius of R and an extended narrow wire (with a length of L4) cascaded by a taper, the back-coupling is lowered and the coupling efficiency is successfully enhanced. As to the TM mode, it will be significantly reflected by the HPG which is designed to behave as a TM-mode reflector, and almost no TM mode will be received at the output ports. As a result, polarization selection and power division are simultaneously realized in an isolated device.
If not specified, the computational parameters under the following analysis are as below. The operating wavelength λ is assumed to be 1.55 μm. The refractive indices of core (Si), upper and bottom claddings (SiO2) and metal (Ag) are, respectively, taken as 3.455, 1.445 and 0.1453 + i11.3587 , where their material dispersions are not considered due to the fairly low variations around 1.55 μm. For the bottom silicon structure, the height is the same, which is set to be h1 = 250 nm, and the width of the input/output strip wire is chosen as w1 = 400 nm, which is equal to that of the metal layer, to ensure the single-mode design. The 45° bend has a radius of 2 μm (R) considering the fabrication feasibility.
For this 1 × 2 TE-pass power splitter, ER, IL, and reflection loss (RL) will be calculated and analyzed using the 3D finite-difference time-domain (FDTD) method  to evaluate the transmission features and optimize the key structural parameters in the following parts. Here, for the case of the TE-mode injection, the definitions of IL and RL are expressed as:
In these expressions, denotes the X-polarized power (TE or TM) at the Y port (I: input port, R: reflection port, O: output ports). In the following analysis, the performance imbalance in the two output ports will not be considered, except in the part of fabrication tolerance, since our device is perfectly symmetric with respect to its central z axis.
To obtain the accurate and stable results with acceptable simulation time, the grid sizes are taken as Δx = 25 nm, Δy = 25 nm, and Δz = 25 nm uniformly in x, y, and z coordinates, and the simulation time step is chosen as 1000 fs. The whole structure is surrounded by the perfectly matched layers (PMLs) to effectively eliminate the nonphysical reflections so that the physics of this device can be correctly captured. The computational window is set to be 7 μm × 4 μm × 10 μm according to the preliminary results, including the thickness of the PMLs (0.5 μm), and the thickness of the buried oxide (BOX) layer (2 μm).
3. Design and optimization
3.1 Bottom silicon 1 × 2 power splitter
The typical schematics of two types of waveguides, silicon nanowires (NWs) and hybrid plasmonic waveguides are plotted in Fig. 2. In comparison with the traditional silicon NW in SOI platform, the HPW has two extra layers, the low-index buffer (e.g., SiO2) and a metal cap (e.g., Ag). This configuration can be viewed as a combination of the silicon waveguide and plasmonic waveguide, providing a better balance in the field confinement and propagation loss . To study the modal properties of the two waveguides used in the device and choose the suitable structural parameters, a full-vectorial mode solver based on finite-difference frequency-domain (FDFD) method is utilized . The field distribution of each guided mode in the NW and HPW is analyzed, as shown in the insets of Fig. 3, where the present dimensions are used as an example. It is clearly seen that in a HPW, the TM mode is well confined in the low-index SiO2 layer which is close to the metal-dielectric interface, whereas the TE mode is primarily localized in the silicon layer, far away from the metal, quite similar to the TE mode in the NW. In order to roughly evaluate the modal similarity of the TE (TM) modes in the NW and HPW, mode overlap ratio (Γ) is calculated using the overlap integral method:Figure 3 depicts the calculated results, where only HS varies while other dimensions are fixed as the earlier used values. It can be seen that Γ of the TE mode keeps higher than 0.93, and gradually approaches to 1 with the increase of HS. In contrast, field profiles of the two TM modes show relatively large difference, especially in the case of thin SiO2 layer. This analysis shows that the above placed metal grating in our scheme has almost ignorable effect on the TE-mode propagation. Thus, it is feasible to firstly optimize the bottom silicon construction for the TE mode and then optimize the HPG for the TM mode, which is very beneficial to simplify the design and optimization processes.
In our design, SWG couplers are exploited to couple the input TE-mode into two adjacent output channels. To guarantee the SWG operating at the subwavelength regime, the grating pitch of the SWG must be substantially shorter than the Bragg period to effectively suppress the diffraction effect, i.e., Λ < ΛBragg = λ/2nB. The effective index of the SWG structure (nB) can be approximately estimated as Fig. 4(a). From the results, we choose Λ = 200 nm and a/Λ = 0.5, maintaining our device at the subwavelength regime in a large bandwidth and relaxing the fabrication requirements .
Figure 4(b) shows the effective indices of the guided modes in the silicon NW as its width varies for both polarizations. One sees clearly that the TE mode turns to cutoff when the width is below 220 nm, which is marked by the grey region. In order to efficiently couple the input TE-mode into two output branches with a relatively short length, the width of the narrow wire w2 is set to be 180 nm, which is connected with the input waveguide using a linear taper. In this case, owing to the cutoff condition in the narrow NW, the TE mode has a large propagation loss and intrinsically tends to radiate if we do not adopt effective ways to overcome this issue. To do this, the SWG couplers are introduced and consequently, the TE mode can be easily and exactly collected by the strip wires, realizing the power division.
Figure 5(a) shows the device performance as a function of the period number of the SWG waveguide (n2) for the TE-mode input, where the SWG waveguide width w4 is set to be 1.0 μm and the input/output SWG-based transition is tapered from 0.5/0.25 to 0.9/0.05 μm in a period number of 5/5. From the results, the optimal period number is 12 for the lowest IL and RL, i.e., the highest coupling efficiency for the TE mode can be achieved when n2 = 12. Furthermore, dependence of IL and RL on the length of the tapered structure (L2), from 0.2 to 0.4 μm in width, cascaded to the straight waveguide in the output channel is also investigated, as shown in Fig. 5(b). It is observed that IL of the TE mode has its lowest value of 0.17 dB at the position of L2 = 1 μm while the corresponding RL is as low as −31.1 dB. Therefore, L2 = 1 μm is chosen for the least IL. Note that though the minimum feature size (MFS) in the SWG-based transitions is only 50 nm (w7), it is still compatible with the modern electron beam lithography (EBL), which has been demonstrated in . Furthermore, this MFS value is helpful to obtain higher ER, according to our calculation results. The reason is that a larger MFS reduces the average separation between the middle silicon wire and corrugated transitions, so the TM mode is much easier to couple into the output branches, decreasing the ER finally according to Eq. (3).
Then the narrow silicon wire, which is designed to be cutoff for the TE mode, is also studied, as shown in Fig. 6(a), where its length of L4 varies. Ideally, we cannot obtain either TE or TM polarized power in the central port, so an attached short taper is utilized to cut off this branch and make the central wire changed smoothly. Here, its width is tapered from 0.18 (w2) to 0.1 μm (w8) with a length of 1 μm and its effect has been involved in the analysis. From Fig. 6(a), it is revealed that with the increase of L4, both IL and RL gradually decrease and finally either of them approaches to a constant when L4 is large enough. That is, when L4 > 3.5 μm, RL and IL are almost unvaried, very close to −31.1 dB and 0.17 dB, respectively, implying that coupling of the TE mode between the central branch and two output channels is nearly complete. Obviously, a longer L4 is prior for the device, but in view of both the device performance and structural size, L4 is chosen as 4 μm for a trade-off. In this case, an extra advantage is that with a 4-μm-long narrow wire, the end of the attached taper is greatly separated from the bends in the output channels, thus, the TM-polarized power in the narrow wire can hardly couple into the cross branches. To further enhance the device performance, two extra tapered sections are utilized to incorporate with the lateral ends of the SWG-based transition which is near the input port, as shown in Fig. 1. As a result, the TE mode can be pulled into the nearby strip wires more easily through the tapers. Hence, its length (L1) is another important dimension and should be carefully selected. In other words, when the length (L1) of the taper is too short, it is far away from the central silicon wire, whereas if the length is too long, the TE mode is still well confined in the middle wire, thus influence of the tapers is relatively weak in these two cases. Figure 6(b) shows the RL and IL of the silicon structure dependent on the length of the extra taper L1. It is found that the lowest values of RL and IL can be obtained at the position of L1 = 0.7 μm, corresponding to n3 = 2, and the device performance will be worse if L1 deviates from 0.7 μm, in accordance with the above analysis. Moreover, we can also see that compared with no such structures (L1 = 0), RL and IL are reduced by ~5 and ~0.3 dB separately, verifying the effectiveness of the added sections for performance improvement. Note that in the aforementioned analysis, this optimized extra tapered waveguide has already been used. At this point, the bottom silicon part for evenly splitting the TE mode is realized, and its length is only ~5.8 μm including the bends, which is shorter than those in [19–23] (e.g., 21.2 μm , 12.5 μm , 11.5 μm , 50 μm , and 65 μm ).
3.2 Periodically varied metal layer for HPG
Subsequently, the dimensions of the above metal layer are suitably selected such that the input TM-mode will be fully reflected. In Fig. 7(a), the calculated effective indices of the HPW with the varied height of SiO2 layer are plotted. It can be seen that neff of the TE mode increases while that of the TM mode drops as the SiO2 layer becomes thicker. In addition, effect of the SiO2 thickness for the TM mode is evidently stronger than that for the TE mode, especially when the SiO2 spacer is very thin. However, a too thin SiO2 layer also results in a comparatively large IL for the TE mode. Thus, we choose h2 = 60 nm, and h3 = 140 nm as a compromise. The field distributions of the guided modes in the two HPWs are shown in the insets. With the above dimensions, mode overlap ratios for the TE and TM mode are, respectively, ~0.97 and ~0.58, according to Eq. (4), causing a stronger reflection for the injected TM-mode compared with that for the TE mode. To maximize the reflection, the following Bragg condition should be met for the TM mode by properly designing the period length (Λ1) and duty ratio (a1/Λ1) :Eq. (6), which is ~364 nm and the according a1 is 182 nm from our calculation.
Given that the silicon section below the HPG is not uniform (including SWGs), i.e., the obtained Λ1 and a1 are not absolutely accurate, numerical simulations are also performed to further optimize the grating parameters and the results are presented in Fig. 7(b), where the period number (n5) is set to be 4. As is clearly seen, transmittance and RL of the TM mode become degraded when a1 deviates from 180 nm, whereas IL for the TE mode always drops with the increment of a1. The continuous decrease of the IL can be explained as follows. Though the reflection effect for the TE mode caused by the HPG is weak, it still exists and is one of the major sources of loss. From Eq. (6), the rough a1 for the largest reflection for the TE mode is near 172 nm, so in the calculated range of a1 in Fig. 7(b), IL always decreases. Here, a1 = 180 nm is chosen as the optimal value, corresponding to the satisfaction of the Bragg reflection condition, which is very close to the roughly calculated a1 (182 nm). And in this condition, IL of the TE mode is only 0.53 dB. Compared with the IL of the optimized silicon power splitter (0.17 dB), the increased IL of 0.36 dB is totally resulted from the introduction of the metal, mainly including the reflection loss and absorption loss of the TE mode in HPG.
4. Results and discussion
At this point, all the critical design parameters of the 1 × 2 TE-pass power splitter have been determined. Next, the further analysis and necessary discussion in respect to the whole device are given in this part. Figure 8 depicts the wavelength dependence of the suggested device with n5 = 4 as an example, where ER, IL and RLs are calculated in the wavelength range of 1.41-1.65 μm, covering the whole S, C, L bands and a part of E and U bands. As is clearly seen, the optimal ER (25.4 dB) and RL of the TM (−1.32 dB) can be achieved at 1.55 μm, which can be explained as follows. As the HPG is designed for the TM mode according to the Bragg condition, transmission behaviors of the TM mode are greatly relevant to the operating wavelength from Eq. (6). Moreover, the dimensions are optimized at the central wavelength of 1.55 μm. Hence, when λ is varied from 1.55 μm, RL of the TM mode declines and more TM polarized power is received at the output ports, weakening the ER. It is also found that RL of the TE mode ascends with the increment of λ, which may be because of the following reason. Effective index of the TE mode in the HPW is dropped when λ becomes larger, i.e., the according field confinement of the TE mode is worse, which leads to a stronger interaction between the TE mode and metal layer, enhancing the reflection and absorption effects. Besides, from Fig. (8), the lowest IL (0.44 dB) is obtained at 1.51 μm, not 1.55 μm. In order to better understand this phenomenon, loss mechanism of our device is analyzed. Here, sources of loss are classified into two parts. One is the losses caused by the metal layer, including reflection and metallic absorption, and the other is transmission loss of the TE mode in the silicon part, including coupling loss, bending loss, etc. It is noted that the total loss of the former part rises as the wavelength increases, which has been described above, and the propagation loss increases when the wavelength λ deviates from 1.55 μm from our calculations. Based on the sum of these losses, it is reasonable that the least IL is obtained at a narrow wavelength (λ = 1.51 μm). Fortunately, IL of the device at 1.55 μm is also very low, only 0.53 dB. In addtion, the present device exhibits a wide bandwidth over a range of ~180 nm, from 1.41 to 1.59 μm, with a relatively high ER (> 20 dB) and a low IL (< 0.8 dB).
Additionally, as transmission behavior of the TM mode can be obviously affacted by the period number (n5) of metal layer in HPG, dependence of n5 on the performance is stuided as well. Table 1 lists the optimal device performance of the present splitter with several different n5. Here, the compared figure of merits include ER, IL, RLs, device length, and bandwidth. Though n5 is not swept completely and only several sample values are simulated in the table aiming at reducing the total simulation time, its prominent impact can still be observed and concluded. That is, in the case of a larger n5, ER and operating bandwidth can be improved successfully at the sacrifice of an added device length and a higher IL. Thereby, performance of our device can be flexibly adjusted by adding or reducing the period number n5 depending on the practical requirements. For example, if a high ER is especially considered while requests of the device length and IL are not so high, a slightly larger n5 (e.g., 8) may be a good choice. But a too large n5 (e.g., 12) is not recommended in our device as the corresponding IL is high (e.g., >2 dB) despite its attractive ER. Surely, our device (e.g., n5 = 4) also can provide a balanced performance with a high ER (25.4 dB), a low IL (0.53 dB) and a compact footprint (~6.2 μm), as shown in Table 1.
As to the fabrication of the proposed TE-pass 1 × 2 power splitter, it can still be realized based on the reported fabrication technologies for HPWs [17,19,41], though the corrugated plasmonic silver cap will increase the difficulty to some extent. The entire fabrication steps are listed in detail as follows. A standard SOI wafer with a 250 nm (h1) thick silicon layer and a 2 μm thick BOX is used for the device. Firstly, the bottom silicon structure can be defined using electron beam lithography, and then the patterns can be transferred to the silicon layer by inductively coupled plasma (ICP) etching process. Secondly, a thin SiO2 layer with a height of 140 nm (h3) is deposited on the sample via plasma enhanced chemical vapor deposition (PECVD), followed by another EBL and partially etching step for the HPG. In this step, the SiO2 layer is etched off 80 nm. Thirdly, the silver is deposited by thermal deposition into the defined metal window, together with a liftoff process, to obtain the bottom silver corrugated structures. Subsequently, a similar process is performed to add the upper sliver strip of the HPG, whose height (h4) is 0.1 μm. Finally, SiO2 cladding is deposited by PECVD, realizing the present device completely. Here, we should point out that the possible power leakage into the silicon substrate, which is a side effect of the small dimensions, can be almost neglected in our device because the used BOX layer is very thick.
Fabrication tolerances to the key dimensions are also investigated. Firstly, we analyze the device performance as its whole SWG waveguide width varies, as illustrated in Fig. 9(a). Note that the width deviation in each SWG-based transition near output port is 0.5Δw. From the results, when Δw is even as large as ± 60 nm, device performance is still attractive with an ER > 21.7 dB and an IL < 0.6 dB, showing a large tolerance. The HPG is used to reflect the input TM-mode, thus its dimensions will greatly affect the performance. As illustrated in Fig. 9(b), effect of the silica thickness variation (Δh2/Δh3) is analyzed. It can be seen that both IL and RL of the TE mode decrease with the increase of Δh2 as the metal layer is far away from the silicon wire, imposing less effect on the TE mode. In contrast, when Δh2 varies from 0 μm, ER is deteriorated from the peak value. The reason is that less TE polarized power can be obtained at a larger negative Δh2, while a larger positive Δh2 corresponds to an enlarged TM polarized power in the output ports, causing the degradation of ER. Moreover, influences of the longitudinal and lateral metal shift (Δz and Δx) with respect to the bottom silicon section, caused by the possible fabrication errors, are plotted in Figs. 9(c)–9(e). Here, in consideration of the structural symmetry, lateral metal shift only to the positive x axis is investigated. It is observable that the longitudinal metal shift introduces notable reduction on the ER and IL but the splitting ratio of the TE mode is still 50:50 since the structural symmetry is maintained. To keep ER > 20 dB and IL < 0.8 dB, Δz must be controlled in the range from −0.3 to 0.32 μm. From Figs. 9(d) and 9(e), extra issues, the imbalanced power proportion and performance at the output ports (P1 and P2), can be seen distinctly. In Fig. 9(d), with the increment of Δx, the splitting ratio or power proportion gradually deviates from 50:50 and according to the slope of the curve, the deviation rate is reduced. To guarantee not only an attractive performance of each port (ER > 20 dB, IL < 0.8 dB) but also a relatively low imbalance between two ports (ΔER < 5 dB, ΔIL < 0.5 dB), Δx must be lower than 45 nm, as shown in Fig. 9(e), and in this case, the splitting ratio is better than 46.7:53.3. Moreover, performance with respect to the input/output SWG-based transition is also studied. If ER > 20 dB and IL < 0.8 dB is still needed, n4 should be chosen within the range from 3 to 8 while n3 can be almost chosen as an arbitrary value within the range from 0 to 5. In addition, performance versus the extra tapered waveguide is also considered. Even if the tip width increases to 0.1 μm, ER and IL of the device only slightly worsen, keeping > 24 and < 0.8 dB, respectively. Here, due to that the pitch length variation (ΔΛ) can be controlled to less than 10 nm , the SWG’s operating regime and good performance can be well kept. Thus, its influence is ignored here.
The field evolution of the TE (Ex) and TM (Ey) modes along the propagation direction in the proposed device is also simulated by 3D FDTD method, as shown in Figs. 10(a) and 10(b). Here, n5 = 4 is taken as the sample, and the entire dimensions are listed in Table 2. It can be seen that the input TM-mode is well reflected by the optimally designed HPG structure, and its residual power will be concentrated in the central narrow waveguide, indicating that the detected TM polarized power in the two output ports is negligible. In contrast, the injected TE-mode directly propagates through the HPG with low loss and then uniformly separates into the neighbor strip wires with the aid of the SWG couplers. Hence, in the two output ports, we can only get equal amount of TE polarized power, yielding a new TE-pass 1 × 2 power splitter with good performance.
We have proposed an ultracompact TE-pass 1 × 2 power splitter, where subwavelength grating couplers and hybrid plasmonic Bragg gratings are applied. In the present design, the geometric dimensions are selected optimally to ensure that the TM mode is reflected completely by the HPG owing to the satisfaction of the Bragg reflection condition, while the TE mode can evenly couple into the adjacent strip waveguides through the SWG couplers and then output at the cross ports, unaffected by the above metal cap which is periodically varied. Results show that the proposed device is only ~6.2 μm in length with an ER of 25.4 and an IL of 0.53 dB at λ = 1.55 μm, respectively, and it offers a broad bandwidth (~180 nm) with the ER above 20 dB and IL below 0.8 dB. With easy design processes, high extinction ratio, low insertion loss, quite broad bandwidth, and ultracompact size, the present device can play a valuable or crucial role in highly dense silicon-based PICs.
National Natural Science Foundation of China (11574046, 60978005); Natural Science Foundation of Jiangsu Province (BK20141120); Scientific Research Foundation of Graduate School of Southeast University (YBJJ1823).
1. A. Rickman, “The commercialization of silicon photonics,” Nat. Photonics 8(8), 579–582 (2014). [CrossRef]
2. R. Won and M. Paniccia, “Integrating silicon photonics,” Nat. Photonics 4(8), 498–499 (2010). [CrossRef]
3. T. Barwicz, M. R. Watts, M. A. Popović, P. T. Rakich, L. Socci, F. X. Kärtner, E. P. Ippen, and H. I. Smith, “Polarization-transparent microphotonic devices in the strong confinement limit,” Nat. Photonics 1(1), 57–60 (2007). [CrossRef]
4. B. Ni and J. Xiao, “Ultracompact and broadband silicon-based polarization beam splitter using an asymmetrical directional coupler,” IEEE J. Quantum Electron. 53(4), 1 (2017). [CrossRef]
5. H. Fukuda, K. Yamada, T. Tsuchizawa, T. Watanabe, H. Shinojima, and S. Itabashi, “Ultrasmall polarization splitter based on silicon wire waveguides,” Opt. Express 14(25), 12401–12408 (2006). [CrossRef] [PubMed]
6. Y. Xu, J. Xiao, and X. Sun, “A Compact Hybrid Plasmonic Polarization Rotator for Silicon-Based Slot Waveguides,” IEEE Photonics Technol. Lett. 26(16), 1609–1612 (2014). [CrossRef]
7. L. Gao, Y. Huo, J. S. Harris, and Z. Zhou, “Ultra-Compact and Low-Loss Polarization Rotator Based on Asymmetric Hybrid Plasmonic Waveguide,” IEEE Photonics Technol. Lett. 25(21), 2081–2084 (2013). [CrossRef]
8. Q. Wang and S.-T. Ho, “Ultracompact TM-pass silicon nanophotonic waveguide polarizer and design,” IEEE Photonics J. 2(1), 49–56 (2010). [CrossRef]
9. D. W. Kim, M. H. Lee, Y. Kim, and K. H. Kim, “Ultracompact transverse magnetic mode-pass filter based on one-dimensional photonic crystals with subwavelength structures,” Opt. Express 24(19), 21560–21565 (2016). [CrossRef] [PubMed]
10. M. Lin, X. Xi, W. Qiu, Y. Ai, Q. Wang, Q. Liu, and Z. Ouyang, “Star-type polarizer with equal-power splitting function for each polarization based on polarization-dependent defects in two-dimensional photonic-crystal waveguides,” Opt. Express 24(21), 23917–23924 (2016). [CrossRef] [PubMed]
11. X. Hu and J. Wang, “Ultrabroadband compact graphene-silicon TM-pass polarizer,” IEEE Photonics J. 9(2), 1 (2017). [CrossRef]
12. Y. Xu and J. Xiao, “Design and numerical study of a compact, broadband and low-loss TE-pass polarizer using transparent conducting oxides,” Opt. Express 24(14), 15373–15382 (2016). [CrossRef] [PubMed]
13. X. Guan, P. Chen, S. Chen, P. Xu, Y. Shi, and D. Dai, “Low-loss ultracompact transverse-magnetic-pass polarizer with a silicon subwavelength grating waveguide,” Opt. Lett. 39(15), 4514–4517 (2014). [PubMed]
14. D. Oser, D. Pérez-Galacho, C. Alonso-Ramos, X. Le Roux, S. Tanzilli, L. Vivien, L. Labonté, and É. Cassan, “Subwavelength engineering and asymmetry: two efficient tools for sub-nanometer-bandwidth silicon Bragg filters,” Opt. Lett. 43(14), 3208–3211 (2018). [CrossRef] [PubMed]
15. R. F. Oulton, V. J. Sorger, D. A. Genov, D. F. P. Pile, and X. Zhang, “A hybrid plasmonic waveguide for subwavelength confinement and long-range propagation,” Nat. Photonics 2(8), 496–500 (2008). [CrossRef]
16. B. Ni and J. Xiao, “A compact silicon-based TE-pass polarizer using three-guide directional couplers,” IEEE Photonics Technol. Lett. 29(19), 1631–1634 (2017). [CrossRef]
18. B. Bai, L. Liu, R. Chen, and Z. Zhou, “Low loss, compact TM-pass polarizer based on hybrid plasmonic grating,” IEEE Photonics Technol. Lett. 29(7), 607–610 (2017). [CrossRef]
21. Zhen Sheng, Zhiqi Wang, Chao Qiu, A. Le Li, Pang, Aimin Wu, Xi Wang, Shichang Zou, and Fuwan Gann, “A compact and low-loss MMI coupler fabricated with CMOS technology,” IEEE Photonics J. 4(6), 2272–2277 (2012). [CrossRef]
22. H. Yun, Y. Wang, F. Zhang, Z. Lu, S. Lin, L. Chrostowski, and N. A. F. Jaeger, “Broadband 2 × 2 adiabatic 3 dB coupler using silicon-on-insulator sub-wavelength grating waveguides,” Opt. Lett. 41(13), 3041–3044 (2016). [CrossRef] [PubMed]
23. L. Xu, Y. Wang, A. Kumar, E. El-Fiky, D. Mao, H. Tamazin, M. Jacques, Z. Xing, M. G. Saber, and D. V. Plant, “Compact high-performance adiabatic 3-dB coupler enabled by subwavelength grating slot in the silicon-on-insulator platform,” Opt. Express 26(23), 29873–29885 (2018). [CrossRef] [PubMed]
24. T. Li, J. Zhang, H. Yi, W. Tan, Q. Long, Z. Zhou, X. Wang, and H. Wu, “Low-voltage, high speed, compact silicon modulator for BPSK modulation,” Opt. Express 21(20), 23410–23415 (2013). [CrossRef] [PubMed]
25. S. Tomofuji, S. Matsuo, T. Kakitsuka, and K. Kitayama, “Dynamic switching characteristics of InGaAsP/InP multimode interference optical waveguide switch,” Opt. Express 17(26), 23380–23388 (2009). [CrossRef] [PubMed]
26. Y. Ding, H. Ou, J. Xu, and C. Peucheret, “Silicon photonic integrated circuit mode multiplexer,” IEEE Photonics Technol. Lett. 25(7), 648–651 (2013). [CrossRef]
28. P. J. Bock, P. Cheben, J. H. Schmid, J. Lapointe, A. Delâge, S. Janz, G. C. Aers, D.-X. Xu, A. Densmore, and T. J. Hall, “Subwavelength grating periodic structures in silicon-on-insulator: a new type of microphotonic waveguide,” Opt. Express 18(19), 20251–20262 (2010). [CrossRef] [PubMed]
29. Y. Xiong, D.-D. Xu, J. H. Schmid, P. Cheben, and W. N. Ye, “High extinction ratio and broadband silicon TE-pass polarizer using subwavelength grating index engineering,” IEEE Photonics J. 7(5), 1 (2015). [CrossRef]
30. J. Xiao and Y. Xu, “Ultracompact and broadband silicon-based strip-to-slot mode converter,” IEEE Photonics Technol. Lett. 28(13), 1414–1417 (2016). [CrossRef]
32. D. Benedikovic, M. Berciano, C. Alonso-Ramos, X. Le Roux, E. Cassan, D. Marris-Morini, and L. Vivien, “Dispersion control of silicon nanophotonic waveguides using sub-wavelength grating metamaterials in near- and mid-IR wavelengths,” Opt. Express 25(16), 19468–19478 (2017). [CrossRef] [PubMed]
33. D. González-Andrade, J. G. Wangüemert-Pérez, A. V. Velasco, A. Ortega-Moñux, A. Herrero-Bermello, I. Molina-Fernández, R. Halir, and P. Cheben, “Ultra-broadband mode converter and multiplexer based on sub-wavelength structures,” IEEE Photonics J. 10(2), 1 (2018). [CrossRef]
35. J. Wang, B. Niu, Z. Sheng, A. Wu, X. Wang, S. Zou, M. Qi, and F. Gan, “Design of a SiO₂ top-cladding and compact polarization splitter-rotator based on a rib directional coupler,” Opt. Express 22(4), 4137–4143 (2014). [CrossRef] [PubMed]
36. Y. Tan, H. Wu, and D. Dai, “Silicon-Based Hybrid (de)Multiplexer for Wavelength-/Polarization-Division-Multiplexing,” J. Lightwave Technol. 36(11), 2051–2058 (2018). [CrossRef]
37. S. Koeber, R. Palmer, M. Lauermann, W. Heni, D. L. Elder, D. Korn, M. Woessner, L. Alloatti, S. Koenig, P. C. Schindler, H. Yu, W. Bogaerts, L. R. Dalton, W. Freude, J. Leuthold, and C. Koos, “Femtojoule electro-optic modulation using a silicon-organic hybrid device,” Light Sci. Appl. 4(2), e255 (2015). [CrossRef]
38. E. D. Palik, Handbook of Optical Constants of Solids (Academic, 1985).
39. D. M. Sullivan, Electromagnetic Simulation Using the FDTD Method (IEEE, 2000).
40. J. Xiao, H. Ni, and X. Sun, “Full-vector mode solver for bending waveguides based on the finite-difference frequency-domain method in cylindrical coordinate systems,” Opt. Lett. 33(16), 1848–1850 (2008). [CrossRef] [PubMed]
41. X. Gaun, P. Xu, Y. Shi, and D. Dai, “Ultra-compact and ultra-broadband TE-pass polarizer with a silicon hybrid plasmonic waveguide,” Proc. SPIE 8988, 89880U (2014). [CrossRef]
42. S. K. Selvaraja, W. Bogaerts, P. Dumon, D. Van Thourhout, and R. Baets, “Subnanometer linewidth uniformity in silicon nanophotonic waveguide devices using CMOS fabrication technology,” IEEE J. Sel. Top. Quantum Electron. 16(1), 316–324 (2010). [CrossRef]