High-time-resolved 64-channel single-flux quantum-based address encoder integrated with a multi-pixel superconducting nanowire single-photon detector

1. Introduction

An ultrasensitive imaging system with a high temporal accuracy can be applied to fields such as quantum information [1], life sciences [2], and laser ranging [3]. Cooled charge-coupled devices (CCDs) are widely used as high-sensitivity imaging sensors, but their temporal resolutions are poor because of their operating principle [4]. Single-photon avalanche diodes (APDs) have high detection efficiencies (DEs) at the visible wavelengths and sub-ns timing jitters, but their DEs are not good enough in the infrared region and scaling these technologies to large spatial arrays would be challenging due to the difficulty in attaining the high-yield production of arrays, while crosstalk between the pixels coming from photon emission during the avalanche process would also be an issue [5,6]. A superconducting nanowire single-photon detector (SSPD) is an attractive candidate for a single-photon imaging system due to its high DE over a wide spectral range from the ultraviolet to the infrared, high-speed operation, low dark count rate, and low timing jitter [7–9]. To realize a single-photon imaging system based on an SSPD array, signal readout is a key technology. The number of readout coaxial cables must be reduced because these cables are good thermal conductors and thus place a thermal load on the cooling system.

Recently, time- and frequency-based multiplexing readout schemes for multi-pixel SSPD arrays have been demonstrated [10,11], but those required additional components with and between pixels, resulting in low fill factors. A single-photon imager with ca. 590 effective pixels, based on a superconducting delay line, has also been successfully demonstrated, but there is obviously a tradeoff between the maximum count rate and the effective number of pixels [12]. The fill factor of this architecture is also small because most of the area is occupied by the ground plane of the coplanar waveguide acting as a delay line. Meanwhile, the 8 × 8-pixel SSPD array with a row–column readout scheme has been demonstrated as another alternative readout architecture that does not degrade the maximum count rate, where the number of readout cables can be reduced to 2N for an N × N array format [13,14]. Even with this readout scheme, however, the realization of a large spatial array of over 1,000 pixels remains challenging due to the thermal issue associated with the signal readout. We previously proposed a cryogenic signal-processing technique based on a single-flux-quantum (SFQ) circuit [15]. The SFQ circuits are superconductor digital circuits composed of superconductor loops with Josephson junctions (JJs) as their switching devices. The binary information in the SFQ circuits is represented by a tiny quantized flux Φ₀ ( = 2.07 × 10⁻¹⁵ Wb) in a superconductor loop, allowing low-power operation with a tens GHz clock frequency. We previously demonstrated the signal readout from SSPD arrays via SFQ multiplexers, implemented on the same sample stage in a Gifford-McMahon (GM) cryocooler [16,17].

To realize an imaging system based on a multi-pixel SSPD array, an encoder circuit for generating an output digital code from the channel information of the input signal is required. Also, the obtaining timing information of photon detection without degradation is quite important for a depth imaging system such as a LIDAR (light detection and ranging) system [18,19]. We designed and tested a 64-channel encoder based on a SFQ circuit, where a digital code is output every time a single photon is detected. Since this circuit can output address information while retaining the timing information of a photon-detection event in a SSPD array, this circuit is called an event-driven encoder and is suitable for a ranging application. The SFQ-based readout systems can maintain the timing information due to quite small timing jitter of the SFQ circuits [20–22]. By applying this circuit to a SSPD array with a row–column readout scheme, the number of readout cables for each row and column can be reduced to one each, thus overcoming the main difficulty associated with implementing large spatial array.

In this paper, we report on the operation of a 64-channel SFQ event-driven encoder for a single-photon imaging system based on SSPD array focusing for its timing resolution. We confirmed the address encoding operation in the 64-channel SFQ event-driven encoder and evaluated the overall full width at half maximum (FWHM) jitter of a SSPD array incorporating the 64-channel SFQ event-driven encoder.

2. SFQ event-driven encoder

Figure 1(a) is a block diagram of the designed 64-channel event-driven encoder. The designed circuit consists of 64 magnetically coupled DC/SFQ (MC-DC/SFQ) converters which convert the electrical output signal from the SSPD to SFQ pulses [23], a pulse number converter, an internal clock generator, a 7-bit binary pulse counter, an 8-bit shift register, and a voltage driver. The 64 MC-DC/SFQ converters are used to connect each of the 64 SSPD pixels. Each converter generates an SFQ pulse by entering the electrical output pulse from the SSPD, as caused by single-photon detection event. Systematic investigation has revealed that the converter has a current sensitivity of 8.2 μA [23], which is sufficiently less than the typical bias current of our NbTiN SSPDs (15–20 μA), while the timing jitter of the MC-DC/SFQ converter was found to be lower than 10 ps upon conversion from an electrical pulse to an SFQ pulse [24]. The address of the SSPD pixels at which single photon is detected is converted into the number of SFQ pulses in the pulse number converter, which is a ladder circuit composed of SFQ pulse splitters and confluence buffers [15]. The generated SFQ pulses are transmitted to the 7-bit binary pulse counter, and the counted number of SFQ pulses is converted to 7-bit binary data corresponding to the encoded address data. The 7-bit binary address data is then stored from the second bit to the most significant bit (MSB) in the 8-bit shift register.

 

Fig. 1 Designed 64-channel SFQ event-driven encoder. (a) Block diagram. The black and white circles indicate the pulse splitters and a confluence buffers, respectively. (b) Micrograph of fabricated circuit.

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Furthermore, the pulse number converter generates two more SFQ pulses, which are sent to the 8-bit shift resister and internal clock generator, respectively. The one sent to the 8-bit shift register sets the least significant bit (LSB) in the register to 1. This is called a “timing bit” hereafter, because this bit provides the timing information given below. The other SFQ pulse sent to the internal clock generator outputs clock signals of 8 SFQ pulses with frequencies of 100 MHz to generate an 8-bit serial digital code based on the data stored in the shift register. Therefore, the generated 8-bit serial digital code output as a result of the single photon detection event includes a timing bit and 7-bit address information, and can be retrieved using a single output cable, thus drastically reducing the heat flow. Given that the 8-bit digital code is generated by internal clocks and driven by a single-photon detection event, the timing bit can maintain the timing information without any significant degradation in its timing precision. The output of the SFQ event-driven encoder was set to a non-return-to-zero (NRZ) format because our customized field programmable gate array (FPGA) for real-time signal processing can deal with the input signals in a NRZ manner. Figure 1(b) is a micrograph of the 64-channel SFQ event-driven encoder fabricated by the Nb standard process 2 (STP2) in the clean room for analog-digital superconductivity (CRAVITY) of the National Institute of Advanced Industrial Science and Technology [25]. The total number of JJs in the designed circuit is approximately 2610.

We usually use the CONNECT cell library for the design of the SFQ circuits because of their high reliability [26]. For this design, we customized the cell by reducing the critical current (I_c) of a JJ and also the bias voltage (V_b) of the SFQ circuits to reduce the DC bias currents and power dissipation. The required total DC bias currents are 200 mA and V_b is 1.25 mV. As a result, the power dissipation of the circuit is 250 μW at the low-temperature stage, which is sufficiently low for operation in a 0.1-W GM cryocooler. For the circuit designed in the present study, a one by one connection was assumed, and the power dissipation per channel was 3.9 μW. The thermal load of the designed SFQ encoder is quite small compared to that of the conventional readouts. A 16-channel signal transmission line based on a flexible printed circuit requires thermal load of 88 μW from 40-K stage to detector stage [27]. A cryogenic signal combiner using a SiGe-based integrated circuit is also developed. This semiconductor-based combiner operated at around 10 GHz by stand-alone test, however the Joule heat was around 100 mW [28]. Noted that our developed SFQ circuit can be extended to a 32 × 32-channel event-driven encoder with adequate modification of the MC-DC/SFQ converters, for the readout of a SSPD array with a row–column readout architecture. In this case the power dissipation per channel is expected to be around 0.3 μW, pointing to the high scalability of the SFQ encoder. The fabricated 64-channel SFQ event-driven encoder was tested in liquid helium prior to being installed in the 0.1-W GM cryocooler. We applied the test pulses by using a pulse pattern generator (PPG) to all the input ports in the circuit, and observed the output waveforms by using a digital oscilloscope. We confirmed the correct 8-bit digital codes for all 64 input channels, synchronized with the input signals with a wide operation margin of −10% to + 20%. Figures 2(a)–2(d) shows examples of the obtained waveforms for input ports #10, #28, #40, and #61, respectively. In the case of input port #10, as shown in Fig. 2(a), the pattern of the waveform is “10101000.” The first bit is a timing bit which indicates the beginning of an output signal and used as time tagging. The bits of a higher order than the second bit indicate the address data corresponding to input port #10. In the same way, the waveforms shown in Figs. 2(b), 2(c), and 2(d) show the correct input port numbers of #28, #40, and #61, respectively.

 

Fig. 2 Examples of waveforms obtained in preliminary tests of 64-channel SFQ event-driven encoder in liquid helium. The output signals obtained from the SFQ circuits are synchronized with input signals from the PPG.

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In addition, the SFQ output signals are clearly synchronized with the input signals from the PPG. The above-mentioned results prove that our designed circuit generates internal clock signals by an input signal and outputs the timing information with encoded address data for the respective input ports.

3. Operation of SFQ encoder with 64-pixel SSPD array

The event-driven SFQ circuit was implemented on the package block integrated with a printed circuit board (PCB) and 64-pixel NbTiN SSPD chip [29], as shown in Fig. 3(a), and installed into a 0.1-W GM cryocooler. Bias currents for all the 64 pixels have to be applied for the simultaneous operation of the 64-pixel array, and biasing the current to all 64 pixels in parallel would be an effective means of biasing multiple pixels using a single cable to reduce the number of cables. However, as shown in Fig. 3(a), the 64-pixel SSPD array and the SFQ encoder are not connected by equal-length wirings, which causes a large timing distribution and disturb the precise measurement of timing jitter when the bias current is supplied to all the 64 pixels in parallel. Hence, we tried to measure the timing jitter for the readout from a single-pixel SSPD through the 64-bit SFQ encoder, as a preliminary step toward the demonstration of high-time-resolved photon detection for the entire 64-pixel array. Since the number of coaxial cables connecting to the cooling stage is limited, two pixels (pixel #16 and #24) in the 64-pixel array were connected to the respective input ports of the SFQ encoder circuit, as shown in Fig. 3(b). The bias current for each SSPD pixel can be applied independently (I_b1 and I_b2) or simultaneously (I_b3) by low-noise voltage sources through coaxial cables and 100-kΩ resistors. The input ports of the SFQ circuits have MC-DC/SFQ converters, which are terminated by a 50-Ω load resistor. The output signals of the SFQ encoder were observed using a digital oscilloscope through a low-noise amplifier with a 30-dB gain (LNA-1800, RF Bay Inc.). We also connected two other input ports (#2 and #63) to the PPG at room temperature through the coaxial cables, to perform a stand-alone test of the event-driven encoder in the 0.1-W GM cryocooler. Before irradiating the SSPD array with photons, we tested the SFQ circuits using these test ports and confirmed that the circuits operated correctly with almost same operation margin as that in liquid helium.

 

Fig. 3 (a) Package of the SSPD and SFQ chips. The SFQ encoder requires 6 wirings to read the signals from the SSPD array. I_bDrv is bias current for the voltage driver. SFQ out is output signals of the SFQ encoder. I_bMain1 and I_bMain2 are bias currents for the main circuit of the SFQ encoder. The return current is applied to cancel the DC magnetic fields caused by I_bMain1 and I_bMain2 [30]. I_bMC-D/S is bias current for the 64 MC-DC/SFQ converters. (b) Circuit diagram of the experiment. Bias currents I_b1 and I_b2 are supplied to SSPDs #16 and #24, respectively. The bias current I_b3 is a common bias line for 2-pixel SSPDs in parallel.

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When the SSPDs detect the photons, the signals output from the SSPDs are transferred to the MC-DC/SFQ converters. The MC-DC/SFQ converters generate an SFQ pulse according to the signals output from the SSPDs and the timing and address data is then transmitted to a digital oscilloscope at room temperature through a voltage driver. We irradiated the SSPD array with photons by using a 1550-nm wavelength pulsed laser with a 100-fs pulse width, passing the photons through optical attenuators. A single-mode optical fiber for a wavelength of 1550 nm was introduced into the cryocooler system, and the end of the fiber was fixed to the rear of the chip-mounting block with a relatively long distance of ca. 3 mm between the end of the fiber and the chip such that the incident photons could be uniformly irradiated over all the SSPD pixels. The details of the setup for the optical fiber are described in [29].

First, we supplied bias currents I_b1 and I_b2 to SSPDs #16 and #24 individually, and observed the waveform output from the SFQ encoder to confirm the correct operation of the SFQ event-driven encoder in connection with certain SSPD pixels. As a result, we obtained the output waveforms from the SFQ encoder corresponding to the correct address data of 16 and 24 by irradiating the SSPD array with photons at a certain timing, as shown in Fig. 4. Since the output signals were observed in synchronization with the trigger signals from the pulsed laser oscillator, the output signals from the SFQ encoder are obviously generated by the photon-detection event in the SSPDs. We also verified the simultaneous operation of two SSPD pixels to which bias currents I_b3 were applied, through the parallel bias line to two SSPDs from a single voltage source. The output line of the voltage source is divided into two lines by a divider, and these two lines are connected to the respective ports of the cryocooler by coaxial cables. As a result of the simultaneous operation of the two SSPD pixels, we observed the same output waveforms in Fig. 4 with I_b3 set to 58 μA.

 

Fig. 4 Waveforms output from the SFQ encoder by irradiating (a) SSPD pixel #16 with an I_b1 of 27.6 μA and (b) SSPD pixel #24 with I_b2 of 30.4 μA. The oscilloscope is synchronized with the trigger signals from the pulsed laser oscillator.

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Next, we investigated the time correlation between the input photons and the timing bits from the SFQ circuit by using a time-correlated single photon counter (TCSPC) module with a 1-ps resolution (HydraHarp 400, PicoQuant GmbH). We replaced the digital oscilloscope with the TCSPC module shown in Fig. 3(b), and supplied bias currents to the SSPDs individually. The time correlation between the synchronized trigger pulses from the pulsed laser module and the timing bit from the SFQ circuit through the low-noise amplifiers located at room temperature were recorded using the timing module. As a result, a timing correlation histogram was obtained when SSPD #16 was biased by 28.0 μA, as shown in Fig. 5. A clear correlation between the pulsed laser and the timing bit from the SFQ circuit can be seen, while the obtained full width at half maximum (FWHM) timing jitter is 56.5 ps. This value is similar to that of SSPD #16 without the SFQ circuit biased by 28.0 μA, implying that the timing information of the SSPD can be maintained even through the SFQ encoder circuit without any significant degradation of the readout timing accuracy thanks to the event-driven architecture and small timing jitter of the SFQ circuit [20–22].

 

Fig. 5 Histogram of timing jitter of timing bit from SFQ encoder by irradiating SSPD #16 with photons.

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Although the high time resolution of our system was demonstrated, the maximum count rate of our system still requires improvement. The output, consisting of 8-bit digital code has a frequency of 100 MHz ( = 10 ns), which gives a dead time of 8 × 10 = 80 ns and a maximum counting rate of 12.5 MHz. If other photons arrive during this dead time of 80 ns, the SFQ encoder circuit malfunctions. In order to avoid these malfunctions as much as possible, shortening the dead time is practically important. The current readout frequency of 100 MHz is determined from the bandwidth of the low-noise amplifier and FPGA at room temperature rather than the operating speed of the SFQ circuit. Given our on demonstrating the operating principle using the same measuring equipment as we would normally use, the readout frequency was set to 100 MHz, but the SFQ circuit itself can operate with a high-speed clock of 10 GHz or more. If we update the measurement equipment at room temperature to be compatible with frequencies of 1 GHz or more, a readout frequency of 1 GHz could be achieved by a small modification to the design of the 64-bit SFQ encoder circuit. Although an 8-bit parallel readout also enables eight-times higher counting rate than the current serial readout, the number of readout cables increases to eight which may result in a significant heat load to the refrigerator. And, even if the dead time can be reduced, malfunctions caused by multi-photon events are inevitable in the current SFQ encoder circuit. A digital signal processing to invalidate photon detections during the dead time would be an effective way to avoid malfunctions by multi-photon events, while careful circuit design will be required to avoid a significant increase in power dissipation.

4. Conclusion

We demonstrated the high time resolved readout operation of a 64-channel SFQ event-driven encoder combined with a 64-pixel NbTiN SSPD array in a 0.1-W GM cryocooler. The designed SFQ encoder can convert spatial information to digital data while maintaining the timing information of the photon detection. To prevent an increase in the sample-stage temperature in the 0.1-W GM cryocooler, we redesigned all the SFQ cells to reduce the bias currents and power consumption of the SFQ circuits. The required bias currents are approximately 200 mA while the power consumption is 250 μW, which is sufficiently low to enable operation in a 0.1-W GM cryocooler. After confirming the correct operation of the SFQ event-driven encoder in liquid helium for all 64 input channels, we tested the SFQ event-driven encoder connected to 2 of the 64 pixels of a NbTiN SSPD in the 0.1-W GM cryocooler. The SFQ encoder generates the address data correctly from respective SSPD pixels, and there is a clear timing correlation between the input photons and the LSB of the output (timing bit). The FWHM timing jitter of the timing bit was determined to be 56.5 ps, which can maintain the timing jitter of the SSPD, even through the SFQ event-driven encoder. Note that the 64-channel event-driven SFQ encoder developed as part of the present study can be applied not only to a 64-pixel SSPD array but also, with some modification, to a 32 × 32-pixel SSPD because the use of the row–column readout scheme reduces the output of N × N SSPD arrays from N² to 2N and the MC-DC/SFQ converter can be applied for negative voltage pulses. Our results thus provide insights into realizing a large-scale SSPD single-photon imaging system with a very high spatial and timing resolution.