## Abstract

We propose and demonstrate a low-power and low-current cryogenic readout interface for a superconducting nanowire single-photon detector (SSPD) using adiabatic quantum-flux-parametron (AQFP) logic. The AQFP readout interface samples and digitizes the current signal from an SSPD, generating binary output data in accordance with the detection behavior of the SSPD. We demonstrate the correct operation of an SSPD with the interface, where the AQFP readout interface and the SSPD are placed in separate 0.1-W Gifford–McMahon (GM) cryocoolers and are interconnected via coaxial cables. It was found that the temperature of the sample stage did not change even after the AQFP readout interface was turned on, which revealed that the AQFP readout interface uses sufficiently low power and current for a compact cryocooler.

© 2017 Optical Society of America

## 1. Introduction

Superconducting nanowire single-photon detectors (SSPDs or SNSPDs) [1] have made significant contributions to numerous research fields [2–6], which include quantum optics, quantum information, laser communications, laser sensing, and fluorescent correlation spectroscopy, through taking advantage of their superior performance in detection efficiency, count rates, and timing jitters [7–9]. Recently, much effort has been spent on the development of a multi-pixel SSPD array [10–12], which has high-speed operation, large device areas, pseudo-photon-number resolution, and spatial resolution, suitable for an even wider application range. So far, 64-pixel SSPD arrays have been fabricated by two research groups [13,14]. In the literature [14], the simultaneous operation of the 64 pixels was reported. Arrays with an even larger number of pixels are going to be developed for better performance. Since SSPDs are operated at cryogenic temperatures, a typical and inherent problem of many-pixel SSPD arrays is that the heat flow induced by numerous coaxial cables, which are required to read out and bias the pixel detectors, can exceed the cooling power of a cryocooler. Thus, several types of readout schemes to reduce the number of coaxial cables have been reported [15–19].

We proposed a cryogenic readout interface using superconductor logic [20], which digitizes and encodes the current signals from the detector array at cryogenic temperature, sending binary data outside via a few (or a single) coaxial cables. Previously, we reported the readout operations of SSPDs [21] using rapid single-flux-quantum (RSFQ) logic [22]. The advantage of RSFQ logic as a cryogenic readout interface is that its power consumption is very low. Typically, the power consumption of a single RSFQ logic gate is in the μW-range. However, as the pixel number of the detector array increases and the RSFQ readout interface scales up, larger bias currents are required to drive the RSFQ circuits. Assuming an average bias current for a single Josephson junction is 120 μA, the total bias current for a 10,000-junction RSFQ circuit may reach 1.2 A. Large bias currents and the resistance of the coaxial cables inside the cryocooler induce serious Joule heating, which is much larger than the power consumption of RSFQ circuits [23]. We found that the temperature of the RSFQ chip placed on the sample stage increased from 2.7 K to approximately 6 K by supplying a bias current of 370 mA to the RSFQ chip. Therefore, the cryogenic readout interface for SSPDs should operate using low current as well as low power.

In order to reduce the supply current to the readout interface, one possible solution is to introduce current recycling [24] into RSFQ circuits, in which bias currents are serially supplied to multiple circuit blocks with different ground levels. However, circuits composed of repeated structures, such as counters, can benefit from it [25,26]. Also, it is difficult to achieve wide bias margins when adopting current recycling [25,26]. Another solution is to design a readout interface using a different superconductor logic, such as adiabatic quantum-flux-parametron (AQFP) logic [27], which is an adiabatic superconductor logic based on the quantum-flux-parametron (QFP) [28]. In AQFP logic, a pair of ac bias currents excite logic gates via magnetic couplings, and thus the amount of bias current does not increase with circuit scale. Therefore, it would be possible to design a low-current, as well as low-power, readout interface by using AQFP logic.

In this paper, we propose a readout interface using AQFP logic. Followed by a general explanation on AQFP logic, we then show the detail of the AQFP readout interface, which includes a comparator, an XOR gate, and a voltage driver [29]. The AQFP readout interface samples and digitizes the tiny current signals from an SSPD and outputs mV-range binary signals in accordance with the detection behavior of the SSPD. Then, we demonstrate an SSPD using the AQFP readout interface, where the AQFP chip and the SSPD chip are placed in separate 0.1-W Gifford–McMahon (GM) cryocoolers and are interconnected via coaxial cables. Measurement results revealed that the AQFP readout interface correctly digitized the current signal from the SSPD.

## 2. AQFP readout interface

AQFP logic has been recently undergoing extensive investigation to achieve an energy-efficient superconductor computing system. The switching energy (energy dissipation per switching event) of a single AQFP gate can be arbitrarily reduced [30] through adiabatic switching [31,32], in which the potential energy profile is gradually changed between a single-well shape and a double-well shape. In practice, there is a trade-off between switching energy and operation frequencies; switching energy is zero in the quasi-static limit but increases with operation frequencies. In a previous study [33], we measured the energy dissipation of an AQFP gate at an operation frequency of 5 GHz and found that the switching energy was still as small as approximately 10^{−20} J. The maximum operation frequency is given by the time constants and the damping conditions of the Josephson junctions in the AQFP gate. In this study, we fabricate the AQFP interface using the AIST 2.5 kA/cm^{2} Nb standard process (STP2) [34] and the Josephson junctions are critically damped, which gives a maximum operation frequency of approximately 47 GHz [35]. Most importantly, AQFP logic is not only low-power but also drivable by low current. This is because, unlike RSFQ logic, the amount of bias (excitation) current for AQFP circuits does not increase with the circuit scale due to ac magnetic-flux excitation [36]. In a previous study [37], we operated a 20,000-junction AQFP circuit with a total bias current of only 4.8 mA, which is three orders of magnitude smaller than that of a 20,000-junction RSFQ circuit.

Figure 1(a) shows our proposed readout interface using AQFP logic, which is composed of a comparator, an XOR gate, and a voltage driver. The comparator is a buffer (BUF) gate with an offset input current (*I*_{th}), which works as the threshold current for the comparator. The current signal from an SSPD (*I*_{in}) is terminated by a 50-Ω resistor and is sampled by the comparator. Additional BUF gates are placed between the comparator and the XOR gate just in case the XOR gate affects the comparator, as this is the first demonstration of using AQFP logic as an interface for an SSPD. The AQFP readout interface is driven by a four-phase excitation mode using a pair of ac bias currents and a dc offset current, the detail of which is given in the literature [36]. ϕ_{1} through ϕ_{4} in the figure represent the excitation phases. Figure 1(b) shows how the AQFP readout interface digitizes *I*_{in}. The grids represent the sampling period, which is synchronized with the ac bias currents. *I*_{in} is sampled by the comparator and a logic 1 (logic 0) is generated if *I*_{in} is larger (smaller) than *I*_{th}. Since the current sensitivity of the AQFP is very high due to the small gray zone width (~1 μA) [38], the comparator digitizes tiny *I*_{in} with low error rates. Every time an SSPD current pulse arrives (A), the comparator generates multiple logic 1s (B). The number of the generated logic 1s varies with the shape and the arrival time of the SSPD current pulse, which is not convenient from the viewpoint of the post processing of measurement results. Therefore, the train of logic 1s (B) is converted into a pair of logic 1s using an XOR gate (C), which compares the last sampling result with the second to last sampling result, thus generating a logic 1 only when *I*_{in} crosses *I*_{th}. As a result, the number of logic-1 pairs corresponds to that of SSPD current pulses and the interval of a logic-1 pair depends on the shape and the arrival time of its corresponding SSPD current pulse. The logic-1 pairs are amplified into mV-range binary signals using a voltage driver [29] and are sent out of the cryocooler. We designed the AQFP readout interface using a minimal cell library [36,39] and fabricated it using STP2. Figure 1(c) shows the micrograph of the fabricated AQFP readout interface. Note that it is also possible to process the train of logic 1s outside the cryocooler. However, in this case, we need a rather complex measurement setup using a semiconductor-based microprocessor or field-programmable gate array (FPGA) to measure additional characteristics such as the output count rate. On the other hand, by processing the logic-1 train inside the cryocooler as shown in Fig. 1, we can measure the output count rate of an SSDP with the AQFP interface in a conventional SSPD measurement setup using a pulse counter.

## 3. Experiment

First, we conducted a preliminary test of the AQFP readout interface placed in a GM cryocooler. Figure 2 shows the measurement waveforms with *I*_{th} = 0 μA. Two sinusoidal bias currents with a phase separation of 90 degrees (*I*_{x1} and *I*_{x2}) were applied by a function generator, the input current sequences (*I*_{in}) were applied by a pattern generator, and the output voltage (*V*_{out}) was observed after undergoing amplification by semiconductor low noise amplifiers (LNAs). *I*_{x1}, *I*_{x2}, and dc offset current drive the AQFP gates shown in Fig. 1a from ϕ_{1} to ϕ_{4} with a phase separation of 90 degrees [36]. The frequency of *I*_{x1} and *I*_{x2} is 10 MHz, which equals the sampling frequency of the comparator, *f*_{sample}. The figure shows that, every time *I*_{in} crosses the threshold current (0 μA), a high voltage signal (logic 1) is generated at *V*_{out}. Therefore, the number of logic-1 pairs corresponds to the number of input current pulses, independent of the pulse width of *I*_{in}. Through this preliminary test, we observed wide operation margins of 6.1 dB (−20.7 dBm to −14.6 dBm) and 6.5 dB (−20.7 dBm to −14.6 dBm) for *I*_{x1} and *I*_{x2}, respectively.

Then, we demonstrated a fiber-coupled SSPD with the AQFP readout interface. Figure 3 shows the measurement setup. For simplicity, some of the cables connected to the set up are not shown. The AQFP readout interface and the SSPD are placed in separate 0.1-W GM cryocoolers (GM1 and GM2) and are interconnected via coaxial cables and a bias tee. This setup makes it easy to compare the count rates using the AQFP interface with the count rates without using the AQFP interface to confirm if the AQFP interface digitizes the current signal from the SSPD with low error rates. The temperatures of the sample stages in GM1 and GM2 were 2.11 K and 2.63 K, respectively. The reason why the sample stage of GM2 has a higher temperature than that of GM1 is because more coaxial cables are connected inside GM2 than inside GM1. The SSPD device used in the experiment is identical to the one reported in [40], which is comprised of multiple nanowire pairs to achieve a higher performance than conventional structures. The device was formed by 60-nm-width and 80-nm-space NbTiN nanowires with a detection area of 15 × 15 μm^{2}. It showed a switching current of 19.5 μA, and a system detection efficiency of approximately 81.0% at 1550-nm wavelength. The bias current supplied to the SSPD (*I*_{sspd}) and the threshold current to the AQFP readout interface (*I*_{th}) are provided by voltage supplies via 100-kΩ resistors. The pulse laser generates a 1-MHz pulse train, where the number of photons per pulse (*N*_{photon}) ranges from 10^{−1} to 10^{4} via a power controller and an optical attenuator. The SSPD receives the attenuated laser pulse train and generates current pulses (*I*_{in}), which are directly sampled by the AQFP readout interface without amplification. The interface generates logic-1 pairs (*V*_{out}), and the count rate of the logic-1 pairs (*CR*_{aqfp}) is measured by the pulse counter. It is noteworthy that the temperature of the sample stage of GM2 did not change from the initial temperature of 2.63 K even after the AQFP readout interface was turned on by applying a −17.2-dBm ac bias current to *I*_{x1}, a −17.2-dBm ac bias current to *I*_{x2}, and a 1.28-mA dc offset current. This demonstrates that the AQFP readout interface uses sufficiently low power and current for implementations using a 0.1-W GM cryocooler.

To reduce the number of missed detections of current pules from the SPPD, *f*_{sample} of the AQFP readout interface should be carefully determined. We observed *CR*_{aqfp} as a function of *f*_{sample} by varying the frequency of *I*_{x1} and *I*_{x2} up to 100 MHz, which is the maximum available frequency of the function generator. We set *I*_{sspd} to be relatively low (10 μA) and set *N*_{photon} to be relatively high (~10^{3}) in order to observe *CR*_{aqfp} under the condition that the SSPD outputs a current pulse in response to a laser pulse with an almost 100% probability and that it does not generate current pulses against stray light from the pulsed laser source due to a poor extinction ratio. Since the output count rate of the SSPD is almost the same as the laser pulse rate under this condition, the validity of the value of *f*_{sample} can be easily investigated by comparing *CR*_{aqfp} with the laser pulse rate (10^{6} cps). Figure 4 shows the measurement results, where *I*_{sspd} = 10 μA, *I*_{th} = 1.2 μA, and *N*_{photon} is approximately 10^{3}. *CR*_{aqfp} increases with *f*_{sample}, because the probability that the AQFP readout interface detects the current pulse from the SSPD increases as the period of *f*_{sample} approaches the decay time of the current pulse, which was approximately 10 ns as shown in the inset of Fig. 4. For an *f*_{sample} of 100 MHz, *CR*_{aqfp} was almost equal to the output rate of the pulse laser (10^{6} cps), which indicates that the AQFP readout interface does not miss most of the current pulses from the SSPD. Therefore, we determined *f*_{sample} to be 100 MHz. Finally, we observed *CR*_{aqfp} as a function of *N*_{photon} to demonstrate that the AQFP readout interface correctly digitizes *I*_{in} in accordance with the detection behavior of the SSPD. Figure 5 shows output count rates as a function of *N*_{photon} for an SSPD with and without AQFP readout interfaces, where *I*_{sspd} = 10 μA, *I*_{th} = 1.2 μA, and *f*_{sample} = 100 MHz. The markers represent the count rate using the AQFP interface (*CR*_{aqfp}) and the line represents the count rate without using the AQFP interface (*CR*_{sspd}). *CR*_{sspd} was measured using a standard readout scheme, where the output signal of the SSPD was applied to the pulse counter via a bias tee and LNAs. The figure shows that *CR*_{aqfp} agreed well with *CR*_{sspd} for the entire range of *N*_{photon}, which clearly indicates that the AQFP readout interface correctly digitized the SSPD current pulses.

## 4. Conclusion

We proposed a low-power and low-current readout interface for an SSPD using AQFP logic. The measurement results showed that the AQFP readout interface correctly sampled and digitized the current signal from the SSPD. It was revealed that the AQFP readout interface uses sufficiently low power and current for a compact cryocooler, because the temperature of the sample stage did not change even after the AQFP readout interface was turned on. For our next step, we will design and demonstrate an AQFP readout interface integrated with a multi-pixel SSPD array in the same cryocooler, which includes an AQFP-based signal processor to encode the current signals from the SSPD array. The signal processor would be a conventional binary encoder, which generates log_{2}(*N*) digital outputs from *N* digital inputs, where *N* is an integer. For a 1,024-pixel array, we can obtain the spatial information of the array from log_{2}(1,024) = 10 parallel output lines by using the signal processor, which helps reducing the number of readout coaxial cables. The advantage of AQFP logic is that the amount of ac bias current does not increase even if a signal processor is added and the circuit complexity increases with the number of pixels. Therefore, we can avoid increasing the Joule heating generated by the bias currents and the resistance of coaxial cables, which is much larger than the power consumption of superconductor logic. We expect that we will be able to achieve a many-pixel SSPD array by using an AQFP readout interface.

## Funding

Japan Society for the Promotion of Science (JSPS) Kakenhi Kiban (A) (No. 26249054); Japan Science and Technology Agency (JST) PRESTO (No. JPMJPR1528).

## Acknowledgments

The circuits were fabricated in the Clean Room for Analog-digital superconductiVITY (CRAVITY) of the National Institute of Advanced Industrial Science and Technology (AIST) by using the standard process (STP2). The authors would like to thank C. J. Fourie for providing the 3D inductance extractor, InductEx.

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