We report the pulsed and continuous wave (cw) performance of 10-stage interband cascade lasers (ICLs) emitting at both λ ≈3.2 μm and λ ≈3.45 μm. The slope efficiency is higher while the external differential quantum efficiency per stage remains about the same when comparison is made to earlier results for 7-stage ICLs with similar carrier-rebalanced designs. At T = 25°C, an 18-μm-wide ridge with 4.5 mm cavity length and high-reflection/anti-reflection coatings emits up to 464 mW of cw output power with beam quality factor M2 = 1.9, for higher brightness than has ever been reported previously for an ICL. When the cavity length is reduced to 1 mm, both the 10-stage and 7-stage devices reach 18% cw wallplug efficiency at T = 25°C.
© 2015 Optical Society of America
The emerging interband cascade laser (ICL) [1–7] technology has recently been found to produce continuous wave (cw) midwave-infrared (mid-IR) emission at room-temperature (RT) with significantly lower dissipated power than its intersubband cousin, the quantum cascade laser (QCL). If input power is the dominant figure of merit, as is often the case for gas-phase chemical sensing applications, 3-5 ICL stages are known to be optimal for ICLs operating at wavelengths between 3 and 4 μm [4,5]. This optimization is governed by the balance between the lower voltage drop required to bias fewer stages, as opposed to a lower threshold current density with more stages. However, if the objective is to maximize the output power it is generally advantageous to increase the stage multiplicity, since more stages produce a higher slope efficiency. Then the trade-off must weigh added sample heating, and thus higher effective operating temperature, when more stages are included, as well as a greater potential for permanent device damage. It is noteworthy that the highest cw output powers have been produced by recent ICLs with 7 (and now 10) stages, which ironically represents a return to the range being explored to minimize the threshold drive power before carrier rebalancing  was introduced. For both low- and high-power applications it is difficult to derive the optimal number of stages theoretically, since knowledge of the internal loss distribution between the active core, n--GaSb separate confinement layers (SCLs), and cladding layers is insufficient to allow a fully reliable modeling of the relation between loss and optical confinement factor. It is known, however, that due to redistribution of the optical mode between the various regions, the external differential quantum efficiency (EDQE) is sensitive to both stage multiplicity and SCL thickness .
We recently reported the cw output powers and brightnesses (at λ ≈3.45 μm) produced by 7-stage ICLs with carrier rebalancing and relatively thick SCLs [8,9]. Even though the active-core confinement factors were quite similar to those of earlier 5-stage devices (because the stage multiplicity and SCL thicknesses were both increased), the experimental slope efficiency increased faster than the number of stages, indicating a net decrease of the internal loss. This led to cw output powers as high as 592 mW (with a beam quality factor M2 = 3.7) from a 32-μm-wide ridge with sidewall corrugations, corresponding to higher brightness than had been attainable using analogous 5-stage designs . In the present work, we have studied how the ICL performance varies when the number of stages is increased further, to 10. We report results for both broad-area devices operated in pulsed mode, and the cw operation of narrow ridges with corrugated sidewalls.
2. Design and MBE growth
The 10-stage ICL designs were similar to those of the previously-reported 7-stage devices [8,9]. In Wafer A, two low-doped GaSb SCLs, each with thickness of 750 nm, were positioned on each side of the active stages. The central portion of each SCL was n-doped with Te to a nominal level of 5x1015 cm−3, while the interface and transition regions were doped more heavily to minimize the parasitic voltage drop. Also to minimize loss, the inner region of each InAs/AlSb superlattice (SL) cladding layer, which overlaps a portion of the optical mode, was n-doped to 7.5x1016 cm−3. The active-core confinement factor for Wafer A increased by ≈20% by comparison with 7-stage designs with the same SCL thicknesses, while the overlap with each SCL decreased by only ≈0.01 in absolute units. Therefore, any variation of the internal loss may be attributed primarily to the active core of the devices.
The active core of Wafer B was split into two groups of 5 stages each. The structure contained 3 SCL regions with a common thickness of 500 nm, with two positioned immediately outside the active stages, as usual, while the third was placed in the middle to separate the two groups of 5 stages. The active core design and doping scheme were unaltered from Wafer A. This design increased the active-core confinement factor by a further 20%, mostly at the expense of reduced overlap with the SL cladding regions. The 3-SCL design is especially flexible, in that it allows the active-core confinement factor to be tuned independently from the modal overlap with the SCLs. Calculated near-field optical-field profiles for the lowest-order TE-polarized optical mode in Wafers A and B are shown in Fig. 1(a) and (b), respectively. The corresponding far-field profiles along the growth (fast-axis) direction are shown in Fig. 1 (c). Because the total thickness of the SCLs and the active stages is the same in the two samples, they exhibit similar values of the far-field divergence angle.
In addition to Wafers A and B that were designed for emission at λ ≈3.5 μm, two other 10-stage wafers were grown for emission at ≈3.2 μm. Two 700-nm-thick SCLs were used in Wafer C, while Wafer D incorporated three 620-nm-thick SCLs, both outside and between 2 groups of 5 stages, by analogy to Wafer B. The active-core confinement factors calculated for both of the shorter-wavelength wafers were comparable to those of Wafer A. The near-field and far-field profiles of Wafers C and D are very close to those of Wafers A and B, respectively.
The ICL wafers were grown on n-GaSb (100) substrates by molecular beam epitaxy . Contact lithography and wet chemical etching were used to produce 150-μm-wide ridges with intentional lateral corrugation of the sidewalls to eliminate parasitic lasing modes. The uncoated cavities were cleaved to 2 mm length, and tested at a pulse repetition rate of 3 kHz and width of 250 ns. At 300 K, the peak emission wavelength was 3.44-3.45 μm for Wafers A and B and 3.21 μm for Wafers C and D.
3. Pulsed characterization
The broad-area lasers fabricated from Wafer A displayed a threshold voltage (Vth) of 4.5 V and threshold current density (Jth) of 164 A/cm2 at 300 K, with Jth increasing to 451 and 826 A/cm2 at 350 and 375 K, respectively. The corresponding characteristic temperature (between 300 and 350 K) of T0 ≈49 K falls within the typical range for 7-stage devices at the same wavelength. Wafer B had similar threshold characteristics, with Vth = 4.4 V and Jth = 156 A/cm2 at RT, and T0 = 50 K. The thresholds for Wafers C and D were also comparable, with Vth = 5.6 V and Jth ≈195 A/cm2 at RT, and T0 = 48-49 K.
The filled green points in Fig. 2 plot experimental slope efficiencies near threshold for the broad-area devices fabricated from Wafers A and B. Also shown are the analogous data for earlier carrier-rebalanced 5-stage (red)  and 7-stage (blue) [8,9] designs emitting at similar wavelengths in the range λ = 3.2-3.8 μm. The increase in slope efficiency by more than a factor of 2, in moving from 5-stage to 10-stage devices, can be explained by the considerably thicker SCLs employed in the present ICLs. For Wafer A, these slopes correspond to EDQEs per stage (from both facets) of 45%, 30%, and 20% at T = 300, 350, and 375 K, respectively, while the results for Wafer B are 43%, 28%, and 20%. These values fall roughly in the middle of the analogous EDQEs for 7-stage ICLs. The shorter-wavelength Wafers C and D had slightly lower EDQEs of 41-42% at RT. These decreased by nearly a factor of 2 at T = 350 K, and Sample D did not turn on at all in pulsed mode at 375 K. This faster temperature degradation has been characteristic of all shorter-wavelength ICLs studied to date . While the reason is not yet understood, our results confirm that the trend holds consistently as the stage multiplicity and waveguide design are varied.
The internal loss close to the lasing threshold can be extracted from the EDQE if we assume fixed values for the internal efficiency and uncoated facet reflectivity (R). Previous cavity-length studies have consistently yielded internal efficiencies of ≈80% [4,13], which is the value we adopt in this work. While the internal efficiencies of individual lasers may vary around that value, large changes in the reported internal loss are not expected, given that the internal efficiency approaches 100%. The simplified expressions in  lead to R in excess of 40%, although it should be noted that the ICL waveguide is more complex than was assumed in that article. Here we employ R = 41%, with the caveat that any reduction in this value will increase the derived internal losses by a factor of ≈1.12 ln(1/R) without altering the relative values for different samples. The results for internal loss in 10-stage Wafers A-D are represented by the green points in Fig. 3, which also plots the losses for numerous earlier 5-stage and 7-stage ICLs emitting at wavelengths between 2.78 and 5.52 μm. The losses of 3.4 and 4.0 cm−1 for Wafers A and B, respectively, fall well within the typical range of values for 7-stage devices, even though they exceed the best 7-stage results. The losses extracted for Wafers C and D (4.0 and 4.2 cm−1, respectively) are only a little higher. We conclude that the ICL design space may be extended to carrier-rebalanced structures with at least 10 stages, since at most modest additional loss is introduced when the modal overlap with the core is enhanced. Since the pulsed results for the 10-stage devices were somewhat encouraging, narrow ridges were fabricated from some of the wafers to assess impacts of the additional cw heating and higher operating voltage.
4. Narrow-ridge processing and continuous-wave performance
Narrow ridges were fabricated from Wafers A and D by photolithography and a Cl-based inductively coupled plasma (ICP) reactive-ion etching process. The etching proceeded to just below the active core, in order to prevent the severe current spreading [8,15] that otherwise occurs in ICLs owing to the large ratio of vertical to in-plane electrical conductivities. The sidewalls of the ridge were patterned with corrugations having peak-to-valley amplitude ≈1.0 μm and period 2.0 μm, with the goal of suppressing lasing in higher-order lateral modes [8,11]. Following the etching, a 250-nm-thick Si3N4 layer was deposited by plasma-enhanced chemical vapor deposition, after which a top contact window was etched back using SF6-based ICP. Approximately 100 nm of SiO2 was also deposited by sputtering, in order to block occasional pinholes in the Si3N4.
The top contact metallization comprised Ag/Ti/Pt/Au (5nm/20nm/150nm/1000 nm), while the bottom contact was Ag/Cr/Sn/Pt/Au (5nm/30nm/40nm/150nm/100nm). The Au layer in the top contact was relatively thick, so as to prevent thermal damage to the facets near the cleaving lanes where a large voltage drop can cause excessive heating .The ridge was then electro-plated with ≈5 μm of Au, which was patterned with 30-μm-wide gaps to allow cleaving into individual laser cavities.
The lasers were cleaved to cavity lengths of either 1 or 4.5 mm. A high-yield proprietary process  was used to mount each device epitaxial-side-down on a C-mount attached to a thermoelectric cooler. A high-reflection (HR) coating comprised of 200 nm Al2O3 topped by 100 nm Au was deposited on the device’s back facet, while an anti-reflection (AR) coating consisting of a λ/4 layer of Al2O3 (estimated reflection ≈2%) was deposited on the front facet.
Figure 4(a) shows the light-current characteristic and wall-plug efficiency (WPE) at T = 25°C for a 22-μm-wide and 4.5-mm-long ridge fabricated from Wafer A. The maximum cw output power reaches 500 mW, while the WPE is 11% at its maximum and is still close to 10% at the highest current. Figure 4(b) shows the corresponding far-field emission profiles at several different output powers.
These profiles are combined with theoretically-determined near-field distributions to calculate the “effective M2”, in the same manner as in our previous works [8,11]. The “effective M2” figure of merit for the beam quality does not rely solely on the measurement on the beam width at some fraction of the peak intensity, but is based on the variances of the intensity distributions in the measured far-field profile and the calculated near-field profile. This results in a reliable measure of beam quality even when the far-field distribution is skewed. The values derived for this device range from M2 = 1.9 at P = 289 mW to 2.5 at P = 485 mW. The latter corresponds to a normalized brightness figure of merit of B ≡ P/M2 = 194 mW. An even higher brightness can be obtained by employing slightly narrower ridges. In particular, an 18-μm-wide/4.5-mm-long ridge fabricated from the same wafer exhibited the far-field profiles shown in Fig. 5(a), which correspond to B = 464mW/1.9 = 244 mW. While this is ≈50% higher than the best previous ICL results, for 7-stage devices with similar waveguide design , the difference is attributable mostly to our use in the present work of 4.5-mm-long cavities in place of 3 mm for the 7-stage ridges. We also note that nearly the same brightness (B = 243 mW) was recently produced by a 7-stage ICL (λ = 3.11 μm) with ridge width 18 μm and cavity length 4.5 mm. The far-field intensity distribution for that device is shown in Fig. 5(b). Although the brightness is nearly the same as for the 10-stage device of Fig. 5(a), it is realized at a lower maximum cw power of 326 mW coupled with a better beam quality factor of M2 ≈1.3. The lower WPE of 6.9% for the 7-stage 3.11 μm emitter at its highest power is characteristic of shorter-wavelength ICLs.
Compared to the devices processed from Wafer A, narrow ridges processed from Wafer D (λ = 3.21 μm) displayed somewhat lower maximum cw output powers at 25°C (the highest was 344 mW for an HR/AR-coated device with 22 μm width, 4.5 mm length, and corrugated sidewalls) and wallplug efficiencies (at most 6.7% at the highest current). However, the beam quality factors were again somewhat better, ranging from M2 = 1.4 to 2.1 under the conditions investigated. It is unclear why the 7-stage and 10-stage ridges processed from shorter-wavelength wafers both display generally better beam qualities than the corresponding longer-wavelength devices with the same cavity dimensions. The highest brightness for a device from Wafer D was 192 mW for an 18-μm-wide ridge. While this falls short of the best values produced by the longer-wavelength devices from Wafer A, and also the 7-stage shorter-wavelength devices mentioned above, it nonetheless exceeds any brightness reported previously for an ICL.
We can further compare the performance of 7- and 10-stage ICLs by measuring the WPEs for much shorter (1-mm-long) cavities. The results as a function of current in Fig. 6(a) indicate WPEs up to 18% for two different ridges processed from Wafer A, with 12- and 15-μm ridge widths and HR/AR facet coatings. For comparison Fig. 6(b) plots recent WPE results for two 7-stage ridges with the same widths, lengths, and coatings, along with light-current curves. The maximum WPE is again 18%, which compares to 21% for the highest value ever reported for a QCL operating in cw mode at RT .
We have presented pulsed and cw performance characteristics for 10-stage ICLs with carrier rebalancing in the active core and optical waveguides optimized for low loss. The results are compared with those for recent 7-stage devices having similar active core and waveguide designs. The larger stage multiplicity increases the slope efficiency above threshold, but also the bias voltage and heat generation during cw operation. Fortunately, the voltage scaling is sublinear because the parasitic series resistance originates mostly outside the active core. However, the additional heating increases the threshold current density and reduces the slope efficiency. Wallplug efficiencies for the best 7- and 10-stage narrow ridges are comparable, with 10-12% being typical at the currents producing the highest cw output powers. Although the internal losses of 3.4-4.2 cm−1, as determined from the pulsed efficiencies of broad-area lasers processed from wafers A-D, are a little higher than the best 7-stage values (2.5-3.0 cm−1), up to now the 10-stage designs have undergone far less optimization. Empirically, we find that 10-stage ridges with corrugated sidewalls from wafer A (λ ≈3.45 μm) generate higher cw output powers (up to 500 mW) than any earlier devices with comparable beam quality. The maximum normalized brightness factor of 244 mW is therefore considerably higher than any previously-reported ICL result. However, this appears attributable more to the longer cavities used in the present work rather than an inherent superiority of the 10-stage designs. Shorter-wavelength lasers with 10 stages from Wafer D (λ = 3.21 μm) produced up to 344 mW, with a normalized brightness of 192 mW.
We tentatively conclude, based on a comparison of the results reported here with earlier data for 5- and 7-stage designs, that the performance of ICLs optimized for high-power applications in the 3-4 μm wavelength range peaks for a stage multiplicity between about 7 and 10. The precise number is probably not critical, however, since the maximum achievable power and brightness are unlikely to vary dramatically within that range.
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