We report fabrication and optical characteristics of an InGaP/GaAs heterojunction phototransistor (HPT) transferred to a Si substrate by a metal wafer bonding (MWB) and epitaxial lift-off (ELO) process at room temperature. An intermediate Pt/Au double layer between the HPT layer and Si provided a very smooth surface by which to achieve the MWB, and excellent durability against the acid solution during the ELO process. These processes were observed using scanning electron microscope (SEM) and atomic force microscopy (AFM). While the results on a low temperature photoluminescence (LTPL) signal and high resolution x-ray diffraction (HRXRD) rocking curve of the bonded device film implied a defect-free bonding, a very low collector dark current of the fabricated HPT was observed. The optical performance of a bonded InGaP/GaAs HPT on Si, operating at 635 nm wavelength is also investigated.
© 2015 Optical Society of America
For decades GaAs-based heterojunction phototransistors (HPTs) have been extensively investigated for use as attractive photodetectors (PDs) in optoelectronic integrated circuit (OEIC) receiver and various other sensor applications due to their high sensitivity and high-speed performance [1–4]. Although they have superior performance and hence market potential, practical applications of the devices have been limited due to the high cost of the GaAs wafer. On the other hand, Si or Ge based PDs have been used in OEICs [5, 6], because the material processing of these is fully compatible with the mature Si complementary metal-oxide-semiconductor (CMOS) line and is favorable for co-integration with CMOS electronic circuits and mass production. However, because conventional Si or Ge PDs have the disadvantages of low sensitivity and bandwidth due to their indirect band gap and high dark current, alternative technology should be developed. As an alternative to Si or Ge-based PDs, the GaAs-based HPTs seem to offer promising solutions for development of smaller and faster devices as well as increased functionality due to their favorable optical properties. A viable technology solution must not only provide performance and scalability, but also cost-effectiveness. Therefore, monolithic integration of III-V compound semiconductors with a Si wafer could be the key technology for realizing high-performance, low-cost OEIC or sensor systems, consisting of GaAs HPTs combined with CMOS technology-based electronics.
Historically, techniques for hetero-epitaxial growth of single crystalline III-V layers on a Si substrate were actively studied to integrate III-V on a Si substrate. However, these still have misfit and threading dislocation problems due to the inherent nature of large difference in the lattice constants of III-V and Si [7, 8], resulting in deterioration of device performance. In order to circumvent such drawbacks, elaboration of wafer bonding techniques has been extensively conducted for a long time to realize the integration of III-V based devices on a Si platform [9–17]. Diverse wafer bonding techniques, including direct bonding [9, 10], oxide bonding [11, 12], polymer bonding [13, 14], and metal bonding [15–17], have been developed. After carrying out these methods, however, donor wafers are fully removed in most studies. Because applications for the III-V based devices are already hindered by the high cost of their substrate, its removal is a tragedy.
Considering these issues, an epitaxial lift-off (ELO) is one of the most promising technologies to reduce the high cost of the III-V based wafers. The sacrificial layers inserted between the device layers and the III-V based substrates are selectively removed, and then the separated donor substrates can be reused [18, 19]. Since the bonding layers must be durable during the ELO process, metal wafer bonding (MWB) is the most attractive approach for combination with an ELO process. A gold-based MWB technology, in particular, has the advantage of a low-temperature process that prevents residual stress leading to bowing or cracks , and the additional advantage of acting as a mirror for extending the optical path of an active layer in optoelectronic conversion devices, resulting in high quantum efficiency .
In this work, to establish the feasibility of MWB and ELO for cost-effective high performance GaAs-based HPTs integrated on a Si substrate, for the first time, we describe the fabrication of InGaP/GaAs HPTs transferred onto Si substrate utilizing the MWB and ELO process at room temperature. A Pt/Au double layer, which was used for the MWB, perfectly tolerated the hydrofluoric (HF) acid solution used for etching of an Al0.8Ga0.2As sacrificial layer during the ELO process. Here, Pt served as a barrier to diffusion of unfavorable atoms between the Au and substrate during device fabrication. The quality of the bonded device film on the Si wafer was investigated using scanning electron microscopy (SEM), atomic force microscopy (AFM), high resolution x-ray diffraction (HRXRD), and low temperature photoluminescence (LTPL) spectroscopy. In addition, the optical performance of the bonded InGaP/GaAs HPTs on Si is discussed.
2. Fabrication and experiment
The schematic of the transferred-substrate technology using MWB and ELO is shown in Fig. 1(a). The InGaP/GaAs HPT structures were grown by solid source molecular beam epitaxy (MBE) on 2-inch semi-insulating GaAs substrate. From bottom to top, the device structures consisted of a 10-nm-thick Al0.8Ga0.2As sacrificial layer, 650-nm-thick n+-GaAs collector contact layer, a 20-nm-thick n+-InGaP etch-stop layer, a 800-nm-thick n--GaAs collector, a 80-nm-thick p+-GaAs base, a 50-nm-thick n-InGaP emitter, a 50-nm-thick n+-InGaP sub-emitter, an 150-nm-thick GaAs emitter contact layer, and an 100-nm-thick InGaAs capping layer. The HPT and Si wafers were diced into 10 × 10 and 20 × 20 mm2 samples, respectively. The fabrication was started with a wafer cleaning process combining ultrasonic cleaning with organic solvents and a chemical cleaning. A Pt/Au (10/10 nm) double layer was deposited on top of the epitaxial layers on the GaAs donor wafer and Si substrate simultaneously, using an e-beam evaporator. This metal scheme also serves as the bottom electrode for an emitter contact of a completed HPT. After the Ar-based plasma treatment of the two wafers, MWB was conducted immediately at room temperature at a uniaxial pressure < 0.5 MPa for 2 h. Then, the bonded sample was immersed in HF (10%) acid solution. The GaAs donor wafer was separated in less than 24 h, which is consistent with other reported studies [18–20].
In the end, two-terminal InGaP/GaAs HPTs were fabricated utilizing a standard photolithography and wet-etching process. A Ni/Au/Ge/Ni/Au (20/100/50/30/150 nm) metallization was evaporated to create a collector contact, followed by rapid thermal annealing (RTA) for ohmic contact at 380 °C for 40 s in N2 gas. Wet chemical etching for mesa structure was performed down to the Pt/Au bottom contact. Finally, the collector contact layer on the optical window area was selectively etched until the InGaP etch-stop layer, using the collector metal as a mask. Thus, incident light can be directly absorbed at the undoped 800-nm-thick GaAs collector layer. After cleaving the fabricated HPT, cross-sectional SEM image of the bonded HPT layers on the Si substrate was taken as shown in Fig. 1(b). The intended device structure of the InGaP/GaAs HPT layers on the metal (Pt/Au)/Si was clearly observed.
The optical performance of the fabricated devices was characterized by utilizing a 635-nm laser diode and a HP 4156A semiconductor parameter analyzer at room temperature. A lensed fiber was used to couple light into the optical window of the devices. For laser power calibration, the incident optical power through a lensed fiber was measured using a Newport 1835-C optical meter equipped with a Newport 818-UV/DB silicon photodetector in a dark box.
3. Results and discussion
3.1 Investigation of quality for bonded device film on Si
The quality of the bonded thin-device film is related to device performance. Figure 2 shows AFM images of the surfaces at the three steps in the course of fabrication. The measured root mean square (RMS) value of the deposited Pt/Au double layer on the Si was found to be 0.5 Å, indicating that the contamination-free surface of the metal film was suitable for wafer bonding. The surface roughness of the bonded HPT on the Si after the MWB and ELO process was around 2.8 Å, which is the lowest value ever reported [12, 21]. Although metal aggregation was observed at the surface of the RTA treated sample, its RMS value was as low as 9.4 Å.
To verify crystalline quality of the bonded HPT on Si, high-resolution XRD measurement was performed for the as-grown and the bonded device layers. As shown in Fig. 3, a sharp GaAs substrate peak and its satellite peaks are observed in the rocking curve of the as-grown sample. The satellite peaks might be associated with the InGaP and InGaAs layers. The rocking curves of the as-grown and bonded sample show a negligible difference and the full-with-half-maximum (FWHM) of the GaAs peak of the bonded sample is 38 arc sec, confirming a good crystal quality of the transferred epitaxial layers on Si.
Furthermore, the LTPL measurement was utilized to identify the bonding quality of the sample. The LTPL signal of the bonded device film at 13 K was compared with that of the as-grown HPT on a GaAs wafer, as shown in Fig. 4. The two distinct peaks of the both samples were well resolved due to the free carriers and excitons in typically GaAs material . However, a blue shift of approximately 10 meV was observed in PL spectra of the bonded device film because their epitaxial layers is under compressive strain due to the larger thermal expansion coefficient of Si than GaAs substrate. This phenomenon cannot be observed in the PL measurement at room temperature. The broad band larger than 1.52 eV is attributed to the emission from the heavily doped n+-GaAs layers due to the Burstein-Moos effect . Whereas the shape of the PL spectrum is not changed considerably, the intensity of the light emitted from the bonded device film is about a factor 2.5 higher than that from the as-grown sample. This show that the some emitted light from the GaAs layers of the as-grown sample might be lost at the InGaP emitter layers having the higher bandgap energy than GaAs. All this indicates that the MWB interface has potential for fabricating a wide range of devices.
3.2 Device performance
Collector dark current (ICdark), as function of the bias voltage across the collector and the emitter (VCE) of the fabricated HPT, is shown in Fig. 5. The ICdark of the device with a 156 × 138 μm2 mesa area, at a VCE of 1 and 2 V, is around 0.22 and 0.75 pA, respectively. These values are comparable to, or less than, the collector dark currents of the reported InGaP/GaAs HPT grown on GaAs substrate [2, 3]. The measured ultra-low ICdark of the transferred InGaP/GaAs HPT on Si also validates the good material quality despite going through bonding stress and prolonged exposure to the acid solution. Figure 5 shows also the dependence of the collector photocurrent (ICph) on the VCE while varying the illuminating optical power levels from 10 nW to 1.28 μW at a wavelength of 635 nm. The ICph increased with the incident optical power. Electron-hole pairs are generated in the collector while the lightwave is incident on the device. The holes and electrons in the collector are swept into the base and the collector contact layer, respectively, due to the external electric field created by the VCE. The accumulated holes in the base lower the potential barrier for electrons at the emitter-base junction. As the optical power increases, so do the number of holes accumulated in the base. Finally, electrons in the emitter could be easily injected into the collector after passing through the thin base layer, resulting in an ICph with optical gain.
The optical gain can be defined as:Figure 6 shows the optical gains of the device according to the optical input power levels at 0.5, 1.0, 1.5, and 2.0 V of the VCE, respectively. The measured Gopt of the device at VCE = 0.5 V is 22.9 and 3.2 under the Pin of 1.28 μW and 10 nW, corresponding to a responsivity of 11.7 and 1.6 A/W, respectively. The Gopt of the device increased with both Pin and VCE. The optimized device template and structure for the proposed fabrication method will lead to superior optical performance. Here, a direct comparison between transferred HPT on Si and as-grown HPT on GaAs is important to show the genuine performance of transferred HPT on Si. However, we note that the direct comparison of these two devices is quite difficult. Because the epitaxial structure is inverted after the wafer bonding, a direct comparison with a same epitaxial structure is impossible using the same wafer. Also for the growth of inverted structure, a growth temperature and an insertion of set-back layer (needed for protection from unfavorable intermixing and dopant diffusion) should be re-tuned. Therefore, in this paper, we do not show the data for direct comparison. To supplement and/or replace this comparison, we have used the LTPL spectra and HRXRD result as shown above.
The first demonstration of an InGaP/GaAs HPT transferred onto a Si substrate, utilizing a Pt/Au double layer based MWB and ELO technique was successfully reported. The good quality of the bonded device film was confirmed by SEM, AFM, and μ-PL methods. The fabricated HPTs on Si substrate showed very low surface roughness of 9.4 Å. In addition, the LTPL and HRXRD results of the bonded device were remarkably consistent with the as-grown device on GaAs substrate. The ICdark of the fabricated HPT at VCE = 1 V was as low as 0.22 pA. The measured optical gains of the device were higher than ~22 in the investigated range of bias voltages. Consequently, the proposed MWB combined with the ELO, is promising for heterogeneous integration of compound semiconductors on Si platforms.
This work was supported by the KIST Institutional Program of Flag-ship (2E25800) and KIST-UNIST partnership program.
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