We theoretically propose a silicon nitride (Si3N4) grating coupler (GC) with both ultrahigh efficiency and simplified fabrication processes. Instead of using a bottom distributed Bragg reflector (DBR) or metal reflector, a bottom Si grating reflector (GR) with comparable reflectivity is utilized to improve the coupling efficiency. The fully etched Si GR is designed based on an industrially standard silicon-on-insulator (SOI) wafer with 220 nm top Si layer. By properly adjusting the trench width and period length of the Si GR, a high reflectivity over 90% is obtained. The Si3N4 GC is optimized based on a common 400 nm Si3N4 layer sitting on the Si GR with a SiO2 separation layer. With an appropriate distance between the Si3N4 GC and bottom Si GR, a low coupling loss of −1.47 dB is theoretically obtained using uniform GC structure. A further record ultralow loss of −0.88 dB is predicted by apodizing the Si3N4 GC. The specific fabrication processes and tolerance are also investigated. Compared with DBR, the bottom Si GR can be easily fabricated by single step of patterning and etching, simplifying the fabrication processes.
© 2015 Optical Society of America
In the past five years, silicon nitride (Si3N4) has attracted increasingly interest due to its superior passive properties [1, 2 ]. The lower refractive index (n = 2) compared with Si (n = 3.48) enlarges the single mode waveguide size moderately yet is enough for compact PICs. The extended waveguide can reduce scattering loss induced by the sidewall roughness and waveguide dimension variation sensitivity. Ultra-low propagation losses of −0.1 dB/m  and −4.2 dB/m  are realized with low and high confinement Si3N4 waveguides, respectively. With the ultra-low loss, a resonator with ultrahigh quality factor of Q = 8.1x107 is acquired . Also, Si3N4 does not suffer from free carrier and two-photon absorption, thus it has 17 times smaller Kerr coefficient (n 2 = 2.4x10−15 cm2/W)  than Si (n 2 = 4x10−14 cm2/W)  at the telecom wavelengths. In addition, the thermo-optic coefficient of Si3N4 (4x10−5/K)  is about 5 times smaller than that of Si (1.8 x10−4/K) , making Si3N4 devices less temperature sensitive. For the fabrication, Si3N4 can be deposited by plasma enhanced chemical vapor deposition (PECVD)  or low pressure chemical vapor deposition (LPCVD) .
Same as the silicon PICs, the fiber-chip coupling is still a challenge for Si3N4 platform. Grating coupler (GC) as one of the common coupling methods for silicon platform with the advantages of avoiding cleaving the chip and making wafer-scale testing possible  also applies to the Si3N4 platform. A Si3N4 GC has been proposed and fabricated in . However, the coupling efficiency is as low as 27%. A bottom metal or distributed Bragg reflector (DBR) is usually employed to realize efficiency enhancement [14, 15 ]. A bottom DBR is predicted to have the potential to reduce the coupling loss to −1.9 dB  and an experimental result of −2.5 dB has also been realized . But yet, the DBR needs multilayer (usually 2 pairs of Si/SiO2 layers) deposition, thickness control and surface flattening to realize a high reflectivity. As for the metal mirror, it will be fragile at high temperature and may not be compatible with other photonic devices . In addition, the loss is still has a significant distance to the sub −1 dB loss of Si GC with bottom reflector .
In this paper, a Si3N4 GC with ultralow loss but simplified fabrication processes is theoretically proposed. Instead of using the DBR or metal reflector, a high contrast grating reflector (GR) is employed as a bottom reflector to improve the coupling efficiency . The GR is realized by fully etching the 220 nm top Si layer on a standard silicon-on-insulator (SOI) wafer. By carefully optimizing the trench width and period length of the Si GR, a high reflectivity as DBR is obtained. The Si3N4 GC is optimized based on a 400 nm Si3N4 layer on the top of Si GR with a SiO2 separation layer of oxide. With an appropriate separation layer thickness, a low loss of −1.47 dB and a record ultralow loss of −0.88 dB are theoretically obtained for uniform and non-uniform Si3N4 GCs, respectively.
2. Theory and design of the proposed Si3N4 GC
The structure of the proposed Si3N4 GC is shown in Fig. 1 . A 400 nm Si3N4 layer is deposited on an SOI wafer with 220 nm top Si layer and 2 μm buried oxide (BOX) layer, which is widely used in silicon photonics foundries . For the convenience of fabrication, the Si3N4 GC is fully etched. A 750 nm SiO2 cladding layer covers the Si3N4 GC, which is optimized to not only protect the device but also enhance the coupling efficiency . The bottom Si GR is also fully etched through the Si layer at the top of SOI wafer. The Si3N4 and Si layers are separated by a SiO2 layer with a thickness of H. The design of the proposed Si3N4 GC structure comprises 3 steps:
- 1. Optimizing the pure Si3N4 GC for highest coupling efficiency.
- 2. Optimizing the pure Si GR for highest reflectivity.
- 3. Optimizing the separation layer thickness H for highest coupling efficiency.
All optimizations are investigated using a commercial 2D Finite-difference Time-domain (FDTD) solver from Lumerical Solutions, Inc  with a grid size of 20 nm and the proposed Si3N4 GC is designed for transverse electric (TE) mode.
2.1 Optimization of pure Si3N4 GC
The pure Si3N4 GC is firstly optimized without Si substrate. A tilted coupling angle of θ = 8° between the fiber and the GC surface is chosen to avoid the second-order reflection. The input fiber mode is represented by a Gaussian source with a mode field diameter of 10.4 μm in the simulation . The coupling efficiency is defined as the ratio of detected power in the TE0 mode at the Si3N4 waveguide to the input power, considering the higher order modes will leak out of the waveguide along the way . The detected power in the TE0 mode is calculated by the overlap integral of the Si3N4 waveguide TE0 mode with the detected field at the output Si3N4 waveguide. Since the Si3N4 GC is fully etched, the coupling efficiency only depends on the groove width of W GC and period length of P GC. Figure 2(a) shows the coupling loss calculated for a group of W GC with corresponding P GC to realize a peak wavelength at 1550 nm. The period number of grating is set to 14 and the input position is optimized for each W GC. It can be seen that the highest coupling efficiency is obtained with W GC = 550 nm and the corresponding period length is P GC = 1095 nm. The coupling spectrum is illustrated in Fig. 2(b) (the blue line), a broad 1-dB bandwidth of 70 nm is observed, which is 1.75 times larger than Si GC . This is mainly because the Si3N4 GC has a lower effective refractive index and dispersion .
However, even with the optimized W GC and P GC, the loss of the Si3N4 GC is still as high as −5.80 dB. The main contributor to the loss is that a large portion of the power transmits through the Si3N4 GC to the bottom as shown in Fig. 2(c). A bottom Si layer, which is often utilized as mechanical substrate in Si3N4 PICs, can partly reduce the coupling loss by partially reflecting the downward coupled light, if a proper SiO2 layer thickness H SiO2 between the Si3N4 GC and Si substrate is selected. The coupling loss as a function of H SiO2 is calculated as shown in Fig. 2(d). It turns out that the coupling efficiency periodically depends on H SiO2, and constructive interference happens at the peak point while destructive interference happens at the valley point. A lowest loss of −3.51 dB is acquired at H SiO2 = 1.62 μm. The coupling spectrum and field distribute with Si substrate are also illustrated in Figs. 2(b) and 2(c), respectively. It can be apparently observed that part of the downward coupled light is reflected by the bottom SiO2/Si interface.
The coupling efficiency can be further enhanced by increasing the mode overlap between the fiber and GC with a non-uniform structure . To do that, an apodized Si3N4 GC with Si substrate is explored. The period number retains 14 and the minimum feature size is set to be 100 nm, fulfilling with the boundary of deep-ultraviolet (DUV) lithography [14, 17 ]. Instead of using a genetic algorithm, we take a straightforward way to optimize the Si3N4 GC structure. The grating periods are optimized one by one from the front to the end by sweeping the groove width W GC with corresponding period length for satisfying the Bragg condition. The dimensions that deliver the highest coupling efficiency are saved and the procedure is recurrently performed until the efficiency improvement less than 0.1%. Just after two rounds, the coupling efficiency converges to −3.13 dB and the coupling spectrum is illustrated in Fig. 2(b), showing an improvement of 0.38 dB. The finalized structure parameters of the apodized Si3N4 GC are listed in Table 1 .
2.2 Optimization of pure bottom Si GR
As analyzed before, the chief source for coupling loss is the downward coupled power. Though a Si substrate can recycle some of it, due to the low reflectivity at bottom SiO2/Si interface, the −3.13 dB loss still remains to be improved. A bottom reflector with high reflectivity can significantly reduce the loss. To simplify the fabrication process, a bottom reflector based on a Si grating rather than DBR or metal mirror is adopted in our scheme. A fully etched grating is adopted not only for the convenience of fabrication but also for the high-contrast between the grooves and teeth to realize a high reflectivity . The reflectivity of Si GR also depends on the groove width W GR and period length P GR. In the simulation, an infinite SiO2 cladding layer covers the Si GR, working as the SiO2 separation layer in the whole Si3N4 GC structure. The reflectivity at 1550 nm wavelength is calculated as a function of W GR and P GR, as shown in Fig. 3(a) . Taking both reflectivity and bandwidth into consideration, the Si GR structure is optimized with W GR = 470 nm and P GR = 870 nm. Figure 3(b) shows the reflection spectrum of the optimized Si GR (red line). It covers the whole C-band with a reflectivity higher than 92%. The light propagating profile is also shown as the inset of Fig. 3(b). It can be obviously observed that only a little light goes through the Si GR and vast majority of the input light is reflected back upward. For comparison, we also explored the performance of a DBR with two pairs of Si/SiO2 layers. The thicknesses of Si and SiO2 layers are optimized to 110 nm and 270 nm, respectively. The reflection spectrum is illustrated in Fig. 3(b) (the blue line). It can be seen that the Si GR has a comparable reflection performance with DBR except for a slightly narrower bandwidth.
2.3 Optimization of the whole Si3N4 GC structure
After individual optimizations of pure Si3N4 GC and bottom Si GR, the thickness of SiO2 separation layer H is the remaining determinant for the coupling loss of the whole Si3N4 GC structure. The calculated coupling efficiency of the uniform Si3N4 GC with respect to H is shown in Fig. 4(a) , indicating it also periodically depends on H and the lowest coupling loss of −1.47 dB locates at H = 1.68 μm. The coupling loss spectrum is illustrated in Fig. 4(b) (the red line). The coupling efficiency is improved by 2 dB compared to the uniform one with Si substrate. As for the apodized scheme, an ultralow loss of −1.01 dB is acquired as shown in Fig. 4(b) (green line). A further record ultralow loss of −0.88 dB is predicted by adjusting the period length of bottom GR from 870 to 890 nm as shown in Fig. 4(b) (blue line). Because a tilted input is employed in the Si3N4 GC while a vertical input is considered for the convenience of simulation when optimizing the bottom Si GR. This can be compensated by enlarging the period length of the GR. For the convenience of fabrication in publicly accessible silicon photonic foundries, we also optimized the Si3N4 GC with extended critical dimension of 150 nm and the optimal loss only slightly increased to −0.90 dB. The first 8 trench widths are then changed to 150 nm, 150 nm, 150 nm, 150 nm, 300 nm, 530 nm, 530 nm and 540 nm, and the following trench widths are same as Si3N4 GC with critical dimension of 100 nm. Besides, the back reflectivity for the Si3N4 GCs with critical dimensions of 100 nm and 150 nm are calculated to 3% and 2%, respectively.
3. Fabrication processes and tolerance
Thanks to the mature manufacture process of Si3N4, the proposed Si3N4 GC can be easily fabricated by photonic foundries. The fabrication processes are similar as described in . The bottom Si GR structures are firstly patterned by DUV lithography and then fully etched through the 220 nm Si layer using reactive ion etching (RIE) to the BOX surface. After that, a SiO2 layer ~100 nm thicker than 1.68 μm is deposited using PECVD and a chemical mechanical polishing step is then performed to achieve both surface flatness and the optimized separation layer thickness of H = 1.68 μm. A following 400 nm Si3N4 layer deposition is implemented by PECVD or LPCVD. As the same as bottom Si GR, the Si3N4 GC structures are firstly patterned by DUV lithography and then fully etched using RIE. Finally, the 750 nm SiO2 cladding layer is deposited utilizing PECVD. Compared with the Si3N4 GC with bottom DBR, in our scheme, the complex DBR manufacture processes are replaced by a single couple of patterning and etching processes, realizing fabrication simplification without performance degradation.
We also evaluated the tolerance of the proposed uniform and non-uniform Si3N4 GCs to fabrication errors. Since bottom Si GR and Si3N4 GC both are fully etched, the etching depth can be well controlled compared to partially etched gratings. Thus, the main influence factors are the thickness of SiO2 separation layer, the groove widths of bottom Si GR and Si3N4 GC. The SiO2 separation layer thickness tolerance has been analyzed in Fig. 4(a) and only ~0.04 dB degradation occurs for 20 nm thickness variation. The coupling spectra with respect to W GR and W GC variations are also calculated as shown in Figs. 5(a) and 5(b) for both the uniform and apodized schemes, respectively. It is observed from Fig. 5(a) that the uniform Si3N4 GC exhibits a relatively robust tolerance to the fabrication errors on groove width. A W GR or W GC variation of 20 nm only induces a small spectrum shift of 4 nm. As for the apodized scheme, a slightly larger spectrum shift of 7 nm is observed for a groove width change of 20 nm, since the apodized Si3N4 GC has a narrower linewidth of 100 nm. Though the non-uniform Si3N4 GC is more sensitive to the fabrication errors, it still has a strong fabrication tolerance, considering the typical dimensional control range of < 10 nm in photonic foundries . Besides, the broad coupling bandwidth will also decrease the fabrication errors induced coupling efficiency degradation for a certain wavelength. Considering the BOX layer thicknesses of 1 μm and 3 μm are also used in a regular SOI wafers, we also simulated the performance of proposed GCs with 1 μm and 3 μm BOX layers. The results are shown in Fig. 5(c) and the BOX layer thickness has a slight influence on the performance of the proposed GC. This is because the bottom GR has a large reflectivity itself and only few power goes through it towards the Si substrate. Thus, the BOX layer thickness will have a slight influence on the overall performance of the proposed Si3N4 grating coupler.
In conclusion, we have theoretically proposed a Si3N4 GC with an ultralow loss of −0.88 dB and simplified fabrication processes. Instead of a bottom DBR or metal reflector, a GR based on a 220 nm SOI wafer is employed as bottom mirror in our design. By properly selecting the structure parameters, a high reflectivity over 90% is obtained. With an appropriate distance between the Si3N4 GC and Si GR, low coupling loss of −1.47 dB for uniform structure is theoretically obtained. By apodizing the Si3N4 GC, a record ultralow loss of −0.88 dB is further predicted. The specific fabrication processes and tolerance are also investigated, showing a comparable performance as other schemes.
This work was supported by the National Basic Research Program of China (Grant No. 2011CB301704), the National Natural Science Fund for Distinguished Yong Scholars (61125501) and NSFC Major International Joint Research Project (61320106016), NSFC (Grant No. 61275072 & 61475050), the New Century Excellent Talent Project in Ministry of Education of China (NCET-13-0240), Huawei Technologies Co. Ltd. and Foundation for Innovative Research Groups of the Natural Science Foundation of Hubei Province (Grant No. 2014CFA004).
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