Real-time optical OFDM (OOFDM) transceivers with on-line software-controllable channel reconfigurability and transmission performance adaptability are experimentally demonstrated, for the first time, utilizing Hilbert-pair-based 32-tap digital orthogonal filters implemented in FPGAs. By making use of an 8-bit DAC/ADC operating at 2GS/s, an oversampling factor of 2 and an EML intensity modulator, the demonstrated RF conversion-free transceiver supports end-to-end real-time simultaneous adaptive transmissions, within a 1GHz signal spectrum region, of a 2.03Gb/s in-phase OOFDM channel and a 1.41Gb/s quadrature-phase OOFDM channel over a 25km SSMF IMDD system. In addition, detailed experimental explorations are also undertaken of key physical mechanisms limiting the maximum achievable transmission performance, impacts of transceiver’s channel multiplexing/demultiplexing operations on the system BER performance, and the feasibility of utilizing adaptive modulation to combat impairments associated with low-complexity digital filter designs. Furthermore, experimental results indicate that the transceiver incorporating a fixed digital orthogonal filter DSP architecture can be made transparent to various signal modulation formats up to 64-QAM.
© 2014 Optical Society of America
To satisfy end-users’ requirements of highly dynamic seamless access to the various emerging bandwidth-hungry internet services with improved quality of service (QoS), there has been a strong R&D initiative world-wide to harness the software-defined networking (SDN) solution to vastly increase network reconfigurability, flexibility and elasticity with centralized abstraction and virtualization of the network infrastructure [1–5]. The core concept behind the widely pursued SDN solution is that the underlying network is directly managed by applications and services in the top layer via a logically centralized control plane which is decoupled from the data plane . As such, the SDN solution allows the network operator not only to rapidly adapt the networks to provide various connection/bandwidth-on-demand services with effective traffic congestion control, but also to generate more on-demand service provision-based revenue with considerably reduced revenue dependence on excessive bandwidth-provisioning only . Such a network operation model is particularly desirable for cost-sensitive optical access networks, which are currently facing a rapidly increasing divergence between required bandwidth provision and revenue growth.
To offer the highly desired synergy with the SDN solution, it is easy to comprehend that software reconfigurable adaptive optical transceivers, employing digital integrated circuit-based digital signal processing (DSP), are the fundamental building blocks of the SDN paradigm in the physical layer. Apart from performing advanced signal modulation and adaptive linear/nonlinear compensations of component/system/network impairments [8,9], the augmentation of the transceiver’s embedded DSP functions are also envisaged to improve transceiver controllability, intelligence, cost-effectiveness and overall system compactness and power consumption efficiency compared to SDN solutions employing existing conventional transceivers, and more importantly, to introduce extra end-user-controlled on-line reconfigurable networking functionalities such as channel add/drop .
It is well known that digital filtering based on finite-impulse-responses (FIR) and infinite-impulse-responses (IIR) is one of the most important functional elements in the vast majority of previously reported DSP-based optical communications technologies. For example, digital filtering has already been successfully exploited in digital coherent optical receivers to mitigate various fibre-induced impairments including chromatic dispersion (CD) and polarization mode dispersion (PMD) [11–14]. In addition, digital filtering with sophisticated equalization in the receiver has also been utilised in carrierless amplitude and phase (CAP) modulation for transmitting multi-level modulation-enabled CAP signals in intensity modulation and direct detection (IMDD) passive optical network (PON) systems .
For IMDD PON application scenarios, by making use of the unique adaptability associated with optical orthogonal frequency division multiplexing (OOFDM) , very recently we have proposed a novel signal modulation technique, termed OOFDM-CAP , which employs digital orthogonal filters embedded in DSP logic to multiplex/demultiplex multiple real-valued OFDM channels to/from a single optical signal. Extensive numerical simulations  have shown that OOFDM-CAP not only allows the utilisation of minimum up-sampling factors as low as 2 for cases of including two OOFDM-CAP channels, but also overcomes major fundamental limitations associated with the conventional CAP systems in terms of:
- • Stringent requirement of flat system frequency responses . This greatly constrains the maximum achievable transmission distances of the CAP systems because of the significant channel frequency response roll-off effect associated with IMDD.
- • Significant dependence of digital orthogonal filter DSP architectures on employed signal modulation formats . Such dependence is more severe for high signal modulation formats beyond 64-quaternatry amplitude modulation (QAM). This affects the transceiver DSP complexity, cost-effectiveness and transparency to underlying signal modulation technologies.
- • Requirement of relatively large up-sampling factors. For a specific multi-channel CAP system, such requirement brings about strong difficulties in further improving the overall achievable system spectral efficiency .
In this paper, real-time experimental demonstrations of on-line software reconfigurable adaptive OOFDM transceivers are reported, for the first time, where two real-valued OOFDM-CAP channels are multiplexed/demultiplexed utilizing field programmable gate array (FPGA)-based 32-tap digital orthogonal filters in the digital domain without involving any sophisticated signal conversion in the RF domain and/or IQ modulation in the optical domain. The transmission performance and channel reconfigurability of the transceivers are experimentally examined in simple 25km standard single-mode fiber (SSMF) IMDD systems, over which experimental explorations are also undertaken of the inherent transceiver adaptability enabled by adaptive bit loading. The experimental work rigorously verifies the proposed OOFDM-CAP technique, and more importantly, confirms the feasibility of practically implementing DSP-based software reconfigurable adaptive OOFDM transceivers for future SDN PONs.
In practical implementation, an optical network unit (ONU) can consist of multiple digital orthogonal filters, whose properties are software reconfigurable. According to the prevailing services and without altering the filter DSP implementation, each individual ONU can dynamically switch to a preferred filter by selecting an appropriate set of filter coefficients. Of course, multiple ONUs can also simultaneously share the same filter design parameters via subcarrier multiplexing and/or TDM. Such DSP-based transceiver reconfigurability provides future SDN PONs with an additional software control dimension at the physical layer. To enable the centralized control plane to transparently access the network resources available at all the layers including the physical layer, the widely deployed OpenFlow [19,20] at layer 2 and layer 3 has to be extended to incorporate layer 1 information, and the network resource abstraction and virtualization also have to be conducted with the physical layer information considered. The abstraction enables the creation of a technology-agnostic platform with a unified view of the diverse optical technologies and devices, thus allowing for automatic network service provisioning by hiding transmission technology and network infrastructure specific details, whilst providing visibility of the necessary attributes to network applications. On the other hand, the virtualization allows the physical network infrastructure to be partitioned in multiple independent networks corresponding to application requirements. Therefore, the extended OpenFlow allows not only the creation of an application specific network infrastructure with its’ own network resource usage pattern and QoS requirement, but also more effective and dynamic management of available network resources. In the experiment presented in this paper, manual control of the transceiver parameters is employed by writing to embedded DSP memory via an external computer. Such treatment is sufficient for demonstrating the technical feasibility of the digital filter-based channel multiplexing/demultiplexing technique.
The main advantages associated with the practical implementation of the demonstrated transceivers are summarized as following:
- • Greatly easing the practical development of universal transceivers required by low-cost ONUs.
- • Potentially excellent cost-effectiveness, high compactness and low power consumption, compared to non-DSP-based solutions.
- • Providing sufficient backward compatibility with all existing PONs.
- • Good transparency to both underlying transmission technologies and network architectures.
- • Compatibility with the preferred “pay as you grow” network operation strategy.
2. Real-time software reconfigurable transceiver and experimental system setup
2.1 Digital orthogonal filter DSP design
Figure 1 shows the FPGA-based digital orthogonal filter DSP architectures incorporated in the real-time transmitter (top) and the real-time receiver (bottom). In the transmitter FPGA, two independent digital OFDM channels with their transmission performance adaptive to system impairments are generated using two separate OFDM DSP sub-systems identical to those previously published in [21,22]. The OFDM generation procedure consists of the following major functions: pseudo-random binary test data generation, pilot-tone insertion, bit and/or power loading-enabled on-line adaptive modulation of 15 data-carrying subcarriers with modulation formats selected from 16-QAM, 32-QAM or 64-QAM, 32-point inverse fast Fourier transform (IFFT) for producing real-valued OFDM time-domain symbols, on-line adaptive signal clipping, 8-bit sample quantization and addition of 25% cyclic prefix to each symbol. 40 × 8-bit parallel OFDM samples contained within each individual OFDM symbol are produced at a rate of 25M symbols/s per digital OFDM channel. The OFDM sub-systems thus operate in a 25MHz clock domain, as indicated in Fig. 1.
To significantly reduce the FPGA logic resource usage for the digital filtering, each digital OFDM symbol is transformed from 40 parallel samples clocked at 25MHz to 8 parallel samples clocked at 125MHz. The digital filters thus operate in a 125MHz clock domain. To achieve the channel multiplexing, each OFDM channel is first up-sampled by a factor of 2 by inserting a zero-valued sample between two successive samples, thus doubling the samples per symbol and sample rate to 80 and 2GS/s, respectively. The oversampled channel then passes through a bank of 8 parallel 32-tap FIR digital shaping filters, where filter coefficients are signed 8-bit values. For the two channel case considered here the zero-valued samples are not actually inserted in the logic design before the FIR filters, as the FIR filters operate on parallel samples it is unnecessary to include tap coefficient multipliers for the zero-valued input samples. Also, due to the employed filter coefficients, a feature of the filter output signal is that every other sample is zero-valued, thus only 8 parallel FIRs are required to generate the 16 parallel output samples. The zero-valued samples are therefore inserted at the output of the filters. After applying 8-bit quantization to each filtered channel, the two digitally filtered channels are then directly summed. Subsequently 16 to 40 parallel sample transformation is performed and clock rate is converted from the 125MHz clock domain to a 50 MHz clock domain. The summed channels are then sent to the DAC interface which feeds an 8-bit digital-to-analogue converter (DAC) operating at 2GS/s, finally a 1GHz bandwidth analogue signal is generated.
The two discrete impulse responses of the two shaping filters forming a Hilbert-pair are:23]Fig. 2. Throughout the paper, the in-phase channel, s1(k), is termed Channel 1 and the quadrature-phase channel, s2(k), is referred to as Channel 2.
The properties of the digital shaping filters worth highlighting are listed below:
- • The 2 × up-sampling generates a mirrored signal spectrum within the Nyquist band, such that the n-th subcarrier generates two images at nfs and (32-n)fs, where fs = 31.25MHz is the subcarrier spacing.
- • Only 8 parallel FIR filters clocked at 125MHz are used to generate 16 parallel samples, as every other output sample is 0.
- • The in-phase FIR shaping filter has one non-zero co-efficient of 1 only and does not require rescaling or quantization, whereas the quadrature-phase FIR filter has signed 8-bit coefficients and thus requires sample re-quantization to signed 8-bit values.
In the receiver FPGA, to extract a desired channel, the 40 parallel samples at 50MHz, from the ADC interface, are first transformed to 16 parallel samples at 125MHz and then down-sampled by a factor of 2 by selecting every other sample. The resulting 8 parallel samples are then fed into the software controlled digital matching filter. For the two channel case considered here it is possible to down-sample before filtering, allowing the structure of the FIR filter implementing the matching filter to be identical to that of the shaping filter in the transmitter. Similar sample bus width conversions and clock domains, as used in the transmitter, are also employed but with the signal flow in the opposite direction. The coefficients of the matching filter are dynamically configured to implement one filter from a Hilbert-pair. The discrete impulse responses of the selectable matching filters are written as:Fig. 2. To extract Channel 1 and Channel 2, the taps are configured for m1(k) and m2(k), respectively. Also as the filter tap selection effects the output signal scaling, the quantization block’s parameters are also set appropriately for the selected filter. Therefore, online adaptation of the FIR tap values of these shaping and matching filters can enable software-controllable channel add/drop without requiring extra discreet hardware.
After the matching filter and 8-bit sample quantization in the 125MHz clock domain, 8 to 40 parallel sample transformation to a 25MHz clock domain allows the channel to then be processed by the receiver OFDM DSP functions similar to those reported in [21,22]. The functions include: detection of pilot-subcarriers and channel estimation, automatic symbol alignment and cyclic prefix removal, 32-point FFT for generating complex-valued frequency domain subcarriers from the received real-valued time domain symbols, channel equalization, on-line adaptive demodulation of 15 data-carrying subcarriers and bit error rate (BER) analysis of total channel BERs and individual subcarrier BERs.
2.2 Experimental system setup
Figure 3 shows the complete real-time experimental system setup with key parameters listed in Table 1. In the transmitter, the DAC converts the 8-bit digital samples at 2GS/s to a 1GHz bandwidth analogue signal. An RF amplifier and a variable electrical attenuator (VEA) set the optimum RF signal voltage at 320mVpp for combination, via a bias-T, with an optimum DC bias of −0.7V. The resultant RF signal intensity modulates a 10GHz electro-absorption modulator (EAM) within an EML. The 1550nm DFB laser in the EML is driven with a 124mA bias current. The EML’s optical output is launched at an optical power of 2.5dBm into a 25km SSMF IMDD system.
At the receiver, the received optical signal first passes through a variable optical attenuator (VOA) for control of the received optical power (ROP) level, then a 12.4GHz PIN + TIA performs the optical-electrical conversion of the received optical signal. The analogue electrical signal level is always optimized to occupy the full-scale input range of the 8-bit ADC operating at 2GS/s. The digitized samples are processed by the ADC interface in the receiver FPGA to generate sequences of 40 parallel samples.
On-line performance monitoring of the receiver-measured BERs, system frequency responses and subcarrier constellations is achieved through the FPGA’s embedded logic analyzer function. This allows instant analysis of the system transmission performance which, combined with the on-line control of the transmitter DSP parameters, RF gain, EML operating conditions and optical launch power, provides rapid optimization of the overall system performance. Here it is also worth emphasizing the following two aspects:
- • Both channels could be recovered simultaneously in the same FPGA by implementing separate instances of the two matching filters and using two OFDM receiver functions;
3. Experimental results
For both the in-phase channel, Channel 1, and the quadrature-phase channel, Channel 2, their frequency responses measured from the transmitter IFFT input to the receiver FFT output and normalized to the corresponding first subcarrier powers for the considered 25km SSMF IMDD system are plotted in Fig. 4, where, in comparison with those reported in [21,22], significantly flattened frequency response are observed. The considerable reductions in channel frequency response roll-off are mainly attributed by the up-sampling-induced spectral mirroring effect, which causes the signal conveying both channels to occupy two equal 0.5GHz spectral regions with respect to the half of the Nyquist frequency of 1.0GHz, as seen in Fig. 5. As a direct result, uniform subcarrier power loading profiles are adopted in all the experimental measurements presented throughout the paper.
As theoretically predicted in , Fig. 4 shows that the low tap count-induced frequency response ripples of the quadrature-phase channel, Channel 2, are much higher than those corresponding to the in-phase channel, Channel 1, and that for each channel, compared to high frequency subcarriers, the ripples for low frequency subcarriers are more pronounced. Together with the strong unwanted intermixing frequency products generated upon square-law photon detection in the receiver, the large ripples seen by the low frequency subcarriers play an important role in determining the occurrence of excessive errors on these subcarriers. As a consequence the first 5 subcarriers of Channel 2 must be dropped to allow acceptable BER levels to be obtained. This also results in the adaptation of low signal modulation formats on low frequency subcarriers of Channel 1, when adaptive bit loading is applied, as shown in Fig. 6. Compared to the frequency response of the in-phase channel, the up-shifted frequency response of the quadrature-phase channel in Fig. 4 is a direct result of the normalization operation, as a relatively low power for the first subcarrier occurs in the quadrature-phase channel, as seen in Fig. 2(d).
With all the employed subcarriers of each channel set at 16-QAM and reduced frequency response roll-off-enabled uniform subcarrier power loading profiles, the optimum transceiver and system parameters presented in Section 2 result in a raw line rate of 1.875Gb/s for the in-phase channel, Channel 1, and 1.25Gb/s for the quadrature-phase channel, Channel 2, thus the transmissions of an aggregate raw signal line rate of 3.125Gb/s is achievable over the 25km SSMF IMDD system. Under the simultaneous presence of both channels, the BER performances against received optical power (ROP) for both optical back-to-back (BTB) and 25km SSMF are plotted in Fig. 7(a), where similar BER performances are shown for both channels. At the forward error correction (FEC) limit of 1.0x10−3, for both channels considered here, the adopted low digital filter tap count plays a dominant role in determining the occurrence of the 0.6dB power penalties observed in Fig. 7(a), which can, however, be reduced when use is made of adaptive bit loading, as indicated in Fig. 7(b). In addition, in comparison with the quadrature-phase channel, for the in-phase channel, both the higher transmission capacity and its’ corresponding lower ROP at the adopted FEC limit is due to the fact that the in-phase channel has an intrinsic flat frequency response, as shown in Fig. 2(b).
To explore the transceiver’s channel reconfigurability and its’ relevant impacts on system BERs performance, Fig. 7(a) also presents the 25km SSMF system BER performance of each channel with the other channel switched off in the digital domain whilst all other transceiver/system parameter settings are unchanged. It is shown in Fig. 7(a) that, at the adopted FEC limit, the channel multiplexing/demultiplexing operation imposes an approximately 3dB (2dB) ROP variation for the in-phase (quadrature-phase) channel. Such a channel ROP variation can almost be eliminated when adaptive bit loading is adopted. The adaptive bit loading-induced elimination in ROP variation, however, brings about approximately 25% reductions in the maximum achievable channel transmission capacities . Furthermore, in comparison with the cases where two channels are present simultaneously, the transmission of a single channel gives rise to a sharp BER developing curves, as shown in Fig. 7(a). This implies that the cross-talk effect between these two channels is the major physical mechanism underlying the minimum achievable BERs of the systems. To improve the channel transmission performance by reducing the channel cross-talk effect, further DSP filter optimizations are currently being undertaken in our lab in terms of tap count, excess bandwidth control parameter and up-sampling factor.
Under the condition of both channels being present simultaneously, the adaptive bit loading-induced transceiver adaptability is experimentally explored in Fig. 7(b), where the BER versus ROP performance of each individual channel is plotted, in obtaining which the transceiver and system operating conditions identical to those adopted in Fig. 7(a) are considered, except that adaptive bit loading is applied on all the subcarriers of each channel. As the discussions of the channel multiplexing/demultiplexing operation-induced ROP variations have already been made in Fig. 7(a), in Fig. 7(b) special attention is, therefore, focused on the use of adaptive bit loading to further improve the channel transmission capacity and simultaneously reduce the associated power penalty. The optimum bit loading profiles are illustrated in Fig. 6, which gives rise to 2.03Gb/s for the in-phase channel, 1.41Gb/s for the quadrature-phase channel and an aggregated signal capacity of 3.44Gb/s for the entire 25km SSMF IMDD transmission system. It is shown in Fig. 7(b) that, compared to Fig. 7(a), adaptive bit loading cannot only increase the aggregated transmission capacity by approximately 10%, but also considerably reduce the corresponding power penalty for each channel. This indicates that it is feasible to employ adaptive modulation to combat the impairments associated with low-complexity digital filter DSP designs.
After 25km SSMF IMDD transmissions and for the minimum BERs shown in Fig. 7(b), example constellations of 16-QAM, 32-QAM and 64-QAM-encoded subcarriers of both channels are presented in Fig. 8, which are recorded prior to performing channel equalization in the receiver. The existence of the clean constellations of higher modulation formats on higher frequency subcarriers indicates that, for the adopted synchronization and equalization approaches, both the IMDD system frequency response roll-off and the symbol timing offset/jitter are not the major physical factors limiting the maximum achievable system transmission performance. This verifies the theoretical predications reported in . Furthermore, in comparison with the signal modulation format-dependent traditional CAP systems , the feasibility of utilizing various signal modulation formats for a fixed digital filter DSP design is also demonstrated in Fig. 8. This implies that the transceivers can be made transparent to underlying modulation technologies.
Real-time OOFDM transceivers with on-line software-controllable channel reconfigurability and transmission performance adaptability have been experimentally demonstrated, for the first time, utilizing Hilbert-pair-based 32-tap digital orthogonal filters implemented in FPGAs. By making use of a 2GS/s@8-bit DAC/ADC, an oversampling factor of 2 and an EML intensity modulator, the demonstrated RF conversion-free transceiver supports end-to-end real-time simultaneous adaptive transmissions, within a 1GHz signal spectrum region, of a 2.03Gb/s in-phase OOFDM channel and a 1.41Gb/s quadrature-phase OOFDM channel over a 25km SSMF IMDD system. In addition, experimental explorations have also been undertaken of the key physical mechanisms limiting the maximum achievable transmission performance, impacts of transceiver’s channel multiplexing/demultiplexing operations on the system BER performance, and the feasibility of utilizing adaptive modulation to combat impairments associated with low-complexity digital filter DSP designs. Furthermore, experimental results have also indicated that the transceiver incorporating a fixed digital orthogonal filter architecture can be made transparent to various signal modulation formats of up to 64-QAM.
This experimental work confirms the feasibility of implementing cost-effective software reconfigurable OOFDM transceivers for future SDN PONs. At present, extensive research activities are currently being undertaken in our laboratory to further evaluate the transceiver’s capability of supporting digital filter-enabled multiple access PONs.
This work was supported by the PIANO + under the European Commission’s ERA-NET Plus scheme within the project OCEAN under Grant agreement 620029.
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