In this paper, we experimentally demonstrate a high-speed free-space reconfigurable card-to-card optical interconnect architecture employing MEMS-based steering mirror arrays for simple and efficient link selection. A printed-circuit-board (PCB) based interconnect module is developed and 3 × 10 Gb/s reconfigurable card-to-card optical interconnect with a bit-error-rate (BER) of ~10−6 for up to 30 cm is realized using a 250 μm pitch-size micro-lens array. In addition, due to the usage of MEMS steering-mirrors, larger lenses can be employed at the receiver side for collecting stronger optical signal power to increase the achievable interconnect range or to improve the BER performance. Experimental results show that with 1-mm diameter lenses the interconnect distance can exceed 80 cm.
© 2013 OSA
Over the past several decades, the CMOS silicon transistor technology has evolved through several generations and nowadays the transistors have been scaled down to the deep sub-micrometer range [1–3]. Therefore, higher speed and more powerful electronic devices can be achieved through dense integration of millions of transistors. In addition, various multi-core architectures have been widely employed in high-performance computing and in data-centers. Consequently, ultra high-speed interconnects between chips, cards, as well as racks are highly demanded. Sustained improvement in multi-channel on-chip and on-board interconnection has been demonstrated using the Si photonics and nano-photonics technologies [4–6]. However, the improvement of interconnection capacity between cards and racks has not kept to the pace. Conventionally, copper based cables are used for data transmission between cards and racks. However, the electrical technologies are not suitable for future high-throughput interconnects due to the fundamental limitations, including the electric power consumption, heat dissipation, transmission latency and electromagnetic interference [7, 8].
Some commercial products have already been developed and deployed for rack-to-rack interconnects, where electrical cables are replaced by low-loss, high-speed optical cables that significantly increase the maximum link length . With the rapid advance in optical integration, the optical interconnect technology is now entering “inside the box” . To solve the card-to-card interconnect bandwidth “bottleneck” problem, the usage of parallel short optical links has been proposed and intensely studied. Most reported approaches use multi-mode fiber (MMF) ribbons [11–13] and polymer waveguides [14, 15] based technologies. Polymer waveguides are considered as promising candidates because they can be integrated with the electrical printed-circuit-boards (PCBs) and easily packaged. A fully-integrated bi-directional parallel optical interconnect structure reported by Schow et al.  employed parallel waveguides fabricated using the standard PCB technology and demonstrated an aggregate data rate of 240 Gb/s. On the other hand, the MMF ribbons based interconnect architecture has attracted considerable attention because of its attractive features, such as high bit rate, low-cost due to the mature fabrication process, and easy coupling due to the large optical fiber core-size. The structure reported by Doany et al.  demonstrated a data transmission throughput of up to 1 Tb/s using 48 parallel channels in conjunction with a single CMOS compatible holey chip. However, such point-to-point interconnection schemes are inherently non-reconfigurable, and their flexibility in dynamically interconnecting electronic cards is highly limited.
Several reconfigurable free-space-based high-speed card-to-card optical interconnect structures have been proposed and investigated, where the modulated optical signal of each interconnect channel can be switched along different directions via a link selection block before it is detected by a final-destination electrical card [16–18]. Therefore, significant flexibility can be added to the communications between various cards. Henderson et al.  reported a 1.25 Gb/s free space card-to-card optical interconnect architecture employing a liquid crystal on silicon (LCoS) processor in conjunction with a polarization beam splitter as the link selection block, while the architecture reported by McArdleet al . used a prism together with a lens and a spatial light modulator (SLM) as the link selection block. The use of an Opto-very-large-scale integration (Opto-VLSI) processor as the link selection block has also been reported by Aljada et al. , where a 3x3 2.5 Gb/s reconfigurable optical interconnect architecture was experimentally demonstrated. While such structures demonstrated the concept of reconfigurable card-to-card optical interconnects, the diffraction-based link selection block introduces high-loss and results in low link selection efficiency. To achieve a large tuning angle, high-order diffraction signals need to be utilized. In addition, these diffraction-based schemes have a comparatively complicated tuning mechanism (how the incident signals are tuned to the destination receivers), limited tuning range as well as low bit rates that are insufficient for future-generation card-to-card interconnects.
In this paper, we experimentally demonstrate the concept of a novel free-space reconfigurable card-to-card optical interconnect architecture that offers flexibility and high-speed, simultaneously. The proposed architecture employs VCSEL and photodiode (PD) arrays in conjunction with MEMS-based steering mirror arrays that serve as the link selection block. Compared with the previously reported link selection methods [16–18], MEMS-based mirrors provide higher selection efficiency, simpler tuning mechanism through beam reflection, wider tuning range and possibly easy integration. A proof-of-concept 3 × 10 Gb/s PCB-based reconfigurable free-space optical interconnect demonstrator is developed, demonstrating both the port-to-port and board-to-board reconfigurability with a BER of ~10−6 over up to 30 cm card-to-card distances and a receiver sensitivity as low as −11.5 dBm at a BER of 10−9. In addition, due to the usage of MEMS steering-mirrors, it is possible to employ lenses with a diameter larger than the pitch-size of the PD array at the receiver side for collecting stronger optical signal power to increase the achievable interconnect range or to improve the BER performance. Experimental results show that by using 1 mm diameter lenses the interconnect distance can be extended to more than 80 cm without the need to increase the transmitter power.
This paper is organized as follows: in Section 2, the proposed reconfigurable free-space card-to-card optical interconnect architecture is presented; in Section 3, the experimental setup for demonstrating the proposed reconfigurable optical interconnect is described and the experimental results are discussed; in Section 4, the usage of larger lenses at the receiver side to extend the achievable interconnection range is experimentally investigated; in Section 5, the reconfigurability of proposed optical interconnect scheme in the card-level is experimentally verified; and finally conclusions are given in Section 6.
2. Architecture of proposed free-space reconfigurable card-to-card optical interconnect
The architecture of proposed high-speed reconfigurable free-space card-to-card optical interconnect is shown in Fig. 1, where a dedicated optical interconnect module is integrated onto each electrical card (typically a PCB) and these optical interconnect modules on different cards are identical. Each optical interconnect module mainly consists of a VCSEL array, a PD array, two micro-lens arrays, and two MEMS-based steering mirror arrays serving as the link selection block. At the transmitter side, the electrical signal from the attached card first modulates the VCSEL optical beam, and then the modulated optical beam is collimated by the associated micro-lens. To minimize the VCSEL beam divergence, the distance between the VCSEL and micro-lens is made equal to the focal length of the micro-lens. Subsequently, the optical signal is steered towards the corresponding receiver with a steering MEMS mirror element. At the receiver side, the modulated optical signal is appropriately steered with another MEMS mirror element and focused onto the corresponding PD element. With analog steering mirrors being used, the transmitted optical beam can dynamically be steered along arbitrary directions (limited by the tuning range), realising adaptive optical interconnection with receivers at arbitrary locations within a communication range. In addition, inside a typical rack, the electrical cards are placed in parallel and the free space link may be blocked if the optical interconnect modules are placed at the same position with respect to the adjacent cards. Since the proposed optical interconnect module is small in size, this possible blockage problem can be avoided by installing the module at different positions of the cards, as shown in Fig. 1, and this requires non-identical designs for the slots on different electronic cards.
Conventionally, short-range optical interconnects employ VCSEL and PIN-PD arrays operating at the same wavelength [11–18] instead of using the wavelength-division-multiplexing (WMD) technology. The same approach is adopted here as well for the realization of reconfigurable free-space optical interconnects because it (i) is cost-effective; (ii) eliminates the need for complex circuitry for the precise control of the wavelength of the VCSEL elements; and (iii) increases the aggregate bit rate.
In the proposed reconfigurable optical interconnect scheme, the optical beams radiated from the VCSEL elements propagate directly in free-space until they are detected by the final destination cards. According to the Gaussian beam theory, the beam diameter expands as the propagation distance increases , thus inducing, severe inter-channel crosstalk and leading to a degraded BER performance. This crosstalk issue can be suppressed by using a receiver MEMS steering mirror array with a large spacing between the elements. This is because (i) the intensity of a Gaussian beam drops exponentially with the radial distance from the centre of the beam and (ii) the crosstalk signal induced by a Gaussian beam illuminating a MEMS element does not strike the other MEMS elements at their optimum incidence angles that maximize the optical coupling efficiency and signal detection by their associated PD elements.
3. Experiments and discussions
3.1 Experimental setup
To demonstrate the feasibility of our proposed reconfigurable free-space card-to-card optical interconnect architecture, proof-of-concept experiments were carried out and the setup is shown in Fig. 2. In the experiments, an optical interconnect module was designed, fabricated and integrated onto a small-size 4-layer PCB, as displayed in the inset of Fig. 2. Specifically, a 1 × 4 VCSEL array (multimode), the corresponding VCSEL driver circuits (4 packaged drivers), a 1 × 4 PD array and 4 trans-impedance amplifier (TIA) chips were integrated onto a single PCB. A micro-lens array was then aligned and mounted on top of the VCSEL array and the PD array to collimate the VCSEL beams and focus received optical beams onto the active windows of the PD elements. Each of the two micro-lens arrays was attached to an XYZ 3-axis translational stage, and the distance between the VCSEL/PD plane and the lens was changed manually to minimize the collimated signal divergence. It should be noted that in real applications, the micro-lens arrays can be placed on spacers of height equals to the focal length of the micro-lenses to minimize the beam divergence after collimation and for signal focusing. Furthermore, separate MEMS steering mirror chips with < 5 ms point-to-point large-angle switching time and > 96% reflectivity were used to switch the optical beams to various cards, as illustrated in Fig. 1. The MEMS mirror chips were also attached to XYZ translational stages and dynamically steered by changing the voltage applied to their actuators.
In the experiment, an 850 nm VCSEL array with a 250 µm pitch was used and wire-bonded onto the PCB. The average divergence angle of the VCSEL beams was ~16° and varied slightly among the 4 elements of the array (~15°, ~16°, ~16°, and ~18°, respectively). The maximum bit rate of the VCSEL driver chips was 11.3 Gb/s. The VCSEL and PD micro-lens arrays (fused silica) had a pitch of 250 µm, a clear aperture of ~236 µm, a refractive index of ~1.45, and a focal length of ~656.5 µm. Micro-lens arrays with a comparatively high fill-factor (large clear aperture) were chosen to minimize the diffraction effect at the transmitter side and to collect enough optical power at the receiver side. The PD array also had a pitch of 250 µm. Each PD element had an active aperture diameter of 60 µm and a responsivity of ~0.6 A/W at 850 nm, and was wire-bonded onto a TIA chip. The 3-dB bandwidth of the TIA was ~12.6 GHz and its differential trans-impedance was ~5 kΩ. In addition, the size of the MEMS mirror was larger than the pitch of VCSEL and PD arrays, so only three out of the four available channels were used and the channels 1 and 4 signals just stoke the MEMS mirrors on the edge, as shown by the inset of Fig. 2 (the third VCSEL and PD elements were not used).
During the measurements, the bit rate for each channel was set to 10 Gb/s and on-off-keying (OOK) modulation was used. The output power from each VCSEL element was set to 2 mW using a DC bias current of ~6.5 mA. At the receiver side, to suppress the crosstalk, 2.5 mm spacing between the MEMS steering mirrors was chosen. Furthermore, the vertical distances between the micro-lens array and the MEMS steering mirror array were ~1.5 cm at the transmitter side and ~10 cm at the receiver side, respectively. Since the MEMS mirrors at the receiver side had a larger channel spacing and the PD elements had a small active window, the incident angle onto the micro-lenses was highly limited. Therefore, the larger distance used at the receiver side was necessary to ensure that each optical beam strikes their corresponding micro-lens element at a small incident angle and that the focused light spots could be detected. This vertical distance at the receiver side was not negligible since the horizontal distance between the transmitter and receiver PCBs was only ~20-30 cm. While this comparatively large vertical distance used led to slight reduction in detected signal power due to the longer propagation distance between the interconnected VCSEL and PD elements, it, however, reduced the crosstalk induced at other PD elements significantly. In addition, it should be noted that the beam expansion with propagation distance mainly came from the imperfect beam collimation.
3.2 Experimental results and discussions
To demonstrate the concept of reconfigurable free-space optical interconnect architecture, two scenarios were considered. In the first set of measurements, VCSEL element n (n = 1, 2, or 4) was interconnected to PD element n. The measured BER versus the horizontal distance between the transmitter and receiver PCBs is shown in Fig. 3. Here, it should be noted that the horizontal distance is smaller than the total optical transmission distance from the VCSEL element to the corresponding PD element due to the considerably large vertical distance between the micro-lens arrays and the MEMS steering mirrors. During all measurements, the three working channels were always turned on simultaneously in order to investigate the worst-case scenario. It is clear from Fig. 3 that by increasing the horizontal distance between transmitter and receiver PCBs, the BER also increases, for all three channels. This is because the diameter of the Gaussian beam increases with the propagation distance, resulting in a smaller collected signal power (the transmission power from VCSELs was fixed) and more inter-channel crosstalk power being coupled into the various PD elements, thus degrading the BER performance. In addition, it can be seen from Fig. 3 that the performance of channel 4 is much better than those of the other two channels. This is because channel 4, which is relatively far from other channels, is less susceptible to crosstalk induced by channels 1 and 2. Furthermore, for all the three channels, even when the horizontal distance is 30 cm, which is typical for data center card-to-card interconnects, a BER of ~10−6 can still be achieved. Therefore, better error-free (BER < 10−9 or even < 10−12) high-speed optical wireless interconnections can be attainedby additionally using forward-error-correction (FEC) codes  or increase the output optical power of the VCSELs (the VCSELs used in the experiments had a maximum transmission power of ~5 mW).
Figure 4 shows the measured BER versus the received optical power for different horizontal distances between the transmitter and receiver PCBs. The received power was varied by changing the output power levels of the VCSEL elements. It is clear that for horizontal distances of 20 cm (Fig. 4(a)) and 30 cm (Fig. 4(b)) between the transmitter and receiver PCBs, channel 4 receiver displays a better sensitivity (less than −11.92 dBm at BER<10−9) than the other two channels, and this is consistent with the results shown in Fig. 3. When the horizontal distance between the transmitter and receiver modules was 30 cm, the crosstalk power collected by PD elements 1, 2, and 4 was measured to be ~31.2 dBm, ~-29.7 dBm and ~-33.4 dBm, respectively. In addition, for back-to-back situation (i.e., the horizontal distance between the transmitter and receiver modules is 0 cm), the receiver sensitivities for channels 1, 2 and 4 were ~-12.44 dBm, ~-12.43 dBm, and ~-12.39 dBm, respectively. Therefore, it is noticed that the receiver sensitivity degrades when the horizontal distance between the transmitter and receiver PCBs increases, mainly due to stronger inter-channel crosstalk as discussed earlier.
The second interconnection scenario was used to demonstrate the port-level reconfigurability of our proposed free-space reconfigurable card-to-card optical interconnects, where VCSEL elements 1, 2 and 4 were interconnected to PD elements 2, 4 and 1, respectively. The measured BER versus the horizontal distance between the transmitter and receiver PCBs is shown in Fig. 5, for the three interconnects. Comparing the results shown in Fig. 3 and Fig. 5, the BER performance displayed for the second interconnection scenario is comparable to that of the first configuration, demonstrating the reconfigurability of proposed 3 × 10 Gb/s free-space card-to-card optical interconnect architecture, and attain a BER of ~10−6 for card-to-card horizontal distances of up to 30 cm. In addition, the BER performance for channel 4 shown in Fig. 5 is worse than that shown in Fig. 4. This is mainly due to the fact that when PD 1 is receiving the signal fromVCSEL 4, the distances from the other VCSEL elements to PD 1 are relatively small, thus stronger inter-channel crosstalk is induced and the BER performance is degraded.
4. Interconnection range extension
As shown in Section 3, due to the fact that the Gaussian beam diameter expands while propagating in the free-space, the optical power that can be collected at the receiver side with the micro-lens array is highly limited and the interconnection range is comparatively short (~30 cm). However, due to the usage of MEMS-based steering mirrors and the large MEMS mirrors channel spacing at the receiver side, the optical beams can be steered adaptively and the collecting lenses do not need to be exactly above the corresponding PD elements. Therefore, it is possible to use larger lenses to collect stronger signal power and to extend the communication range.
Experiments were carried out to demonstrate the feasibility of proposed interconnection range extension method. In the experiments, the lenses used had a diameter of ~1 mm and a focal length of ~2 mm. The MEMS mirrors channel spacing were still set to 2.5 mm and the vertical distance between the MEMS mirrors and the lenses at the receiver side were fixed at ~4 mm. The transmission power from each VCSEL element was 2 mW and the bit rate was still 10 Gb/s for each channel.
The measured BER with respect to the horizontal distance between the transmitter and receiver PCBs is shown in Fig. 6. VCSEL element n (n = 1, 2, or 4) was interconnected to PD element n. It is clear from the figure that when the horizontal distance between the VCSEL and PD arrays is smaller than 55 cm, a BER < 10−11 can be achieved for all the three working channels. Even when the horizontal distance increases to ~80 cm, a BER<10−6 is still realized. Therefore, with the larger lenses at the receiver side, the achievable interconnection range can be greatly extended and more cards can be covered with this free-space reconfigurable optical interconnect scheme. In addition, according to Fig. 6, channel 4 still has the best performance while the performance of channel 2 is the worst, and this is consistent with the results shown in Fig. 3.
Figure 7 shows the measured BER performance versus the received power when the horizontal distance was 80 cm. Comparing the results shown in Fig. 4 and Fig. 7(b), it is clear that the receiver sensitivity at BER < 10−9 suffers a power penalty of ~0.5 dB. For Channel 2, the degradation is more obvious (>0.7 dB), confirming that it is more vulnerable to the inter-channel crosstalk since without any interference, all three channels have almost similar receiver sensitivity performances.
Comparing the results shown in Fig. 6 and Fig. 7 with Fig. 3 and Fig. 4, it can be concluded that there is a tradeoff between the diameter of the focusing lenses used at the receiver side and the power budget. This is mainly because with a larger lens diameter, more signal power can be collected and better performance or longer interconnect range can be achieved. However, the larger lens diameter also leads to stronger inter-channel crosstalk which degrades the receiver sensitivity. In addition, the lens diameter that can be chosen is also limited by the channel spacing of MEMS mirrors at the receiver side. Due to the small active diameter of the photodiodes, the incident angle of the signal from MEMS mirrors to focusing lenses is highly limited, which further limits the maximum allowed diameter of the lenses. The quantitative relationship between the physical size of lenses and link power budget is now being investigated both theoretically and experimentally.
5. Card-level reconfigurability demonstration
In Section 3, the port-level reconfigurability of the proposed free-space card-to-card optical interconnect was experimentally demonstrated. In addition to that, experiments were carried out to investigate the feasibility of reconfiguring the proposed optical interconnect architecture among different cards. The experimental setup is shown in Fig. 8. Three integrated interconnect modules were used and similar to the setup shown in Fig. 2, in each module the third VCSEL/PD elements were not used. The bit rate was still set at 10 Gbps for each channel with OOK modulation format and the transmission power from each VCSEL was 2 mW as well. 1-mm diameter lenses were used at the receiver side to collect stronger signal power and to extend the interconnection range.
The distance between cards and optical interconnect modules were varied in the experiments, and Table 1 shows the measured BER performances for all channels when module 1 was interconnected to module 2 and module 3, respectively. Inside the two interconnected transmitter and receiver modules, VCSEL element n (n = 1, 2, or 4) was interconnected to PD n. When the BER was smaller than 10−12, the exact BER value could not be measured since the operation was considered error-free. It is clear from Table 1 that a BER < 10−7 was always attained, and hence, the reconfigurability on the card-level was demonstrated.
A novel high-speed reconfigurable free-space card-to-card optical interconnect architecture has been proposed and demonstrated in this paper. The concept is based on the utilization of MEMS-based steering mirror arrays as an efficient and simple link selection mechanism. Experiments have been carried out, demonstrating a 3 × 10 Gb/s reconfigurable card-to-card optical interconnect structure integrated onto different PCBs. With the 250 μm pitch-size micro-lens array, a BER of ~10−6 has been realized for interconnected VCSEL and PD elements spaced horizontally at up to 30 cm and a receiver sensitivity (at the BER of 10−9) better than ~-11.5 dBm has been attained.
In addition, it has been shown that due to the usage of MEMS steering mirrors and the comparatively large channel spacing of the receiving MEMS mirrors, larger lenses can be used to collect stronger signal power and to extend the interconnection range. Experimental results have shown that with 1 mm diameter lenses at the receiver side, the interconnection range can be extended to ~80 cm while a BER<10−6 is still achieved.
Furthermore, with the 250 μm-pitch micro-lens array, the reconfigurability of the proposed architecture for both port level and card level has also been verified. Compared with previous reconfigurable optical interconnect schemes, much higher bit rate has been achieved with the simple reconfiguration mechanism of the architecture proposed in this paper. In addition, although a BER of ~10−6 has been realized, a considerable number of errors still existed in our proposed optical interconnect architecture. However, with an increased received signal power, the BER becomes lower and fewer errors occur at the receiver side. Therefore, the use of a larger lens diameter at the receiver side not only increases the achievable interconnection range, but also reduces the number of bit errors. In addition, FEC can also be employed to further improve the BER performance , at the cost of added complexity, cost and additional signal processing.
To achieve a higher aggregate bit rate in our proposed interconnect scheme, a higher number of parallel channels should be integrated in each interconnect module. Since the MEMS steering mirror array and the VCSEL array have the same pitch, dense integration is feasible at the transmitter side and leads to a much higher aggregate bit rate. For the receiver side, the pitch size of the MEMS mirror array needs to be larger in order to reduce crosstalk. However, initial simulation results have shown that reducing the receiving MEMS mirror array pitch only results in slight degradation in the BER performance. This is because of the non-optimal incident angle of interfering signals. Therefore, the proposed architecture can simply be scaled up by using highly-dense three-dimensional parallel optical interconnects. It should also be noted that in order to extend the achievable card-to-card interconnection range, larger-diameter focusing lenses have been employed. Since the MEMS mirror array at the receiver side also has a larger pitch size, the lenses do not need to be right above the PD elements. Therefore, dense integration can still be achieved for the PD array, while for the focusing lenses and receiving MEMS mirrors, dense integration is difficult to achieve if long interconnection range is required.
Finally, inside a typical rack, dust always exists and it has several important effects on our proposed reconfigurable optical interconnect scheme. The first one is the contamination of the MEMS steering mirrors, which can lead to the decreased reflectivity and result in additional power penalty. The second effect of dust is related to the signal scattering while propagating in free-space, which leads to additional transmission loss in the system. The third effect is that the dust can also contaminate the active window of lenses, VCSELs and PDs. To deal with this problem, two methods can possibly be employed. The first one is to increase the transmission power from VCSELs since the VCSELs used had a maximum output power of 5 mW while only 2 mW was used. However, this leads to increased power consumption and heat dissipation. The second solution is using larger lenses at the receiver to collect more signal power, as shown in Section 4. Nevertheless, this results in integration problem. Therefore, more research needs to be done in this area.
This work was supported in part by NICTA and by the Department of Industry, Innovation, Science, Research and Tertiary Education (DIISRTE). NICTA is funded by the Australian Government as represented by the Department of Broadband, Communications and the Digital Economy and the Australian Research Council through the ICT Centre of Excellence Program.
References and links
1. S. Borkar, “Design perspectives on 22 nm CMOS and beyond,” in Proceedings of 46th ACM/IEEE Design Automation Conference (San Francisco, California, 2009), 93–94.
2. S. E. Thompson and S. Parthasarathy, “Moore’s law: the future of Si microelectronics,” Mater. Today 9(6), 20–25 (2006). [CrossRef]
3. X. Yuan, T. Shimizu, U. Mahalingam, J. S. Brown, K. Z. Habib, D. G. Tekleab, T.-C. Su, S. Satadru, C. M. Olsen, H. Lee, L.-H. Pan, T. B. Hook, J.-P. Han, J.-E. Park, M.-H. Na, and K. Rim, “Transistor mismatch properties in deep-submicrometer CMOS technologies,” IEEE. Trans. Electron Devices 58(2), 335–342 (2011). [CrossRef]
4. S. Assefa, F. Xia, W. M. J. Green, C. L. Schow, A. V. Rylyakov, and Y. A. Vlasov, “CMOS-integrated optical receivers for on-chip interconnects,” IEEE J. Sel. Top. Quantum Electron. 16(5), 1376–1385 (2010). [CrossRef]
5. D. V. Thourhout, T. Spuesens, S. K. Selvaraja, L. Liu, G. Roelkens, R. Kumar, G. Morthier, P. R. Romeo, F. Mandorlo, P. Regreny, O. Raz, C. Kopp, and L. Grenouillet, “Nanophotonic devices for optical interconnect,” IEEE J. Sel. Top. Quantum Electron. 16, 1363–1375 (2010).
6. G. Li, J. Yao, H. Thacker, A. Mekis, X. Zheng, I. Shubin, Y. Luo, J.-H. Lee, K. Raj, J. E. Cunningham, and A. V. Krishnamoorthy, “Ultralow-loss, high-density SOI optical waveguide routing for macrochip interconnects,” Opt. Express 20(11), 12035–12039 (2012). [CrossRef] [PubMed]
7. L. Tsybeskov, D. J. Lockwood, and M. Ichikawa, “Silicon photonics: CMOS going optical,” Proc. IEEE 97(7), 1161–1165 (2009). [CrossRef]
8. A. F. Benner, M. Ignatowski, J. A. Kash, D. M. Kuchta, and M. B. Ritther, “Exploitation of optical interconnects in future server architectures,” IBM J. Res. Develop. 49(4.5), 755–775 (2005). [CrossRef]
9. “Luxtera’s silicon photonics technology enables 100Gbps data center interconnects,” http://www.luxtera.com/20100601225/luxtera-advances-optical-technology-to-support-100gbps-interconnects-for-datacenters.html.
10. M. A. Taubenblatt, “Optical interconnects for high-performance computing,” J. Lightwave Technol. 30(4), 448–457 (2012). [CrossRef]
11. L. A. Buckman-Windover, J. N. Simon, S. A. Rosenau, K. S. Giboney, G. M. Flower, L. W. Mirkarimi, A. Grot, B. Law, C.-K. Lin, A. Tandon, R. W. Gruhlke, H. Xia, G. Rankin, M. R. T. Tan, and D. W. Dolfi, “Parallel optical interconnects >100 Gb/s,” J. Lightwave Technol. 22(9), 2055–2063 (2004). [CrossRef]
12. D. M. Kuchta, Y. H. Kwark, C. Schuster, C. Baks, C. Haymes, J. Schaub, P. Pepeljugoski, L. Shan, R. John, D. Kucharski, D. Rogers, M. Ritter, J. Jewell, L. A. Graham, K. Schr¨odinger, A. Schild, and H.-M. Rein, “120-Gb/s VCSEL-based parallel-optical interconnect and custom 120- Gb/s testing station,” J. Lightwave Technol. 22(9), 2200–2212 (2004). [CrossRef]
13. F. E. Doany, B. G. Lee, A. V. Rylyakov, D. M. Kuchta, C. Baks, C. Jahnes, F. Libsch, and C. L. Schow, “Terabit/sec VCSEL-based parallel optical module based on holey CMOS transceiver IC” in Proceedingsof Optical Fiber Communication Conference and Exposition and the National Fiber Optic Engineers Conference(OFC/NFOEC,Los Angeles, California, 2012), PDP5D.9.
14. R. Dangel, C. Berger, R. Beyeler, L. Dellmann, M. Gmur, R. Hamelin, F. Horst, T. Lamprecht, T. Morf, S. Oggioni, M. Spreafico, and B. J. Offrein, “Polymer-waveguide-based board-level optical interconnect technology for datacom applications,” IEEE Trans. Adv. Packag. 31(4), 759–767 (2008). [CrossRef]
15. C. L. Schow, F. E. Doany, C. W. Baks, Y. H. Kwark, D. M. Kuchta, and J. A. Kash, “A single-chip CMOS-based parallel optical transceiver capable of 240-Gb/s bidirectional data rates,” J. Lightwave Technol. 27(7), 915–929 (2009). [CrossRef]
16. C. J. Henderson, D. G. Leyva, and T. D. Wilkinson, “Free space adaptive optical interconnect at 1.25 Gb/s with beam steering using a ferroelectric liquid-crystal SLM,” J. Lightwave Technol. 24(5), 1989–1997 (2006). [CrossRef]
17. N. McArdle, M. Naruse, H. Toyoda, Y. Kobayashi, and M. Ishikawa, “Reconfigurable optical interconnections for parallel computing,” Proc. IEEE 88(6), 829–837 (2000). [CrossRef]
18. M. Aljada, K. E. Alameh, Y. T. Lee, and I. S. Chung, “High-speed (2.5 Gbps) reconfigurable inter-chip optical interconnects using opto-VLSI processors,” Opt. Express 14(15), 6823–6836 (2006). [CrossRef] [PubMed]
19. L. C. Andrews and R. L. Phillips, inLaser Beam Propagation through Random Media, SPIE Optical Engineering Press, Bellingham, Washington, 1998.
20. T. Mizuochi, “Recent progress in forward error correction and its interplay with transmission impairments,” IEEE J. Sel. Top. Quantum Electron. 12(4), 544–554 (2006). [CrossRef]