In this paper, a novel terahertz (THz) plasmonic switch is designed and simulated. The device consists of a periodically corrugated n-type doped silicon wafer covered with a metallic layer. Surface plasmon propagation along the structure is controlled by applying a control voltage onto the metal. As will be presented, the applied voltage can effectively alter the width of the depletion layer appeared between the deposited metal and the semiconductor. In this manner, the conductivity of the silicon substrate can be successfully controlled due to the absence of free electrons at the depleted sections. Afterwards, the effectiveness of the proposed plasmonic switch is enhanced by implementing a p++-type doped well beneath the metallic indentation edges. Consequently, a P-Intrinsic-N diode is formed which can manipulate the plasmon propagation by modifying the electron and hole densities inside the intrinsic area. The simulation results are explained very concisely by the help of scattering matrix formalism. Such a representation is essential as employing the switches in the design of complex plasmonic systems with many interacting parts.
© 2013 Optical Society of America
The terahertz frequency band, located between microwave and optical ranges is considered to be a promising section of the electromagnetic (EM) spectrum. THz radiation with uniquely attractive characteristics has been employed in laboratory demonstrations to identify explosives, find hidden weapons, and detect cancer cells and tooth decays . In spite of these laboratory level researches, the real world application of THz radiation has proven to be challenging. One of the major pitfalls in the commercial application of THz radiation is the lack of room temperature active devices as modulators, switches, sources and detectors. In recent years, there have been considerable efforts to employ novel devices based on the collective oscillations of electrons mostly called plasmons, in the THz frequency range [2–8]. Specifically, plasmonic materials formed by the periodical texturing of metal or highly doped semiconductor surfaces have been extensively studied and applied in microwave and THz frequency ranges [9–20]. These structures can support surface waves which are mostly called Spoofed Surface Plasmon Polaritons (SSPPs), since they mimic the properties of surface plasmon polaritons at visible frequencies. Recently, there has been an increasing interest in exploiting SSPPs because of their unique properties as high field confinement and comparatively low propagation losses [9–12].
SSPPs are particularly important in the development of THz Quantum Cascade (QC) lasers to efficiently out-couple the output power from a cavity with sub-wavelength dimensions [13,14]. Furthermore, the application of SSPPs inside cylindrical two-dimensional periodic surfaces has been recommended for the design of future Cherenkov THz amplifiers . Moreover, there has been a significant interest in the design of modern active plasmonic switches and modulators with different upcoming applications [16–20].
The idea of changing the wave properties of a plasmonic waveguide by heating to modulate plasmons was first coined in  and applied in the visible frequency range. Subsequently, reversible variations in the waveguide characteristics caused by femto-second optical excitation have been employed to develop faster and more efficient plasmonic switches and modulators . In terahertz frequency range, the optical and thermal control of the SSPP propagation along the surfaces of indented doped semiconductors has been investigated in [16,17]. Recently, a terahertz plasmonic switch implemented inside a metallic surface with a periodic array of grooves filled with an electro-optical material is proposed in [19,20]. It is shown that the incorporation of the electro-optical material such as Nematic Liquid Crystal (LC), with controllable refractive index into the plasmonic gap provides a compact and efficient THz switch. However, the switching speed of the logic blocks developed based on the LC based gates or the ones with the thermally controlled plasmonic waveguides are undesirably low. Besides, the device implementation and wiring of such a gate is difficult . In spite of short response times, the modulators with optical manipulation of SSPPs require a separate high power source for an efficient operation.
To avoid the above mentioned fabrication difficulties and to increase the switching speed of future terahertz plasmonic active devices, the application of doped semiconductors instead of the LCs is proposed here. As widely known, the conductivity of a semiconductor is dependent upon the number of the free charges which can be controlled by different mechanism as light illumination and electrical doping . While photo-doping is a fast and effective approach for many applications, the significant amount of the conductivity modulation required in active plasmonic devices necessitates large incident optical powers which are impractical in many applications. Alternatively, the doping level within a semiconductor can be varied via the application of a voltage across an appropriately designed metal-semiconductor (Schottky) junction . This is due to the variations of the depletion region width that exists along the metal-semiconductor interface. In this manner, the conductivity of the semiconductor can be manipulated by changing the bias voltage. The semiconductor conductivity can be regulated more effectively by implanting different doping levels and types (p or n) in various locations within the structure. For instance, depositing a thin layer of highly p++-type doped silicon inside an intrinsic silicon wafer with an n++-type doped back gate can establish a PIN (P-Intrinsic-N) diode. The existence of the PIN diode makes the manipulation of the silicon conductivity possible with the aid of electron and holes, simultaneously.
In this paper, we propose a THz plasmonic modulator implemented inside a corrugated silicon substrate covered with a platinum layer. By applying the bias voltage on the doped silicon-platinum junction, the wave propagation along the waveguide is controlled. The design starts with a finite element solution of the well-known drift-diffusion and Poisson equations to calculate the charge distribution inside the device. Next, Drude model is employed to estimate the doped silicon conductivity from the calculated charge densities. Afterwards, a full wave commercial simulator  is used to characterize the surface wave propagation along the structure. This simulation is repeated as the silicon conductivity is varied by applying various bias voltages across the junction. This characterization is performed in a wide frequency range located at terahertz regime (200 GHz- 320 GHz). However, the device is aimed to operate efficiently at a specific frequency range (250 GHz – 320 GHz).To concisely present the results, the scattering matrix formulation of the non-TEM plasmonic mode is developed. Finally, a more sophisticated design is introduced that employs a PIN diode to electrically modify the doping density of the silicon substrate.
The organization of the paper is as follows. In section II, the details of the proposed plasmonic switch with an implementation of the Schottky junction are described. Additionally, a brief summary of the scattering matrix definition and its calculation strategy as analyzing the plasmonic structures are provided. Results of the full wave simulation of the plasmonic switch are reported in section III. In section IV, the design of the optimized THz switch with a PIN diode and its related simulation results are discussed.
2. The structure of the proposed THz plasmonic switch
As demonstrated in [9–12], a periodically corrugated metallic layer is able to carry EM surface waves with TMx mode characteristics at terahertz frequency ranges. An example of this structure is depicted in Fig. 1. It includes a silicon wafer (deliberately doped at a specific section) with relative permittivity εr, tailored with linearly spaced grooves which are filled with a metal. The electric and magnetic field components and the wave vector of the TMx mode are also depicted in Fig. 1. Generally, the field variations of the TMx mode at frequency “f”, follows the exponential function exp (jωt – jßx – δ (y–h–t2)); where, ω = 2πf, β and δ, h and t2 are angular frequency, phase and attenuation constants along x and y directions, indentation height and metallic layer thickness, respectively. As proved in  for the case of periodically grooved metal surface with sharp edge indentations, the dispersion relation of the fundamental plasmonic mode is:Eq. (1) and Eq. (2), c and, ksi and λsi are the speed of light in vacuum (m/s) and the phase constant and wavelength of the radiating mode inside the silicon wafer, respectively. Additionally, the TMx mode wave impedance along x is defined as Zx = β / (ω × ε) , where the silicon permittivity is ε = εr × ε0 (ε0 ≈8.85 × 10−12 F/m). Using Eq. (1), it can be concluded that SSPPs (with β ≥ ksi) are only allowed to propagate along the grooved metal as tan (ksi × h) > 1. Therefore, SSPPs are not bounded to the metal-semiconductor interface at z = (-h – t2) as , where fr is called the resonant frequency herein. Thus, fr sets the upper limit for the operating frequency bandwidth of the plasmonic structure. As taking Ohmic and dielectric losses into account, the phase constant (j β) within the wave function is substitute with γ = α + j β where, α is the fundamental mode attenuation constants along x. Moreover, the TMx wave impedance along x is re-defined as: Zx = γ / (j ω ε) . Considering the well-known Helmholtz equation :
Here, the active plasmonic device depicted in Fig. 1 is proposed to navigate the SPPSs using the concept of semiconductor electrical doping by the means of a Schottky contact. The Schottky contact is established between the deposited metal and the n-type doped (with donor density ND1 = 5 × 1014 cm−3) section of the silicon wafer. In order to couple EM wave to the active device, two plasmonic waveguides are considered inside the un-doped sections of the silicon wafer. The waveguides transfer EM wave to the plasmonic switch at the input (x = l1) and the output (x = l1 + ld1) ports (see Fig. 1). The suggested silicon wafer (with thickness t1 = 160 µm) is periodically corrugated with cubic holes. The period, the height and the distances of the holes are d = 30 µm, h = 60 µm and a = 24 µm, respectively. The indentations are completely filled with platinum. Besides, the wafer top surface is covered with a t2 = 20 µm thick platinum layer. Platinum can be deliberately substituted with any other popular metal in the semiconductor industry if it offers high electrical conductivity in the interested frequency range. However, this can change the expected threshold voltage of the Schottky junction and the wave attenuations due to the variations of the metal-semiconductor barrier height and the electrical conductivity of the metal, respectively. The length of the plasmonic switch considered in the first design is ld1 = 5 × d (see Fig. 1). To establish an Ohmic contact beneath the structure, very high level of n++-type doping up to ND_Ohmic = 2 × 1017 cm−3 with a Gaussian profile is maintained at y = - (t1 + t2) throughout the active device length (from x = l1 to l1 + ld1). The thickness of the wafer is chosen such that it stays larger than the fundamental mode decay length in the y direction (1 / δ), throughout the interested frequency range (260 GHz-320 GHz). In this manner, the Ohmic contact may not disturb the SSPP field distribution.
As shown in Fig. 1, the edges of the holes located inside the wafer are considered to be rounded with radius “r”. The width of the structures along z axis is considered to be at least an order of magnitude larger than the desired plasmonic mode wavelength. Therefore, a 2D solution of the electromagnetic and charge transport equations can obtain accurate results. In order to control the width of the Schottky contact depletion region, an external control voltage Va is applied between the Schottky and Ohmic contacts. In this manner, the conductivity of the doped silicon substrate is externally controlled. As the Schottky diode is under forward bias condition (switch is in the OFF mode), SSPPs suffer from large attenuations as propagating along the device. On the other hand, plasmons face less attenuation as the diode is reversely biased (switch is in the ON mode). To reduce the insertion losses of the switch in the ON mode, it is favorable to increase the width of the depleted area. However, the width is restricted to a maximum allowable reverse voltage. This limit corresponds to the silicon breakdown condition that happens as the total magnitude of electric field is larger than the V/cm. The consideration of the rounded edges in the simulation allows us to apply higher reverse bias voltages onto the Schottky junction compared to the right angle ones, without reaching the breakdown limit of the silicon substrate.
3. The simulation details
In order to completely capture the electron-wave interactions inside the proposed plasmonic switch, a set of electronic transport and wave equations ought to be solved. The simulation of the charge transport inside the semiconductor device is accomplished by solving the well-known steady-state Drift-Diffusion equations. Moreover, Maxwell equations can completely describe the wave propagation inside the plasmonic device. In this section, the details of the electronic transport and the full simulations are described.
3.1 The charge transport model
Mostly, the analysis of semiconductor devices starts with a solution of the Poisson equation using the boundary condition (external voltage) to estimate the electrostatic potential φ inside the device. This solution is next coupled to the steady-state Drift-Diffusion equations to accurately compute and electron, n (cm−3), and hole, p (cm−3), densities inside the solution domain. Details of this type of simulation can be found elsewhere . Here, a commercial solver with semiconductor simulation capabilities is used  to solve these equations.
In the developed model, Shockley-Read-Hall formulation with the electron-hole recombination rate:Eq. (4), ni = 1.45 × 1010 cm−3, τn and τp = 10−7 (s) are silicon intrinsic carrier concentration, electron and hole lifetimes, respectively. The set of three differential equations (two drift-diffusion equations for electron and hole densities and the Poisson equation) are solved numerically as considering specific boundary conditions over the computational domain. Here, constant values of electron “n” and hole “p” densities are considered at the location of the Ohmic contact. This is correct as presuming infinite carrier recombination velocities at the contact. Furthermore, the electrostatic potential of the boundaries adjacent to the Ohmic and Schottky contacts are:Eq. (5), T = 300 (K), q = 1.602 × 10−19 (C), φB = 0.83 (eV) and (J / K) are the room temperature, unit charge, Pt/Si barrier height  and Boltzmann constant, respectively. The carrier densities beneath the Schottky contacts formed between the deposited Pt layer and the wafer in Fig. 1 are n = Nc × exp(q φB / kT) and p = ni2 / n where, Nc = 2.82 × 1019 (cm−3) is effective density of states at the silicon conduction band. In the other boundaries, vanishing normal components of electron and hole current densities, and electric field are enforced.
3.2. Details of the full wave simulation
In this paper, a commercial EM solver  is utilized to numerically solve Maxwell equations inside the computational domain. To this end, Drude model is exploited to represent the metal frequency dependent permittivity:Eq. (6), ωp = 1.4 × 1016 (Rad/s), and γ = 4 × 1016 (s−1) are plasma and scattering frequencies, respectively. In this manner, Ohmic losses of the propagating surface wave are taken into account. Similarly, the high frequency characteristics of the silicon wafer are included into the full wave solver. As presented in [27,28], Drude model can accurately estimate the permittivity ε (ω) and the conductivity σsi of the silicon substrate at frequency ranges below 400GHz as:Eq. (7), τ and m, and σdc are electron scattering time and effective mass, and dc conductivity, respectively. The dc conductivity σdc = q × (μn n + μp p) where, μn and μp (cm2 / V s) are electron and hole mobilities, respectively. In the following, τ = 0.2 ps, m = 1.08 × m0 (m0 = 9.1 × 10−31 kg is electron unit mass) and εr = 11.9. Furthermore, the electron and hole mobilities at the room temperature are approximated as :Eq. (8) and Eq. (9), NA is ionized acceptor density. In order to link the charge transport and the EM solvers, the calculated electron and hole densities are first inserted into Eq. (7) to update the silicon conductivity and relative permittivity. Next, the updated silicon properties are included into the full wave simulator. This process is repeated as the applied voltage is changing.
3.3 The definition of the scattering parameters for the plasmonic device
Recently, there has been a trend to employ scattering parameters as reporting the properties of novel plasmonic devices [30–32]. Here, the definition of the characteristic impedance of a non-TEM transmission line, as a plasmonic waveguide is reviewed. Next, the employed method for the S-parameter calculation is detailed. As described in , there are many ways to determine the voltage, current, and the characteristic impedance of a non-TEM transmission line. However, the voltage and current waves are mostly defined for the transverse electric and magnetic fields of a specific mode, respectively. Besides, an arbitrary characteristic impedance may be chosen to relate ± x going voltage and current . As mentioned, there exist infinite numbers of plasmonic modes inside the designed device, along the interface of the indented metal and the dielectric. However, the fundamental mode extends furthest into the dielectric. Therefore, the characteristic impedance Z0 is selected equal to the real part of the fundamental TMx mode wave impedance Zxr where Zx = Zxr + j Zxi.
In this paper, the simulated plasmonic switches are represented as a two port network. Such a representation of the active device is depicted in Fig. 2(a). In the developed EM model, two plasmonic waveguides with length l1 and l2, are included at the input and output ports of the network to transfer the waves into and out of the switch (see Fig. 2(a)). Moreover, the presence of the waveguides allows that the excitation enforced at x = 0 (planar wave with electric field component and propagation constant ksi) completely follows the fundamental mode variations as it reaches the switch. In order to avoid wave attenuations inside the waveguides, the corresponding silicon wafers and the deposited metallic layers are assumed to be loss-free. In this manner, the waveguides can handle the TMx mode with real wave impedance Zxr. Here, the reference planes of the reported S-parameter are located at the boundaries of the active device as depicted in Fig. 2(a).
In the following, the scattering matrix is formulated in terms of the fundamental TMx mode electric field y component Ey. Considering the two-port network in Fig. 2(a), the scattering parameters are defined as:Eq. (10), and are incident and reflected field components (at ports 1 and 2), respectively. Using Eq. (10), scattering parameters can be obtained as:Fig. 2(b)). In this manner, the incident wave at port 2 is set to zero ( = 0). In order to only compute the incident field at x = l1, the discontinuity (plasmonic switch) is eliminated. To achieve this goal, the doped silicon section with the back gate is substituted with an un-doped one. Moreover, the platinum layer is substituted with a Perfect Electric Conductor (PEC). In this manner, the middle section becomes equivalent to the plasmonic waveguide shown in Fig. 2(b), with characteristic impedance Z0, phase constant β and length ld = ld1. This setup is employed to estimate the incident field Ei1y at an observation point along the reference plane 1 and the wave impedance of the dominant mode. The observation point is chosen sufficiently far from the metal edges so that the evanescent fields that exist in the proximity of the edges do not affect the estimated field with the dominant mode variations. Now that the required information is available, the S-parameter calculation of the active devices is continued. To this end, the discontinuity with the unknown scattering matrix is introduced between the waveguides as the output transmission line is terminated with the perfect match layers. Afterward, the electric field component is computed at the similar observation point along reference plane 1. The calculated total field is equal to Eytotal1 = Ei1y - Eyr1. Knowing Ei1y from the previous simulation, S11 can be computed: S11 = Eyr1 / Ei1y. After estimating the transmitted field Eyr2 at the reference plane 2, S21 is similarly calculated as S21 = Eyr2 / Ei1y.
4. Plasmonic switch with the Schottky contact
In order to present a guideline for designing the plasmonic switch in different frequency ranges, the dispersion relation of the described structure (in Fig. 1) with different indentation depths “h”, calculated by the analytical mode (Eq. (1) and Eq. (2)) are shown in Fig. 3. As depicted, the resonance frequency of the plasmonic structure “fr” decreases as the depths of the holes “h” increases. In this manner, the indentation heights “h” can be determined for a specific design with a required maximum working frequency limit. In Fig. 3, the dispersion relation of the radiating mode is also illustrated. Comparing the phase constants of the radiating mode and the TMx modes along the plasmonic structure with different “h” in Fig. 3, it is understood that the SSPPs are not bounded to the metal edges at z = (-h – t2) plane as . This places a minimum operating frequency limit on the plasmonic device since the SSPPs are not restricted inside the silicon wafer as β ksi.
Figure 4 represents the fundamental mode wave impedance Zxr and dispersion relation of the input and output waveguides calculated by the full wave simulator as h = 60 µm. To this end, the calibration simulation (detailed in Fig. 2(b)) is performed. In this manner, the phase constant β is first computed for a section of the waveguide with length ld as β = φ / ld where, φ is the phase of the waveguide port 1 to 2 transmission coefficient SWG21 ( = |SWG21| × e(j × φ)). Next, the wave impedance of the fundamental mode is computed as Zxr = β/ ω × ε. As mentioned, the characteristic impedances of the waveguides are chosen equal to their fundamental mode wave impedance Z0 = Zxr. As depicted in Fig. 4, the resonant frequency is located at 320 GHz. The differences between the SSPP characteristics (resonant frequency and maximum achievable phase constant) calculated by the analytical model in Eq. (1) and Eq. (2), and the full wave simulator are due to the consideration of the exact shape of the indentations edges inside the numerical solver. The dispersion relation variations of a corrugated metal with curved-shape edges compared to the one with sharp corners have been also discussed in .
To show the effectiveness of the designed switch, the simulation is performed with different applied voltages. Figures 5(a)-5(b) and Figs. 5(c)-5(d) depict the distribution of the electron density logarithm (log10 n) inside the doped silicon wafer and the magnitude of the electric field |E| = (|Ex|2 + |Ey|2)0.5 at f = 300 GHz, throughout the active device as the applied voltages are 1 V and −80 V, respectively. As presented in Fig. 5(a), the depletion layer width is almost negligible as the Schottky diode is forward-biased (Va = 1). In this condition, the plasmons are attenuated as they propagate along the device (see Fig. 5(b)). However, the depletion layer width increases up to 14 µm as the diode is reverse-biased (see Fig. 5(c)). In this case, the switch is operating in the ON mode and SSPPs suffers from small attenuations (see Fig. 5(d)), if they are concentrated inside the depleted region, with small electrical conductivity. Comparing the distribution of the electric field magnitude shown in Figs. 5(b) and 5(d), it is concluded that the wave concentration along the edges of the metallic indentation are kept similar at a single frequency, as the device is operating in the ON and the OFF mode. Applying high reverse voltages in a structure, grooved with sharp angle edges is not possible due to charge accumulation on the corners. This high charge density results into high electric field values which can end up to the silicon breakdown. Employing rounded metal edges allow the designer to apply very high reverse voltages up to −80 V before reaching the breakdown condition. In the design with curved edges, the breakdown limit will not reach unless Va becomes less than V.
Figure 6 presents the transmission coefficient S21 of the plasmonic THz switch implemented inside the doped silicon as different bias voltages are applied onto the Schottky contact. As illustrated, the insertion loss of the proposed device is less than 1dB in a wide frequency range. Moreover, the switch offers signal isolations (S21ON – S21OFF) up to 13 dB at 320GHz. On the other hand, the isolation reduces down to 1.5 dB in the first portion of the simulated frequency range. The signal isolation offered by the plasmonic switch can impose another criterion on the minimum operating frequency of the switch. Here, at least 3 dB signal isolation is expected from a single Schottky-diode-based switch. Therefore, it is concluded that the operating bandwidth of the first design is 60 GHz from 260 GHz to 320 GHz.
In Fig. 7, the return loss of the plasmonic THz switch is depicted. As presented, the return loss of the device is better than −30 dB as operating in the ON mode. The small amount of the input signal reflection is very attractive especially as connecting several components in a complex photonic system.
In order to achieve a more appropriate plasmonic switch, it is critical to improve the signal isolation between the ON and the OFF modes. For this purpose, several switches can be cascaded next to each other. This can increase the wave attenuation as the switch is in the OFF mode. However, it can also hurt the device insertion losses. To show the effectiveness of this method, four series of the designed switches are cascaded to establish a structure with length. Figure 8 depicts the simulated transmission coefficients of the series of the switches with an acceptable level of signal isolation (>10 dB) in the frequency range of interest (260GHz - 320GHz). As expected, this configuration suffers from at least 5 dB attenuations throughout the frequency range as operating in the ON mode.
As shown, it is possible to achieve high levels of signal isolation by extending the length of the active device. However, the large reverse voltages required to achieve an acceptable level of insertion losses make the device application in modern compact photonic systems unfeasible. To address this problem, an optimized plasmonic switch is proposed in the following section.
5. Optimization: plasmonic switch using a PIN diode
Figure 9 depicts a schematic of the optimized structure. In this design, a highly p++-type doped well with the acceptor ion density and Gaussian profile is considered beneath a section of the metallic layer (see Fig. 9). Moreover, the silicon wafer employed in this design is almost intrinsic with n-type doping density ND2 = 5 × 1013 (cm−3). As will be presented, the p++-type doped well and the n++-type doped Ohmic contact (with doping density ND-Ohmic = 1017 cm−3 located at y = - t1 – t2) establish a PIN diode with promising properties. It is famous that the PIN diode operates in high-level-injection mode. This means that the spilled carriers from the p++ and n++ areas fill the diode intrinsic region as it is forward-biased. The long intrinsic layer with length (t1 – h = 100 µm) is beneficial in several aspects. First, it enables fast switching of the diode compared to conventional PN diodes. Additionally, it establishes a low loss plasmonic waveguide for the SSPP as the switch is operating in the ON mode and the diode is reverse-biased. Furthermore, high SSPP attenuations are expected as the diode is forward-biased and the switch is operating in the OFF mode. In accordance with the previous design, the control voltage Va is applied between the metal and the Ohmic contact located beneath the device at y = - t1 – t2.
Here, the simulation results of the optimized device with the length ld2 = 5 × d are reported. Figures 10(a) and 10(b) respectively depict the distributions of the hole and electron density logarithm (log10 p and log10 n) inside the intrinsic silicon wafer as the applied voltage is 5V. As shown in Figs. 10(a)-10(b), the PIN diode operates in the high-level-injection mode with very high level of electron and hole densities as Va = 5 V. Figure 10(c) depicts the magnitude of the ac electric field inside the plasmonic switch as the PIN diode is forward-biased. As expected, the presence of the high electron and hole densities in the forward bias condition causes large wave attenuations as the SPPs are passing through the device. In Figs. 10(d)-10(e), the distributions of the electron and hole density logarithm inside the device with Va = 0 V are presented, respectively. As the diode is reverse-biased, the electron and hole densities are respectively less than or equal to 5 × 1013 (cm−3) and 107 (cm−3). This is true throughout the silicon wafer except at the locations of the Ohmic contacts. The small numbers of free carriers in the reverse-biased diode guarantee negligible insertion losses as the switch is operating in the ON mode. This is confirmed by the magnitude of the ac electric field inside the active device presented in Fig. 10(f). Comparing the field distribution inside the plasmonic switch in the ON and OFF mode (Figs. 10(c) and 10(f)) at a single frequency, it is concluded that the field profile is largest at the proximity of the indentation edges and it decreases exponentially as moving to the perpendicular direction (y axis).
Figure 11 presents the transmission coefficient S21 of the optimized plasmonic switch as different voltages are applied between the p++ and n++-type doped Ohmic contacts. The PIN diode is forward-biased as Va rises above the threshold voltage Vth = 5 V. As illustrated in Fig. 11, the signal isolations can be further improved by increasing the applied voltage above Vth. This is due the increase of the carrier densities compared to the ones depicted in Figs. 10(a)-10(b). As illustrated in Fig. 11, the difference between the power of the transmitted signal in the ON (Va-ON = 0 V) and the OFF (Va-OFF = 7 V) modes can reach up to 14 dB at 320GHz, and the minimum expected isolation in the frequency range is about 7 dB. The insertion loss of the proposed device is less than 2dB in a wide frequency range.
In Fig. 12, the return losses of the THz plasmonic switch with the PIN diode under different bias voltages are shown. As illustrated, the return loss of the switch operating in the ON mode (Va = 0 V) is better than −20 dB.
In this paper, a THz plasmonic switch inside a silicon wafer is proposed and simulated. The results are presented using the scattering parameters of the active device. Due to the maturity of the semiconductor device fabrication techniques, it is anticipated that the proposed design can be implemented easily compared to the previously proposed plasmonic switches. However, the developed device suffers from high required control voltages. To address this challenge, an optimized design with an integrated PIN diode is suggested. As illustrated, the optimized switch provides comparatively high signal isolations and acceptable level of insertion losses. Moreover, it is shown that the device can operate in a wide THz frequency range. Additionally, it is expected that this design can be further improved by incorporating a variety of doped areas inside the device. For instance, this may be possible by increasing the number of the p++-doped wells. Small input reflection coefficients of the designed switches suggest that they can be cascaded to achieve high signal isolations. We envision that the proposed switches may be useful in future all-integrated silicon-based THz plasmonic devices and communication systems.
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