## Abstract

We present an approach to implementing three-input addition and subtraction of quaternary base numbers in the optical domain using multiple non-degenerate four-wave mixing (FWM) processes in a single highly nonlinear fiber (HNLF) and differential quadrature phase-shift keying (DQPSK) signals. By employing 100-Gbit/s three-input return-to-zero DQPSK (RZ-DQPSK) signals (A, B, C), we demonstrate 50-Gbaud/s three-input quaternary hybrid addition and subtraction (A + B-C, A + C-B, B + C-A). Moreover, by adding a conversion stage from C to –C via conjugated degenerate FWM, we also demonstrate 50-Gbaud/s three-input quaternary addition (A + B + C). The power penalties of three-input quaternary addition and subtraction (A + B-C, A + C-B, B + C-A, A + B + C) are measured to be less than 6 dB at a bit-error rate (BER) of 10^{−9}. In addition, no significant degradations are observed for RZ-DQPSK signals (A, B, C or –C) after the operations of quaternary addition and subtraction.

© 2013 OSA

## 1. Introduction

Two important arithmetic modules, i.e., addition and subtraction, are considered to be fundamental building blocks of digital signal processing which are ubiquitous in microprocessors for arithmetic operations. Despite wide use of addition and subtraction in the electrical domain, the processing speed is somehow limited due to the high-speed electronic bottleneck. Given the great desire to alleviate the latency of digital signal processing, it might be valuable to implement high-speed arithmetic operations of addition and subtraction in the optical domain.

Optical nonlinearities are promising candidates to enable various optical digital signal processing functions [1, 2], such as logic gates, regeneration and coding/decoding [3–22]. Previously, optical logic gates of binary numbers were widely reported in various platforms for on-off keying (OOK) and (different) phase-shift keying ((D)PSK) binary modulation formats [3–19], including the use of cross-gain modulation (XGM) or four-wave mixing (FWM) in semiconductor optical amplifiers (SOAs) [3–5], nonlinear polarization rotation, FWM or cross-phase modulation (XPM) in highly nonlinear fibers (HNLFs) [6–9], second-order nonlinearities and their cascading in periodically poled lithium niobate (PPLN) waveguides [10–15], FWM in chalcogenide (As_{2}S_{3}) waveguides [16], FWM in silicon nanowires [17, 18], and FWM in dispersion-engineered photonic crystal waveguides [19].

With unabated exponential growth of data traffic, advanced multi-level modulation formats become of great importance to improve the capacity and spectral efficiency of communication systems [23]. For instance, differential quadrature phase-shift keying (DQPSK) with 2-bit information in one symbol has been extensively used in high-speed optical fiber transmission systems [24, 25]. Beyond transmission, processing multi-level modulation formats in the optical domain could be another interesting topic [26–30] compatible with superior network performance and advanced data management. It is noted that multi-level modulation format contains multiple constellation points in the complex plane which can be used to denote high base numbers. As a typical multi-level modulation format, DQPSK with four constellation points (i.e., four-phase levels) in the complex plane can represent a quaternary base number. The related optical signal processing functions to multi-level modulation formats could be addition and subtraction of high base numbers. In addition, multiple-input operations are expected to increase the processing throughput and capability beyond conventional two-input functions. In this scenario, a laudable goal would be to perform multiple-input addition and subtraction of high base numbers because: (i) high capacities might be achievable, (ii) optical spectra might be utilized efficiently, and (iii) processing throughput might be improved. Recently, we have demonstrated three-input binary logic operations for OOK and DPSK signals using cascaded second-order nonlinearities in PPLN waveguides [13] and two-input addition and subtraction of quaternary/octal/hexadecimal base numbers using FWM in HNLFs [31, 32]. So far three-input addition and subtraction of high base numbers have not yet been reported.

In this paper, we propose an approach to performing three-input optical addition and subtraction of quaternary base numbers using multiple non-degenerate FWM processes in a single HNLF. By adopting 100-Gbit/s DQPSK signals (A, B, C), we demonstrate 50-Gbaud/s three-input hybrid addition and subtraction of quaternary base numbers (A + B-C, A + C-B, B + C-A) [33]. The power penalties of three-input quaternary hybrid addition and subtraction are measured to be less than 6 dB at a bit-error rate (BER) of 10^{−9}. Moreover, by exploiting an additional degenerate FWM process to obtain –C from C, we also demonstrate 50-Gbaud/s three-input quaternary addition of A + B + C using A, B and –C as three inputs. The power penalty is measured to be less than 6 dB at a BER of 10^{−9}. Additionally, negligible power penalties are observed for three DQPSK signals after addition and subtraction operations.

## 2. Concept and working principle

Figure 1 illustrates the concept and working principle of the proposed three-input optical addition and subtraction of quaternary base numbers. From the constellation in the complex plane (i.e., I/Q plane), it is clear that we can use four-phase levels (0, π/2, π, 3π/2) of DQPSK to represent quaternary base numbers (0, 1, 2, 3). To implement three-input optical quaternary addition and subtraction, a single nonlinear device (e.g., HNLF) is employed. Three input DQPSK signals (A, B, C) are launched into the nonlinear device, in which three converted idlers (idler 1, idler 2, idler 3) are simultaneously generated by three non-degenerate FWM processes. To better understand the working principle, we derive the electrical field ($E$) and optical phase ($\Phi $) relationships of three non-degenerate FWM processes under the non-depletion approximation expressed as

where the subscripts A, B, C, i1, i2, i3 denote input signal A, signal B, signal C, output idler 1, idler 2 and idler 3, respectively. Considering the phase wrap characteristic with a period of 2π, the linear phase relationships in Eqs. (1b)(2b)(3b) imply that three converted idlers 1~3 correspond to modulo 4 operations of quaternary hybrid addition and subtraction of A + B-C, A + C-B and B + C-A, respectively. Another expected operation is quaternary addition of all three-input quaternary base numbers, i.e., A + B + C, which can be implemented using –C instead of C as the input. Note that the conversion from C to –C can be achieved using conjugated degenerate FWM process in an HNLF.## 3. Experimental setup

Figure 2
shows the experimental setup for 50-Gbaud/s three-input optical quaternary addition and subtraction. Three continuous-wave lasers are sent to a 100-Gbit/s (50-GSymbol/s) return-to-zero DQPSK (RZ-DQPSK) transmitter (Tx) to produce three 100-Gbit/s 2^{7}-1 RZ-DQPSK signals (A, B, C). The duty cycle of RZ-DQPSK is 50%. After undergoing relative delay, three 100-Gbit/s 2^{7}-1 RZ-DQPSK signals (A, B, C) are fed into a 460-m piece of HNLF which has a nonlinear coefficient (γ) of 20 W^{−1}·km^{−1}, a zero-dispersion wavelength (ZDW) of ~1556 nm, and a dispersion slope (S) of ~0.026 ps/nm^{2}/km. Note that the low and flat dispersion of HNLF enables multiple non-degenerate FWM processes. Consequently, three converted idlers (idler 1, idler 2, idler 3) are simultaneously generated carrying three quaternary hybrid addition and subtraction results of A + B-C, A + C-B and B + C-A, respectively.

Beyond hybrid addition and subtraction (A + B-C, A + C-B and B + C-A), another desirable operation of addition for all three-input quaternary numbers, i.e., A + B + C, is also available by incorporating an additional “C to –C” conversion stage. As shown in the inset of Fig. 2, degenerate FWM with phase conjugation can be employed to obtain –C from C according to the electrical field relationship ${E}_{-C}\propto {E}_{CW}^{2}\cdot {E}_{C}^{*}$ and optical phase relationship ${\Phi}_{-C}=2{\Phi}_{CW}-{\Phi}_{C}$. Using A, B and –C as three inputs, we can achieve quaternary addition of A + B + C carried by the converted idler 1.

A 50-GHz delay line interferometer (DLI) with a relative delay of 20 ps between two arms is adopted to demodulate the in-phase (Ch. I) and quadrature (Ch. Q) components of 100-Gbit/s RZ-DQPSK for direct detection.

## 4. Experimental results and discussions

Figure 3 depicts measured typical spectra for 50-Gbaud/s three-input quaternary addition and subtraction. Shown in Fig. 3(a) is the spectrum for degenerate FWM (C to –C). The wavelengths of input signal C (Sig. C), CW pump and converted signal (–Sig. C) are 1548.7, 1552.0 and 1555.5 nm, respectively. The average powers of input signal C and CW pump coupled into the HNLF for degenerate FWM are 12 and 16 dBm, respectively. The conversion efficiency from C to –C is measured to be −15 dB. Shown in Fig. 3(b) is the spectrum for three-input quaternary hybrid addition and subtraction of A + B-C, A + C-B and B + C-A. Three 100-Gbit/s RZ-DQPSK signals at 1546.6 (A), 1553.2 (B) and 1555.5 nm (C) are employed as three inputs. The average powers of three signals (A, B, C) coupled into the HNLF are measured to be about 9, 13 and 14 dBm. One can clearly see that three converted idlers are obtained by three non-degenerate FWM processes with idler 1 at 1544.3 nm (A + B-C), idler 2 at 1548.9 nm (A + C-B), and idler 3 at 1562.2 nm (B + C-A). The conversion efficiencies are measured to be larger than −21 dB. Shown in Fig. 3(c) is the spectrum for three-input quaternary addition of A + B + C. The converted signal (–Sig. C) in Fig. 3(a) is selected and employed as input instead of Sig. C in Fig. 3(b). The converted idler 1 at 1544.3 nm (A + B + C) is obtained by non-degenerate FWM. Note that another two converted idlers are also achieved by another two non-degenerate FWM processes with idler 2 at 1548.9 nm (A-B-C) and idler 3 at 1562.2 nm (B-A-C), which are not marked in Fig. 3(c).

In order to further confirm the implementation of three-input quaternary addition and subtraction, we measure the temporal waveforms and balanced eye diagrams of the demodulated in-phase (Ch. I) and quadrature (Ch. Q) components of input 100-Gbit/s RZ-DQPSK signals and converted idlers. It is noted that the combination of Ch. I and Ch. Q represents quaternary base numbers (00: ‘0’, 01: ‘1’, 11: ‘2’, 10: ‘3′). By carefully comparing the sequences of input signals and converted idlers, as shown in Fig. 4 , one can clearly see the successful implementation of 50-Gbaud/s conversion from C to –C using degenerate FWM and three-input quaternary addition and subtraction of A + B-C, A + C-B, B + C-A and A + B + C using non-degenerate FWM. Figure 5 shows measured temporal waveforms and balanced eye diagrams of the demodulated Ch. I and Ch. Q components of 100-Gbit/s RZ-DQPSK signals (A, B, C, -C) after three-input quaternary addition and subtraction operations. The quaternary base numbers carried by these signals keep unchanged after quaternary addition and subtraction (i.e., after HNLF) operations.

Figure 6
depicts measured BER curves for 50-Gbaud/s three-input quaternary hybrid addition and subtraction of A + B-C, A + C-B and B + C-A. As shown in Fig. 6(a) and (b), the power penalties of three-input quaternary hybrid addition and subtraction (A + B-C, A + C-B, B + C-A) are accessed to be less than 6 dB at a BER of 10^{−9}. Figure 7
plots BER curves for 50-Gbaud/s conversion from C to –C and three-input quaternary addition of A + B + C. Negligible power penalty is observed for the conversion from C to –C. The power penalty of quaternary addition of A + B + C is measured to be less than 6 dB at a BER of 10^{−9}. Remarkably, according to the electrical field and optical phase relationships in Eqs. (1)-(3), we believe that the degradations of quaternary addition and subtraction (A + B-C, A + C-B, B + C-A, A + B + C) are mainly induced by accumulated distortions from three-input signals (A, B, C or –C). In addition, the presence of unwanted FWM components shown in the spectrum and the relative polarization rotation among different signals might also influence the overall operation performance. Figure 6(c)(d) and Fig. 7(a)(b) also show measured BER curves for three signals (A, B, C or –C) after quaternary addition and subtraction (i.e., after HNLF) operations. It can be clearly seen that no significant degradations are observed for the three signals during the operations of quaternary addition and subtraction.

Figure 8 displays constellation diagrams for 100-Gbit/s RZ-DQPSK input and output signals (A, B, C, –C) and converted idlers (A + B-C, A + C-B, B + C-A, A + B + C), which are measured by an optical complex spectrum analyzer (APEX AP2440A). One can clearly see that all signals and idlers have four-phase levels (0, π/2, π, 3π/2), representing quaternary base numbers.

With future improvement, several aspects could be considered as follows. 1) The same scheme can also work with QPSK (NRZ-QPSK or RZ-QPSK) signals assisted by coherent detection. 2) To avoid the influence from unwanted FWM components and achieve favorable operation performance, it is preferred to use unequally spaced input signal wavelengths as adopted in the experiment. In the case of equally spaced input signal wavelengths, additional wavelength conversion might be required to rearrange the wavelengths and enable the desired operations. 3) The proposed three-input addition and subtraction can be potentially extended to even higher base numbers, i.e., three-input octal/hexadecimal addition and subtraction (A + B-C, A + C-B, B + C-A, A + B + C, A-B-C, B-A-C) using non-degenerate FWM processes and 8-ary phase-shift keying (8PSK) or 16-ary phase-shift keying (16PSK) signals. 4) Using addition and subtraction as building blocks, it might be possible to further extend the applications in more complicated arithmetic functions in the optical domain. 5) In addition to HNLFs, there might be some other alternative candidates applicable for addition and subtraction of high base numbers, including the use of second-order nonlinearities in PPLN waveguides and third-order nonlinearities in semiconductor optical amplifiers (SOAs), As_{2}S_{3} waveguides, and silicon waveguides.

## 5. Conclusion

In summary, using DQPSK signals with four-phase levels (0, π/2, π, 3π/2) to represent quaternary base numbers (0, 1, 2, 3), we have proposed a scheme to perform three-input optical quaternary addition and subtraction using multiple non-degenerate FWM in a single HNLF. Using 100-Gbit/s three-input RZ-DQPSK signals (A, B, C) and three non-degenerate FWM processes, we have demonstrated 50-Gbaud/s three-input quaternary hybrid addition and subtraction (A + B-C, A + C-B, B + C-A). Assisted by an additional conjugated degenerate FWM process, 50-Gbaud/s conversion from C to –C is enabled. Using –C instead of C as input, we have further demonstrated 50-Gbaud/s three-input quaternary addition of A + B + C. The power penalties of three-input quaternary addition and subtraction (A + B-C, A + C-B, B + C-A, A + B + C) are assessed to be less than 6 dB at a BER of 10^{−9}. Negligible power penalties are observed for RZ-DQPSK signals after the operations of quaternary addition and subtraction. The proposed approach might be further extended in three-input addition and subtraction of even higher base numbers, more complicated arithmetic functions, and other platforms.

## Acknowledgments

This work was supported by the National Natural Science Foundation of China (NSFC) under grants 61222502, 61077051, 11274131, the Program for New Century Excellent Talents in University (NCET-11-0182), and the Natural Science Foundation of Hubei Province of China under Grant 2011CDB032.

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