A highly-integrated optical phase-locked loop with a phase/frequency detector and a single-sideband mixer (SSBM) has been proposed and demonstrated for the first time. A photonic integrated circuit (PIC) has been designed, fabricated and tested, together with an electronic IC (EIC). The PIC integrates a widely-tunable sampled-grating distributed-Bragg-reflector laser, an optical 90 degree hybrid and four high-speed photodetectors on the InGaAsP/InP platform. The EIC adds a single-sideband mixer, and a digital phase/frequency detector, to provide single-sideband heterodyne locking from −9 GHz to 7.5 GHz. The loop bandwith is 400 MHz.
© 2012 Optical Society of America
Ever since the first demonstration of optical phase-locked loops (OPLL) , significant effort has been devoted for a wide range applications, as described in Ref. [2–7] and references therein. An OPLL is highly desirable for many applications, such as continuous-wave (CW) chirped LIDAR [4, 8, 9], coherent receivers [5, 7, 10], laser linewidth narrowing and “cloning” of another laser’s properties [11, 12], and millimeter wave generation [4, 6].
Recent progress on heterodyne optical phase locking can be found in Ref. [3, 13]. By using an on-PIC modulator or an RF mixer, heterodyne locking can be achieved with a phase detector. However, without any frequency pull-in, the offset frequency cannot be easily tuned, and the locking range is limited. Every time the RF reference frequency is reset, either the master laser or slave laser in this OPLL needs to be adjusted to make sure the free running offset frequency is within the pull-in range of the phase-locked loop, which is normally several hundred MHz at most. Moreover, the loop cannot differentiate the sign of the frequency offset for heterodyne locking. In other words, there are two stable locking points for the heterodyne locking, one is at Δf > 0, and the other is at Δf < 0, where Δf is defined as follow.
In this work, we propose and demonstrate a new architecture of OPLL with both phase and frequency detection and a single-sideband mixer (SSBM) , which enable large-range frequency pull-in and offset frequency tuning within tens of GHz. We successfully achieved heterodyne locking from −9 GHz to 7.5 GHz, where the offset frequency is defined in Eq. (1).
In terms of OPLL design, one of the most important issues is loop delay. Considering the linewidth and the stability of the on-PIC slave laser, and the frequency pull-in error , a 300 MHz loop bandwidth is demanded as a minimum for stable phase locking. To achieve full functionality and keep a relatively short loop delay, a photonic integrated circuit (PIC) is desired, as well as a high-speed electronic IC (EIC) and a carefully designed loop filter (LF). The architecture of the system is shown in Fig. 1. It is designed to be a second order phase-locked loop. The designed phase margin is 65 degree, and the amplitude margin is 7 dB.
On the PIC, we integrated a widely-tunable sampled-grating distributed-Bragg-reflector (SG-DBR) laser , a star-coupler-based optical 90 degree hybrid , four single-ended high-speed quantum well photodetectors, and microstrip transmission lines. The SG-DBR laser acts as the widely-tunable slave laser. By injecting current into the back and front mirrors, the reflection spectrum vernier can be tuned so that the laser can cover a 40 nm range. Meanwhile, the current injection into the phase section can tune the laser wavelength finely within one cavity mode, which is around 40 GHz.
The reference laser and the SG-DBR slave laser are mixed in the optical 90 degree hybrid. In-phase and quadrature signals are then generated, which are used for single-sideband mixing and phase/frequency detection. As for the 90 degree hybrid design, a 2-by-4 star coupler is used. We calculated a 2.3 degree error across 40 nm, and estimated about 4 dB loss. On each of the star coupler output waveguides, there is a 50 μm - by - 3 μm p-i-n waveguide photodetector. The electrical signal from the four photodetectors are led to the same side of the PIC using four 430 μm long miscrostrip transmission lines for PIC-EIC interconnection. Bisbenzocyclobutene (BCB) is used as the dielectric between the signal lines and the RF ground. The RF pads on the PIC have the same pitch size as those on the EIC in order to assemble the PIC and EIC together for system testing.
On this EIC, transimpedance limiting amplifiers, a delay line, an XOR gate and a single-sideband mixer (SSBM) were integrated. The delay line and the XOR gate together act as a phase/frequency detector [14, 17]. The loop filter is a hybrid circuit built on an Aluminium Nitride carrier, using a voltage feedback operational amplifier as an active filter and integrator. The beating signal from the on-PIC photodetectors are finally negatively fed back to the SG-DBR laser phase section through the EIC and the loop filter.
The loop delay of this OPLL is approximately 200 ps, in which 40 ps is from the PIC, >100 ps is from the EIC and 50 ps from the LF and interconnections between them.
The PIC is integrated monolithically on a InGaAsP/InP centered quantum well (CWQ) platform . The full epitaxial structure is show in Fig. 2 as well as a scanning electron microscope (SEM) picture. The fabrication started with a base epi, which includes the N-cladding layer, waveguide layers and quantum well layers. Active and passive areas were defined using quantum well-intermixing technology . After that, the gratings of the SG-DBR laser were defined by electron beam lithography, and a methane/hydrogen/argon (MHA)-based RIE etching. Following the grating definition, a blanket p-cladding and p-contact layer regrowth was carried out using metalorganic chemical vapour deposition (MOCVD). After the regrowth, the next step is the waveguides definition. In order to have better heat dissipation and compactness at the same time, we used surface ridge waveguides for the SG-DBR lasers and deeply-etched waveguides for the other parts of the devices. Cl2/H2/Ar ICP-RIE dry etching as well as InP wet etching was used to defined the features. Following the waveguide etching was RF microstrip transmission lines definition and P-contact metal deposition. The RF lines were formed on BCB over a common ground plane. P-contact vias were opened and Pt/Ti/Pt/Au was then deposited as the P contact metal. To further decrease the passive waveguide loss, we implanted protons to the p-cladding layer of the passive waveguides. The wafer was then thinned down to 130 μm for ease of cleaving. Backside Ti/Pt/Au metallization provided common cathode connections to the n-type substrate. After cleaving and anti-reflection coating of the waveguide facets, the samples were ready for testing. A microscope picture of the PIC is shown in Fig. 3.
The EIC was fabricated by Teledyne Scientific using 500 nm InP HBT technology. The working bandwidth of the EIC is 50 GHz .
3. Device characterization and system testing
The photonic IC was characterized before system testing. The measurement showed that the on-PIC SG-DBR laser can output up to 18 mW optical power measured by reverse biasing the semiconductor optical amplifier (SOA) at the output of the SG-DBR laser. The wavelength tuning range is 40 nm, from 1540 nm to 1580 nm. The tuning sensitivity of the phase tuning section is around 4–10 GHz/mA, depending on the cavity mode position relative to the reflection peak and the DC bias current. The bandwidth of the photodetector is measured by a lightwave network analyzer at 1550 nm wavelength. The 3 dB bandwidth is 18 GHz with −5 Volts bias and 12 GHz with −2 Volts bias. In actual system testing, the bias voltage is around −2 Volts, limited by the InP EIC. The star-coupler-based optical 90 degree hybrid is also characterized. Two laser signals were mixed in this hybrid and beat on the four on-PIC photodetectors. The waveforms from the photodetectors were obtained by a real-time oscilloscope with a sample rate of 40 Gsa/s. The measured phase error between I and Q is around 3 degrees and the phase errors between I+, I− and Q+, Q− are within 10 degrees. Measurements on the EIC are reported elsewhere .
After testing the PIC, EIC and LF separately, they were assembled together by wirebonding. Schematics of the OPLL test bed can be found in Fig. 4 and zoomed-in pictures are also shown. All the system results were taken at 1543 nm wavelength. As mentioned in Section 1, the total loop delay is around 200 ps and therefore, the designed loop bandwidth is 500 MHz, mainly limited by the phase margin. Using lensed fiber, the reference laser signal was coupled into the PIC, and the SG-DBR laser signal was coupled out from the back mirror for monitoring purposes. The optical spectrum of the SG-DBR laser and the reference laser was measured by an optical spectrum analyzer (OSA) and their beat tone measured by an electrical spectrum analyzer (ESA) via a high speed photodetector. The reference laser has a linewidth of 100 kHz, while the linewidth of the SGDBR is above 100 MHz.
We define the frequency difference between the reference laser and the on-PIC SG-DBR laser in Eq. (1). fref is the frequency of the widely-tunable reference laser, and fslave is the frequency of the SG-DBR laser. We successfully phase locked the SG-DBR laser to the reference laser with an offset Δf ranging from −9 GHz to +7.5 GHz. The sign of the offset frequency is designated by applying different control signals to the EIC. With a certain control signal to the EIC, the OPLL can only be heterodyne locked to one single frequency offset, either positive or negative. Figure 5 shows the optical spectra and electrical spectra when two lasers are phase locked with an offset of +6 GHz and −6 GHz. The optical spectra verify single-sideband locking.
With the phase/frequency detector, as long as the original beating frequency of the two lasers is within the bandwidth of the on-PIC photodetector and the expected locking wavelength of the SG-DBR laser is within the same cavity mode, heterodyne phase locking can be achieved. By only changing the RF reference frequency, we continuously shifted the SG-DBR frequency within the range of −9 GHz to −1.5 GHz, and also from 1.5 GHz up to 7.5 GHz with phase locking to the reference laser. In other words, within such a locking range the RF frequency can be arbitrarily set, and the OPLL will automatically phase lock. There was competition with injection locking due to intrachip reflections for offsets less than 1.5 GHz. The frequency offset is accurately defined by the RF source, normally within Hz or sub-Hz range. Figure 6 shows the electrical spectra of the phase-locked laser with various offsets. The electrical spectra also shows that the loop bandwidth is around 400 MHz.
In this work, we have successfully demonstrated the first highly-integrated optical phase-locked loop with phase/frequency detection and single-sideband heterodyne locking. By integrating an optical 90 degree hybrid on the PIC and a SSBM on the EIC, single-sideband offset locking has been achieved within 16.5 GHz range. The OPLL loop bandwidth is 400 MHz.
It is anticipated that by replacing the continuous-wave (CW) reference laser with a phase-locked optical comb, e.g. a mode-locked laser, and then offset locking to different comb lines, the slave laser frequency could be possibly swept through several terahertz, while maintaining the coherent relationship to the original locking source. With several terahertz bandwidth, CW chirped LIDAR will have a depth resolution within the tens of micron range .
This work is supported by DARPA PICO project. A portion of this work is done in the UCSB nanofabrication facility, part of NSF funded NNIN network.
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