We design and experimentally demonstrate an ultrashort integrated polarization splitter on silicon-on-insulator (SOI) platform. Our polarization splitter uses a hybrid plasmonic waveguide as the middle waveguide in a three-core arrangement to achieve large birefringence, allowing only transverse-magnetic (TM) polarized light to directionally couple to the cross port of the directional coupler. Finite-difference time-domain (FDTD) and eigenmode expansive (EME) calculations show that the splitter can achieve an extinction ratio of greater than 15 dB with less than 0.5 dB insertion losses. The polarization splitter was fabricated on SOI platform using standard complementary metal-oxide-semiconductor (CMOS) technology and measured at telecommunications wavelengths. Extinction ratios of 12.3 dB and 13.9 dB for the transverse-electric (TE) and TM polarizations were obtained, together with insertion losses of 2.8 dB and 6.0 dB.
©2012 Optical Society of America
An on-chip polarization splitter is an important component in polarization diversity circuits that aim to achieve polarization independent operation of photonic integrated circuits (PICs) . The main approaches for polarization splitting involve either mode coupling as exemplified by multimode interference (MMI) splitters [2, 3] and directional couplers (DC) [4, 5], or adiabatic mode evolution . The main disadvantage of adiabatic mode evolution based structures is a large device footprint required for adiabatic operation, for example, the devices reported by Watts et al  require ~200 μm long to achieve extinction ratio (ER) of ~22 dB. In comparison, mode coupling based devices can be much shorter, with coupling lengths of a few micrometers, but suffer from smaller bandwidths and tighter fabrication tolerances .
For this reason, ultra short polarization splitters utilizing mode coupling are of greater interest for densely integrated photonic circuits. This is made possible by designing the waveguides so that one polarization has a coupling length that is much smaller than the other polarization's coupling length. This requires some source of birefringence in the structure of the coupler, and previous approaches include using rectangular nanowire waveguides , photonic crystals , slot waveguides , asymmetric structures , or bends . The criteria for these designs include length, ER, insertion loss (IL), bandwidth, as well as fabrication feasibility (i.e., complementary metal-oxide-semiconductor (CMOS) compatibility and large fabrication tolerance). For examples, Fukuda et al demonstrated a 16-μm long device with ER of 15 dB and IL of 0.5 dB utilizing a DC coupler , and Hosseini et al demonstrated a 14-μm long device with ER of 15 dB and IL of 1.7 dB utilizing MMI. However, all these devices suffer from tight fabrication tolerances and small bandwidths.
Plasmonic waveguides exhibit large birefringence, and their use for polarization splitting has been proposed and studied theoretically [12–14]. Directional coupling between plasmonic waveguides has been experimentally observed . However, to our knowledge, the use of plasmonic waveguides for integrated polarization splitters has not yet been experimentally demonstrated. In this paper, we design and fabricate ultra-compact photonic polarization splitters using a vertical metal-dielectric-Si hybrid plasmonic waveguide (HPW) [16, 17] which can achieve large birefringence. The coupler is designed and analyzed using eigenmode expansion (EME) and finite-difference time-domain (FDTD) methods, fabricated on silicon-on-insulator (SOI) platform using standard CMOS technology [18, 19], and measured using the conventional fiber-waveguide-fiber method at telecommunication wavelengths. During preparing this paper, we notice that Lou et al also proposed a similar device using Au as the metal cap and air as the cladding . For seamless integration into the SOI platform along with other photonic and plasmonic devices, our devices use copper as the metal cap and SiO2 as the cladding, and the width of the metal cap is designed to be slightly larger than that of the beneath Si core to minimize the effect of possible mask misalignment.
2. Device design
The operation and design of a 3-core coupler can be understood using coupled mode theory . The coupler is targeted to operate in the telecommunications wavelength of λ0 = 1.55 μm, where silicon is transparent. In order for power to couple efficiently between the 3 waveguides, we require that the propagation constants of the three individual waveguide modes to be close to one another. In our design, we fix the outside waveguides to have a rectangular cross section of 500 nm × 220 nm, and the central core to be a Cu-SiO2-Si hybrid plasmonic waveguide having a width of 200 nm, as shown schematically in Fig. 1 . These dimensions were chosen so that the proposed couplers can be patterned easily with conventional deep ultraviolet (DUV) lithography. Copper is used as the metal because it is a CMOS-compatible material and it provides a relatively small propagation loss at telecommunications wavelengths [22, 23]. Using a commercial eigenmode solver (Lumerical  MODE Solutions), the propagation constants of the transverse-electric (TE) and transverse-magnetic (TM) modes of the outside waveguides can be calculated, with nTE = 2.445 and nTM = 1.774. The refractive indices of Si and SiO2 were taken to be 3.4764 and 1.444 respectively, while the optical properties of the copper were taken from .
For the central HPW, which is expected to support only a TM mode, we used the same eigenmode solver to obtain propagation constants nHPW for the copper-capped HPW as a function of the dielectric gap thickness g. The copper cap has a width of 320 nm, slightly larger than that of the 200 nm wide Si core, so that the device would be more insensitive to mask misalignment during DUV lithography, which is expected to be around 60 nm. The propagation constants of the eigenmodes of this structure are shown in Fig. 2 as a function of g, together with the propagation constants of the outside waveguides. From the figure, one can see that the propagation constants are matched at around g ≈70 nm.
In order to achieve a small device footprint, we aim to minimize the coupling length of the TM mode, LC, by making the coupling as strong as possible. This can be achieved by placing the waveguides as close to each other as possible, and thus we would expect some deviation from the above analysis which is only accurate for weakly coupled modes. Because of the constraints of our DUV lithography, we choose a waveguide spacing of d = 200 nm.
Having fixed the cross-section of the device, we calculate the required coupling length LC by finding the propagation constants of the quasi-TM supermodes of the coupling section. These modes (computed using the same eigenmode solver) have effective mode indices nA, nB and nC and field distributions as shown in Fig. 3 . There are 2 symmetric supermodes A and C and one antisymmetric supermode B. To achieve maximum power transfer efficiency , the effective indices of the supermodes must satisfy
Figure 2(b) shows the effective indices of these supermodes. From the figure, this occurs at a gap width of g = 75 nm. With this value of g and knowing the supermode indices, the coupling length can be calculated easily following ,
We note that plasmonic losses from copper should be small, as most of the electromagnetic energy is confined to the lossless Si or SiO2 materials. This can be seen in the low imaginary indices of the supermodes A, B and C, which are 1.6 × 10−3, 1.7 × 10−5 and 1.4 × 10−3 respectively. Over the short coupling length of 6.5 μm, this corresponds to losses of less than 0.4 dB. Thus, in the actual experiment, most of the loss would be dominated by other sources such as waveguide mode mismatch, reflections, or waveguide sidewall roughness.
3. Simulation results
3.1. Eigenmode expansion method (EME)
Having already computed the guided modes of the structure and input waveguides in our design, we can use the eigenmode expansion method to evaluate the performance of our device. This method is especially suitable for our polarization splitter because the structure is mostly invariant in the direction of propagation of the light, and hence only a few modes in each cross section need to be computed and propagated. For the input and output waveguides, only the fundamental TE and TM modes are of interest, while at the three guide section, 5 modes (2 TE modes and 3 TM modes, A B and C) were computed. These mode profiles are shown in Fig. 3.
In particular, we want to compute the power that is coupled from the input TE (TM) modes to the output TE (TM) modes of the bar and cross waveguides. If we assume that there are no reflections at the transitions between the three core region and the waveguides, we can decompose our coupler into a system described by 3 S-parameter matrices: a transition from the input waveguide to the three-core region, propagation through the three-core region, and a transition to the output waveguides. The fraction of power transmitted to the bar and cross ports for each polarization is then the product of the 3 S-parameter matrices.
Figure 4(a) shows the power that is coupled to the bar and cross ports for each polarization as a function of the propagation length D of the coupling region. One can clearly see the expected beating effect for the TM polarized light in the output waveguides with at D = 6.5 μm. In addition, the coupling to the cross port is nearly complete (the peak value is −0.3 dB), which validates our assumptions of low reflections and little coupling to radiation modes.
We wish to extract three key performance characteristics of the device: extinction ratios (ERs), insertion losses (ILs), and 15 dB bandwidths. The extinction ratios of the polarization splitter are defined as
The insertion losses are defined as
All of the quantities in Eqs. (3)-(6) depend on the wavelength of interest because changing the mode's frequency not only changes the optical path length, but also the optical properties of the copper layer. Figure 4(b) shows the calculated ER and IL for a 6.5-μm long device as a function of wavelength. The 15 dB bandwidth is 70 nm, large enough to cover the c-band. We observe that the TE mode remains almost entirely in the Bar port. This is because in the EME method the two degenerate TE supermodes account for almost all of the input TE mode power, which results in practically no TE light coupling to the cross port. Thus, the cross port shows a high ER of 40 dB, which is beyond the accuracy limit of our numerical methods. Nonetheless, one can use this method to estimate the ER of the Bar port due to residual TM light remaining input waveguide, as well as insertion losses due to the plasmonic waveguide which are ~0.3 dB as expected.
3.2. Fabrication tolerances
Three parameters that vary greatly during device fabrication are expected to affect the operation of the device. These are: a) The gap between the Si waveguide and the HPW, b) mask misalignment, and c) variation in the widths of the Si waveguide cores. Varying these parameters changes the cross section of the coupling region (and also input waveguides for the third case), which affects the mode profiles and effective indices, and thus degrades the device performance. Figure 5 shows results from EME calculations that sweep these 3 parameters across their expected variations. Only ER of the bar port and IL of the cross port are plotted because the EME calculated ER of the cross port is too large and IL of the bar port is too small to be accurate enough. These calculation results show that the coupler can maintain a 15 dB extinction ratio for a gap width variation of ± 10 nm, mask misalignment of ± 30 nm, and a waveguide width variation of ± 20 nm, while 10 dB extinction ratios should be easily achievable with current CMOS fabrication technologies.
3.3. FDTD simulation
FDTD simulations of the designed coupler were performed to validate the calculations of the coupling coefficients using commercial software (Lumerical  FDTD Solutions). Care was taken to ensure that the mesh size was 5 nm at the dielectric gap of the HPW to ensure that the physics of the device is accurately captured in the simulation, and perfectly matched layer (PML) boundaries were used. Figure 6 plots the magnitude of the Poynting vector along the geometry of the device demonstrating the optical response of the device under both TM and TE excitations of 1.55 μm wavelengths. One sees clearly that the device functions as a polarization splitter, with TE light remaining in the bar port while TM light is coupled into the cross port over the length of the device. The performance of the FDTD simulation is overlaid on that for the EME calculations (Fig. 4), which show good agreement for insertion losses and the ER of the bar port. The main differences are due to the sharp bend just after the coupling region. The lower ER for the cross port is due to TE light coupling into the bar port in the bending region, and the slight red shift for the ER peak is due to the bending region slightly increasing the optical length of the coupling region.
4. Device fabrication
As a proof-of-concept, the designed splitter was fabricated together with other photonic and plasmonic devices on SOI wafers with 340-nm top-Si and 2-μm buried oxide. Some key steps of fabrication flow are shown schematically in Fig. 7 : (a) The Si pattern was defined by DUV lithography, followed by dry etching of Si down to the buried oxide using a thin SiO2 as the hard mask. Figure 8(a) shows the scanning electron microscopy (SEM) image of the patterned Si core. The 500 nm wide Si waveguides were terminated by inverse tapers (not shown) to enable efficient coupling to a lensed fiber. (b) A 20 nm Si3N4 and 400 nm SiO2 were deposited subsequently, followed by chemical mechanical polishing (CMP) to planarize the surface. The thin Si3N4 layer was used as the CMP stopping layer. (c) A 20 nm Si3N4 and 500 nm SiO2 were deposited again. (d) Windows were opening by DUV lithography and dry etching of SiO2, stopped on the thin Si3N4 layer. Figure 8(b) shows the SEM image after this step. (e) The remaining Si3N4 in the windows was wet etched by hot H3PO4 solution to expose the surface of the middle Si waveguide core, followed by thermal oxidization to grow a thin SiO2 layer. It is worthy to be noted that this layer is critical for HPWs and its thickness can be accurately controlled using the modern CMOS technology. (f) Cu was deposited using sputtering for 150 nm Cu, followed by Cu plating for 1 μm Cu. After low-temperature (200°C) annealing, Cu CMP was performed to remove Cu outside the windows. Figure 8(c) shows the optical micrograph after this step. Figure 8(d) shows the cross section transmission electron microscopy (XTEM) image of the final splitter. The deposited copper shows a top hat structure with a small air gap. The small air gap is due to over-etching of Si3N4 laterally during wet etching of remaining Si3N4 in the windows (i.e., step (e) in Fig. 7), thus it can be eliminated by careful process control. Figure 8(e) is the enlarged XTEM image around the plasmonic waveguide, showing that the Si core width is 230 nm, the SiO2 gap is 11 nm, and a small air gaps between Cu and the buried SiO2 is 120 nm wide and ~40 nm high.
5. Characterization and results
After dicing, the devices were characterized using an ASE source covering the wavelengths from 1530 nm to 1600 nm (EXFO FLS-2300B). The laser light was first sent to a polarization controller (Agilent 8169A), before being sent down a polarization maintaining (PM) lensed fiber. This fiber was end fire coupled to the chip using an auto-alignment system. Similarly, the output light from the device was coupled into another PM lensed fiber connected to a power sensor and optical spectrum analyzer (ANDO AQ6317B OSA) via a switch, from which measurements of the optical powers were made. The measurement setup is similar to that for conventional photonic chips .
Figure 9 shows the measured spectra of a splitter with a length of 6.4 μm, normalized to the optical spectrum of a reference waveguide without the splitter on the same chip to remove the effects of waveguide and coupling losses. The splitter exhibits broadband performance over the measurement range of 1530 nm to 1600 nm. The IL (averaged over this wavelength range) was 2.8 dB and 6.0 dB for TE and TM modes respectively, while the measured ER (also averaged) was 12.3 dB and 13.9 dB for the bar and cross ports respectively. We can see that although the parameters (such as the Si core height and the gate oxide thickness) of the measured splitters are not optimized (because they were fabricated with many other devices on the same chip) these measurement results already prove that our splitter works.
FDTD simulations of the splitter with parameters approximated from the measured splitter (i.e., with gate oxide thickness of 11 nm, Si core height of 320 nm, Cu cap width of 400 nm, and rectangular air gap beside the Cu cap of 120 nm × 40 nm, as based on Fig. 8(e)) were also performed under both TE and TM excitations of 1.55 μm wavelength. The simulation gives IL of 1.0 dB and 7.7 dB for the TE and TM modes respectively and ER of 11.2 dB and 20.8 dB for the bar and cross ports respectively. For comparison, the splitter without the air gap (keeping other parameters the same) was also simulated, which gives similar results as IL of 1.0 dB and 6.4 dB for the TE and TM modes respectively and ER of 10.0 dB and 19.7 dB for the bar and cross ports respectively. The simulation results agree well with the measurement results and indicate that the small air gaps do not affect the device performance because the gaps occur only in the evanescent fields of the waveguides.
Both measurement and simulation results show that the splitting ratio of the TE modes is quite good while the TM mode experiences much greater insertion loss and lower splitting ratio. This is because the plasmonic mode in the middle HPW can only be excited by the TM mode. Thus, for TE mode, the coupling length between two Si waveguides is much greater than the device length and is insensitive to the parameters of the middle HPW, whereas for TM mode, the parameters of the middle HPW affect the device performance significantly. The poor performance of the measured splitter can be simply attributed to the un-optimized parameters as it leads to large mode mismatches and great reflections at the transitions. Therefore, it can be expected the device performance can be significantly improved after optimization of parameters to approach to the theoretical predictions shown in Fig. 4.
We have proposed, designed, and experimentally demonstrated a novel type of polarization splitter. This splitter is directional-coupler-based and uses a metal/dielectric/Si hybrid plasmonic waveguide to achieve a large birefringence. This enables coupling of one polarization mode of the input waveguide to a second waveguide in a very short wavelength, while the other mode remains unchanged. These results are promising for realizing densely integrated polarization independent PICs. Further work involves optimization of the process steps to minimize reflections at the interfaces and obtain a structure that more closely matches the design specifications.
This work was supported by the Science and Engineering Research Council of A*STAR (Agency for Science, Technology and Research), Singapore Grant 092-154-0098. The author acknowledges support from A*STAR's National Science Scholarship.
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