A polarization splitter and rotator (PSR) based on a tapered directional coupler with relaxed fabrication tolerance is proposed and demonstrated on the silicon-on-insulator platform. The device is simply constructed by parallel-coupling a narrow silicon waveguide with a linearly tapered wider waveguide. Compared to previously reported PSRs based on a normal directional coupler, which suffer from stringent requirements on the accuracy of the narrow waveguide width, the introduced tapered structure of the wide waveguide can be used to compensate the fabrication errors of the narrow waveguide. In addition, only a single step of exposure and etching is needed for the fabrication of the device. Similar high conversion efficiencies are experimentally demonstrated for a narrow waveguide width deviation of 14 nm with large tolerance to the coupler length.
©2012 Optical Society of America
Microphotonic circuits built on the silicon-on-insulator (SOI) platform are very promising thanks to their complementary metal oxide semiconductor (CMOS) compatible fabrication processing. Moreover, their high refractive indices enable bending radii of SOI wires down to a few micrometers with negligible bending loss, leading to extremely compact optical circuits . However, such high refractive indices also introduce high polarization dependences of the group index, the optical coupling and so on . Such polarization dependences have been one of the major challenges for SOI microphotonic devices because the polarization state may change randomly over an optical fiber link, making SOI microphotonic devices incompatible with optical processing functionalities. It is possible to design polarization insensitive SOI ridge waveguides under certain requirements of the waveguide dimensions [3, 4]. However such requirements also limit the design of optical components and the optical confinement, hence the device footprint may be sacrificed as well. One of the most promising ways to solve the polarization sensitivity is based on polarization diversity (Pol-D) technology [5–8]. There are mainly two types of Pol-D circuits. One is based on a grating coupler, which works on a particular polarization and plays the role of a polarization splitter . However, this scheme is limited by the insertion loss and bandwidth of the grating coupler. Another Pol-D scheme is based on polarization splitter and rotator (PSR) technologies [6–9]. In this scheme, the two orthogonal polarizations are first split by a polarization splitter . After that, one of the two polarizations is rotated by 90° by a polarization rotator . Thus, in the rest of the circuit, only one polarization needs to be processed. Previously, we have successfully demonstrated an efficient and compact PSR based on an asymmetrical directional coupler (DC) [12, 13], which parallel-couples a narrow and a wide silicon waveguide. Based on this structure, a Pol-D circuit has also been successfully demonstrated . Compared to the other PSR schemes [5–7, 9, 11, 14, 15], this scheme only needs one step of exposure and etching, thus significantly simplifies the fabrication process. The main challenge of the DC-based PSR is the fabrication error sensitivity. Although the device is relatively insensitive to fabrication errors of the wide waveguide of the DC, the phase matching condition could still be easily destroyed by fabrication errors of the narrow waveguide . Another similar PSR has been proposed relying on mode conversion from the TM0 to the TE1 mode by an adiabatic taper and then from TE1 to TE0 mode by an asymmetrical DC . In this structure, the performance of the asymmetrical DC is still sensitive to fabrication variation.
In this paper, we propose and demonstrate a PSR based on a tapered DC, which parallel- couples a narrow silicon wire to another wide tapered waveguide. The tapered waveguide efficiently compensates the fabrication error of the narrow silicon wire, allowing the device to work well under relaxed fabrication errors. We theoretically analyze the fabrication tolerance of the device. Our experimental results show that the tolerance to the width of the narrow silicon wire is efficiently relaxed to more than 14 nm compared to only a few nanometers for a normal DC, while preserving a high power conversion coefficient over −1 dB. In addition, the sensitivity to the length of the DC is also efficiently relaxed.
2. Principle and simulation
The principle of the proposed PSR is schematically depicted in Fig. 1 . The PSR is based on a tapered DC, which parallel-couples a narrow silicon waveguide to a wide tapered waveguide with a coupling length of L. The width of the narrow waveguide is w1. The wide waveguide is linearly tapered from wa to wb with center width of w2 and taper length of L. The coupling gap between the two waveguides is g. When wa = wb = w2, the structure is degenerated to a simple asymmetrical normal DC as reported previously [8, 12, 13]. In [8, 12, 13], the dimensions of the two waveguides are designed so that the effective refractive index of the fundamental transverse electric (TE0, i.e. Ex dominant) mode of the narrow waveguide equals that of the fundamental transverse magnetic (TM0, i.e. Ey dominant) mode of the wide waveguide. Satisfying this so-called phase matching condition results in a strong cross-polarization coupling between the two waveguides. In this case, if TE0 light is injected into the narrow waveguide, it will be coupled to the TM0 mode light in the wide waveguide and exit from the cross port. On the other hand, when TM0 light is injected into the narrow waveguide, it will keep propagating along it and exit from the through port because of the significant effective refractive index difference between the two asymmetrical waveguides, resulting in very low coupling. To achieve an efficient cross-polarization coupling, both horizontal and vertical symmetries should be broken. To break the horizontal symmetry, a material which is different from the buffer layer (silicon oxide) should be applied as top-cladding layer . In our design, air is employed as top cladding material. However, the phase matching can be easily destroyed by fabrication errors of the narrow waveguide. For instance, a 1 nm deviation of the width of the narrow waveguide requires a 15 nm adjustment of the width of the wide waveguide in order to maintain the phase matching . Moreover, the length of the DC should also be properly designed, otherwise the converted TM0 light will be coupled back to the narrow waveguide. In order to alleviate these limitations we introduce tapering of the wide waveguide. In this proposal, the cross-polarization coupling still relies on the phase matching between the two waveguides. However, the wide waveguide is tapered from w2a to w2b as shown in Fig. 1. Under a moderate width deviation of the narrow waveguide due to fabrication errors, the phase matching condition can still be fulfilled at a certain position thanks to the tapering of the wide waveguide. After the position along the taper where phase matching is satisfied, phase matching is not longer satisfied for the rest of the taper, thus the cross-polarization conversion efficiency is maintained and the fabrication error sensitivity of the coupling length is relaxed.
The device is designed on a SOI wafer with top silicon thickness of 250 nm. Figure 2 shows the effective indices of the TE0, TE1 and TM0 modes of a single silicon waveguide as a function of waveguide width w calculated by a full vectorial mode matching method (FVMM) . Considering widths of w2a and w2b for the wide waveguide, the corresponding widths of the narrow waveguide that result in the phase matching condition being satisfied are w1a and w1b, respectively. Consequently, a deviation of the narrow waveguide width between w1a and w1b will always allow for a position where phase matching is satisfied to be found along the length of the taper of the wide waveguide from w2a to w2b. If the taper length is designed to obtain an effective coupling length around the phase matching position, high cross-polarization conversion efficiency will be realized. After the phase matching position, the conversion efficiency will be maintained since phase matching is not satisfied for the rest of the taper. Numerical simulations performed using the three dimensional finite difference time domain (3-D FDTD) technique  confirm this behavior (Figs. 3(a) and 3(c)). Two points need to be considered further. First, w2b should be smaller than the width w' where the TM0 and TE1 modes are coupled , as shown in Figs. 3(b) and 3(d). Second, w2a should not be too close to w1b to avoid TE0 light coupling between the two waveguides.
In the 3-D FDTD simulations of Fig. 3, the grid size in the x direction is 20 nm, which is too large to precisely analyze the fabrication error sensitivity. Decreasing the grid size further will however dramatically increase the computation time. In order to accurately analyze the fabrication error sensitivity of the tapered DC, the eigenmode expansion (EME) method  is employed. We choose w1 = 329 nm, w2 = 550 nm and g = 100 nm as a starting point since these widths satisfy the phase matching condition . Considering that the phase matching is much more sensitive to the width of the narrow waveguide than to that of the wide waveguide of the DC , only the sensitivity to the width deviation of the narrow waveguide is investigated. Since the TM0 and TE1 modes are coupled when w' = 700nm for a single silicon waveguide, as shown in Fig. 2, we choose a tapering from w2a = 450 nm to w2b = 650 nm with center width of 550 nm for the wide waveguide, so that w2b<w' and w2a>w1b = 341 nm, as mentioned before. The width of the narrow waveguide is changed to w1 ± ∆w for fabrication sensitivity investigation, where ∆w is the width deviation due to fabrication error. Figure 4(a) shows the power conversion coefficient (from the TE0 mode at the narrow waveguide input to the TM0 mode at the cross port) as a function of the coupling length L for both tapered and normal (straight) DCs. Two coupling gaps of 100 nm and 150 nm are considered for the tapered DC. The operation wavelength is 1550 nm. One can find that, for a tapered DC, increases as L increases. This is because as L increases, the effective coupling length around the phase matching position increases, resulting in a higher conversion coefficient. Further increasing L leads to some small fluctuations at high conversion coefficient levels because of the little residual cross-polarization coupling after the phase matching position. One can also find that, for a larger coupling gap, a longer tapering length is needed to obtain a high conversion coefficient. Compared to the tapered DC, exhibits a periodic dependence on the coupling length for a normal DC. After reaches its maximum, further increasing L will lead to its decrease to less than −20 dB. Detailed investigations of as a function of the width deviation ∆w for different L and g are performed for both tapered and normal DCs, as shown in Fig. 4(b). One can find that, in case of a tapered DC with coupling gap of 100 nm, a high is still obtained within a width deviation range of about 15 nm for L varying from 100 μm to 160 μm. Since a high is maintained as L further increases, such width deviation tolerance is also expected for L longer than 160 μm. A similar width deviation tolerance is also obtained when g = 150 nm for L larger than 200 μm. Consequently, when L>200 μm, large fabrication tolerances for both width w1 and coupling gap g are expected. However, in case of a normal DC, only a few nanometers of width deviation will lead to a dramatic decrease of . Moreover, and the width deviation tolerance are much more sensitive to L.
3. Fabrication and experimental results
In order to demonstrate our concept, a tapered DC was fabricated on a SOI wafer with top silicon thickness of 250 nm and buried silicon dioxide of 3 μm. First, diluted (1:1 in anisole) electron-beam resist ZEP520A was spin-coated on the wafer to form a ~110 nm-thick mask layer. The device was then defined using electron-beam lithography (JEOL JBX-9300FS). The sample was etched afterward by inductively coupled plasma reactive ion etching (ICP-RIE) to transfer the patterns to the top silicon layer. Figure 5 shows pictures of the fabricated device. The wide waveguide is tapered from 406 nm to 606 nm. The coupling gap is 100 nm. Samples with different narrow waveguide widths w1 in the range 310-329 nm are fabricated in order to investigate the fabrication error tolerance. Details on the measurement setup and calibration procedure can be found in .
Figure 6(a) shows the measured power conversion coefficient for different dimensions of the narrow waveguide. Similar transmissions are obtained around 1550 nm for different narrow waveguide widths w1. The fabrication tolerance can be more easily assessed in Fig. 6(b), where the conversion coefficient is plotted as a function of the narrow waveguide width. It can be seen that a deviation tolerance of 14 nm (from 310 nm to 324 nm) is obtained for w1 to maintain a high over −1 dB. Note that since was not investigated for w1 smaller than 310 nm, the actual width deviation tolerance of the narrow waveguide should be larger than 14 nm. Such relaxed tolerance could allow the device to be fabricated by deep ultraviolet lithography (DUV) based fabrication technologies , thus supporting mass production. A further increase of w1 over 324 nm results in a decrease of . The coupling length sensitivity is also investigated for w1 = 324 nm, as shown in Fig. 6(c). Similar conversion coefficients are obtained for tapering lengths varying from 100 μm to 140 μm, indicating a good tolerance of the fabricated device to the taper length.
We have proposed and demonstrated a novel PSR based on a tapered DC, which simply consists of a narrow silicon wire parallel-coupled to a wider tapered waveguide. The device can be easily fabricated in a single step of exposure and etching. Numerical and experimental results show that the tolerance of the narrow waveguide width is relaxed to more than 14 nm for the proposed PSR compared to only few nanometers for previously reported PSRs based on normal DC. The PSR is also demonstrated to be less sensitive to the length of the DC.
L. Liu acknowledges the support from National Nature Science Foundation of China (#61107020) and “863” project (#2012AA011001).
References and links
1. T. Tsuchizawa, K. Yamada, H. Fukuda, T. Watanabe, T. Jun-Ichi, M. Takahashi, T. Shoji, E. Tamechika, S. Itabashi, and H. Morita, “Microphotonics devices based on silicon microfabrication technology,” IEEE J. Sel. Top. Quantum Electron. 11(1), 232–240 (2005). [CrossRef]
2. E. Dulkeith, F. Xia, L. Schares, W. M. J. Green, and Y. A. Vlasov, “Group index and group velocity dispersion in silicon-on-insulator photonic wires,” Opt. Express 14(9), 3853–3863 (2006). [CrossRef] [PubMed]
3. S. T. Lim, C. E. Png, E. A. Ong, and Y. L. Ang, “Single mode, polarization-independent submicron silicon waveguides based on geometrical adjustments,” Opt. Express 15(18), 11061–11072 (2007). [CrossRef] [PubMed]
4. L. Vivien, S. Laval, B. Dumont, S. Lardenois, A. Koster, and E. Cassan, “Polarization-independent single-mode rib waveguides on silicon-on-insulator for telecommunication wavelengths,” Opt. Commun. 210(1-2), 43–49 (2002). [CrossRef]
5. W. Bogaerts, D. Taillaert, P. Dumon, D. Van Thourhout, R. Baets, and E. Pluk, “A polarization-diversity wavelength duplexer circuit in silicon-on-insulator photonic wires,” Opt. Express 15(4), 1567–1578 (2007). [CrossRef] [PubMed]
6. T. Barwicz, M. R. Watts, M. A. Popovic, P. T. Rakich, L. Socci, F. X. Kartner, E. P. Ippen, and H. I. Smith, “Polarization-transparent microphotonic devices in the strong confinement limit,” Nat. Photonics 1(1), 57–60 (2007). [CrossRef]
7. H. Fukuda, K. Yamada, T. Tsuchizawa, T. Watanabe, H. Shinojima, and S. I. Itabashi, “Silicon photonic circuit with polarization diversity,” Opt. Express 16(7), 4872–4880 (2008). [CrossRef] [PubMed]
8. Y. Ding, L. Liu, C. Peucheret, J. Xu, H. Ou, K. Yvind, X. Zhang, and D. Huang, “Towards polarization diversity on the SOI platform with simple fabrication process,” IEEE Photon. Technol. Lett. 23(23), 1808–1810 (2011). [CrossRef]
10. H. Fukuda, K. Yamada, T. Tsuchizawa, T. Watanabe, H. Shinojima, and S. Itabashi, “Ultrasmall polarization splitter based on silicon wire waveguides,” Opt. Express 14(25), 12401–12408 (2006). [CrossRef] [PubMed]
12. L. Liu, Y. Ding, K. Yvind, and J. M. Hvam, “Efficient and compact TE-TM polarization converter built on silicon-on-insulator platform with a simple fabrication process,” Opt. Lett. 36(7), 1059–1061 (2011). [CrossRef] [PubMed]
13. L. Liu, Y. Ding, K. Yvind, and J. M. Hvam, “Silicon-on-insulator polarization splitting and rotating device for polarization diversity circuits,” Opt. Express 19(13), 12646–12651 (2011). [CrossRef] [PubMed]
14. Z. Wang and D. Dai, “Ultrasmall Si-nanowire-based polarization rotator,” J. Opt. Soc. Am. B 25(5), 747–753 (2008). [CrossRef]
15. J. Zhang, M. Yu, G. Lo, and D. L. Kwong, “Silicon waveguide based mode-evolution polarization rotator,” IEEE J. Sel. Top. Quantum Electron. 16(1), 53–60 (2010). [CrossRef]
17. A. S. Sudbo, “Film mode matching: a versatile numerical method for vector mode field calculations in dielectric waveguides,” Pure Appl. Opt. 2(3), 211–233 (1993). [CrossRef]
18. A. Taflove and S. C. Hagness, Computational Electrodynamics: The Finite-Difference Time-Domain Method, 2nd ed. (Artech House, 2000).
19. FIMMWAVE/FIMMPROP, Photon Design Ltd, http://www.photond.com.
20. S. Selvaraja, W. Bogaerts, P. Dumon, D. Van Thourhout, and R. Baets, “Sub-nanometer linewidth uniformity in silicon nano-photonic waveguide devices using CMOS fabrication technology,” IEEE J. Sel. Top. Quantum Electron. 16(1), 316–324 (2010). [CrossRef]