Abstract

We propose and demonstrate an optical signal processor performing matrix-vector multiplication, which is composed of laser-modulator array, multiplexer, splitter, microring modulator matrix and photodetector array. 8 × 107 multiplications and accumulations (MACs) per second is implemented at the clock at a clock frequency of 10 MHz. All functional units can be ultimately monolithically integrated on a chip with the development of silicon photonics and an efficient high-performance computing system is expected in the future.

© 2012 OSA

1. Introduction

High-performance computing is facing power wall and bandwidth limitation as transistors continue to shrink in size [1, 2]. Optical technology is considered to be helpful to address these problems due to its intrinsic high bandwidth, low latency and low power consumption [3, 4]. As a means of keeping on track with Moore’s law, optical interconnect has been widely studied to provide more efficient data transmission in both inter- and intra-microchips due to its potential to significantly mitigate the energy and density problems of electric wiring [5, 6]. Actually, optical technology also has the opportunity to perform information processing since it could overcome the speed intrinsic to electronics [7, 8]. However, for on-chip optical information processing, very few fundamental building blocks equivalent to those used in electronic circuits exist [913]. Here, we propose an on-chip optical signal processor performing matrix-vector multiplication, which is composed of laser-modulator array, multiplexer, splitter, microring modulator matrix and photodetector array. We fabricate a 4 × 4 microring modulator matrix on silicon-on-insulator (SOI) platform with complementary metal-oxide-semiconductor (CMOS)-compatible process. 8 × 107 multiplications and accumulations (MACs) per second is implemented by such an on-chip microring modulator matrix and off-chip laser-modulator array, multiplexer and photodetector. The significant progress in integrated optoelectronics makes it possible to integrate all required functional optical devices and even the driving and controlling circuits on the same chip [1416]. Theoretical analysis indicates that the calculation speed of the system will be 6.08 × 1014 MAC/s.

2. Design and fabrication

Matrix-vector multiplication is a fundamental operation in modern digital signal processing fields such as digital image processing [17], radar signal processing [18] and coherent optical communication [19]. Inspired by the intrinsic spatial parallelism of optics, many efforts have been made to develop optical apparatuses that can perform such a parallelizable operation [2023]. The Stanford multiplier [20] is one of the most notable demonstrations, which are generally composed of light source array, optical lens, spatial light modulator (SLM) matrix and photodetector array. Almost all of these implementations are large in volume and high in power consumption. Moreover, many removable elements adopted make them extremely sensitive to the environmental vibration, which hinders their actual application. To overcome these limitations, the fan-out and fan-in with optical lenses in the traditional optical matrix-vector multipliers (MVMs) are replaced by the power splitting and wavelength multiplexing with waveguide devices in the proposed optical MVM, which greatly reduces the complexity and size of the system. The discrete components in the traditional optical MVMs are replaced by the integrated ones in the optical MVM, which improves the stability and power efficiency of the system.

The proposed architecture which can execute the multiplication of an M × N matrix A and an N × 1 vector B is shown in Fig. 1 . The elements of the vector B are represented by the output optical power of the N optical signals with N different wavelengths (λ1, λ2, …, λN), which can be generated by N externally or directly modulated laser diodes. The N optical signals are multiplexed to one common waveguide by a multiplexer and then projected parallel on M rows of modulators by a 1 × M optical splitter. The element aij of the matrix A is represented by the transmissivity of the microring modulator located at the ith row and the jth column of the microring modulator matrix. Note that each microring modulator located at the same row only manipulates the optical signal with a specific wavelength. All the M × N multiplication processes are carried out when the M × N optical pulses pass through the microring modulator matrix. Each of the M accumulation processes is carried out when the N optical signals with different wavelengths in a row of the microring modulator matrix are guided to the common output waveguide. The elements of the result vector C are represented by the M optical powers detected by the photodetector array.

 

Fig. 1 Schematic of the on-chip optical matrix-vector multiplier. The system can implement the matrix-vector multiplication of A·B = C, in which the matrix A is represented by the transmissivity of the M × N microring modulator matrix, the vector B is represented by the output optical power of the N × 1 laser-modulator array, and the result vector C is represented by the optical powers detected by the M × 1 photodetector array. MD, modulator. PD, photodetector.

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As a proof of concept, only a 4 × 4 microring modulator matrix (as shown in the dot box in Fig. 2 ) is fabricated on an SOI wafer with 220-nm-thick top silicon and 2-μm-thick buried oxide layer, which constitutes the demo system along with off-chip laser diodes, commercial Mach-Zehnder modulators, multiplexers and photodetectors. The microring modulator employs the rib waveguides with a height of 220 nm, a width of 400 nm and a slab thickness of 70 nm, which only supports quasi-TE fundamental mode [24]. Each microring modulator occupies two wavelength channels. One is for the ON state and the other is for the OFF state. The microring resonator with the radius of 10 μm has a free spectral range (FSR) of about 9.6 nm, which is wide enough for eight wavelength channels with sufficiently high isolation. The radii of the four microring resonators are designed to be 9.97, 10.00, 10.03 and 10.06 μm, respectively, in order that the four resonant wavelengths are uniformly distributed in the whole FSR. The gaps between the bus waveguides and the ring waveguides are 275 nm. Spot size converters are used on the input and output terminals of the waveguides to enhance the coupling efficiency between the waveguides and the lensed fibers. PIN diodes are formed around the ring waveguides to electrically control the injection of electrons and holes into the intrinsic regions [25]. TiN Ω-shaped heaters with a thickness of 150 nm are used to compensate the possible resonance shifts originating from the imperfect fabrication through thermo-optic effect.

 

Fig. 2 Microscope image of the 4 × 4 microring modulator matrix and amplified image of the PIN modulation region.

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The experimental setup is shown in Fig. 3(a) . Amplified spontaneous emission source and optical spectrum analyzer are used to characterize the transmission spectra of the cascaded microring modulators. Figure 3(b) shows the transmission spectra with and without forward voltages applied to the PIN diodes. The original resonance wavelengths of the microring resonators without voltages are 1550.450, 1552.850, 1555.182 and 1557.494 nm, respectively. Blue shift occurs when forward bias voltage is applied to the microring resonator. The carrier injection induces extra optical absorption loss while changing the refractive indices of the waveguides. But the On-OFF extinction ratios at the working wavelengths are still about 24 dB, which guarantees the computational accuracy. Note that no voltages are applied to the heaters since the original resonance wavelengths are uniformly distributed in the whole FSR of 9.6 nm.

 

Fig. 3 Experimental setup and transmission spectra for the optical MVM. (a) Experimental setup for the static and dynamic response characterization of the optical MVM. (b) Transmission spectra of the cascaded microring modulators with (red line) and without (black line) forward bias voltages. MD, MZI modulator. PC, polarization controller. OSA, optical spectral analyzer. DUT, device under test. EDFA, erbium doped fiber amplifier. PD, photodetector. OSC, oscilloscope. AFG, arbitrary function generator.

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Four continuous waves with the aforementioned wavelengths from four tunable lasers are fed into four commercial MZI modulators, respectively, to generate the corresponding elements of the optical vector B. Then the four optical signals are multiplexed and coupled into the bus waveguide of the cascaded microring modulators by a lensed fiber. Since the waveguides are polarization-dependent, each wavelength channel is controlled independently by a polarization controller before they are multiplexed to a fiber. Eight parallel electrical driving signals are generated by four synchronized two-channel arbitrary function generators (Tektronix AFG3102). Four signals are parallel applied to the MZI modulators to generate the optical vector (B = (b1, b2, b3, b4)’), and the other four signals representing the first row of matrix A (A1 = (a11, a12, a13, a14)) are parallel applied to the cascaded microring modulators. The optical signals ejected from the chip are amplified by an erbium-doped fiber amplifier and filtered by an optical band-pass filter. Finally, the optical power, representing the inner product of vector A1 and vector B, is detected by a photodetector. The waveforms are recorded by a multichannel oscilloscope. Note that the microring modulator works well at the speed of 500 Mb/s with direct driving signal. Limited by the experimental conditions, the demo system is characterized at 10MHz. Figure 4 shows the waveforms of the eight driving signals and the final result of a vector-vector multiplication. The tested waveforms show that the multiplication of vector A1 with vector B with the speed of 108 MAC/s is performed correctly at a clock frequency of 10 MHz.

 

Fig. 4 Waveforms of the driving voltages and optical output. Voltages applied to the MZI modulators to generate the optical vector, representing the elements of vector B = (b1, b2, b3, b4). Voltages applied to the microring modulator array, representing the elements in the first row of matrix A.

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3. Discussion

For the proposed optical MVM, the scale size of the matrix is determined by the fan-out number of the optical vector Nfan-out and the multiplexed wavelength channels Nmux. The Nfan-out is determined by the number of the output ports of the optical splitter and the power budget of the optical link. The Nmux is determined by the FSR of the microring resonator and the channel spacing of the WDM signals. Smaller microring resonator can be used to improve the FSR. It has been reported that the microring resonator with a radius of 1.5 μm has a FSR of 62.5 nm [25]. Additionally, reducing channel spacing for a given FSR can also increase the Nmux, but tradeoff exists between channel spacing and adjacent channel crosstalk. Suppose that the microring modulator with a radius of 1.5 μm has the same modulation speed with the reported 25 Gb/s microring modulator [26] and the reasonable channel spacing is 100 GHz, the Nmux will be about 78 and the computation speed of the optical MVM will be 78 × 78 × 2.5 × 1010 = 1.52 × 1014 MAC/s. Actually, the Nmux can be doubled by adopting optical interleavers and de-interleavers in the following way. The multiplexed wavelength channels are divided into the odd- and even-wavelength channels by the optical interleaver first and then coupled into two groups of cascaded microring modulators, respectively. Finally, the odd- and even-wavelength channels are combined by an optical de-interleaver. With the same assumption as aforementioned, the calculation speed of the optical MVM will be 6.08 × 1014 MAC/s. Moreover, multi-level modulation technology can be adopted to further improve the performance of the optical MVM. The multiplexer, splitter, modulator array and microring modulator matrix can be monolithically integrated since they can share the same platform-silicon photonic wire waveguide. The photodetector array can also be integrated with them through the epitaxial growth of germanium [16]. And the on-chip laser diode is achievable by epitaxial growth [27] or by wafer bonding [28]. With the driving and controlling circuits integrated on the same platform, an on-chip signal processing system with overwhelming performance can be expected.

4. Conclusion

We propose and demonstrate an optical signal processor performing matrix-vector multiplication, which is composed of laser-modulator array, multiplexer, splitter, microring modulator matrix and photodetector array. 8 × 107 multiplications and accumulations (MACs) per second is implemented at the clock at a clock frequency of 10 MHz. All functional units can be ultimately monolithically integrated on a chip with the development of silicon photonics and an efficient high-performance computing system is expected in the future.

Acknowledgments

This work has been supported by the National Natural Science Foundation of China (NSFC) under grant 60977037 and the National High Technology Research and Development Program of China under grant 2012AA012202.

References and links

1. B. Razavi, “Prospects of CMOS technology for high-speed optical communication circuits,” IEEE J. Solid-state Circuits 2(9), 1135–1145 (2002). [CrossRef]  

2. D. A. B. Miller, “Device requirements for optical interconnects to silicon chips,” Proc. IEEE 97(7), 1166–1185 (2009). [CrossRef]  

3. M. Haurylau, G. Chen, H. Chen, J. Zhang, N. A. Nelson, D. H. Albonesi, E. G. Friedman, and P. M. Fauchet, “On-chip optical interconnect roadmap: challenges and critical directions,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1699–1705 (2006). [CrossRef]  

4. H. J. Caulfield and S. Dolev, “Why future supercomputing requires optics,” Nat. Photonics 4(5), 261–263 (2010). [CrossRef]  

5. T. Barwicz, H. Byun, F. Gan, C. W. Holzwarth, M. A. Popovic, P. T. Rakich, M. R. Watts, E. P. Ippen, F. X. Kartner, H. I. Smith, J. S. Orcutt, R. J. Ram, V. Stojanovic, O. O. Olubuyide, J. L. Hoyt, S. Spector, M. Geis, M. Grein, T. Lyszczarz, and J. U. Yoon, “Silicon photonics for compact, energy-efficient interconnects [Invited],” J. Opt. Netw. 6(1), 63–73 (2007). [CrossRef]  

6. J. Ahn, M. Fiorentino, R. Beausoleil, N. Binkert, A. Davis, D. Fattal, N. Jouppi, M. McLaren, C. Santori, R. Schreiber, S. Spillane, D. Vantrease, and Q. Xu, “Devices and architectures for photonic chip-scale integration,” Appl. Phys., A Mater. Sci. Process. 95(4), 989–997 (2009). [CrossRef]  

7. D. A. B. Miller, “Are optical transistors the logical next step,” Nat. Photonics 4(1), 3–5 (2010). [CrossRef]  

8. Q. Xu and R. Soref, “Reconfigurable optical directed-logic circuits using microresonator-based optical switches,” Opt. Express 19(6), 5244–5259 (2011). [CrossRef]   [PubMed]  

9. R. S. Tucker and J. L. Riding, “Optical ring-resonator random-access memories,” J. Lightwave Technol. 26(3), 320–328 (2008). [CrossRef]  

10. L. Zhang, M. Geng, L. Yang, L. Jia, H. Tian, P. Chen, T. Wang, and Y. Liu, “A silicon-based integrated optical vector-matrix multiplier,” CN patent #2011/10116741.0.

11. M. Ferrera, Y. Park, L. Razzari, B. E. Little, S. T. Chu, R. Morandotti, D. J. Moss, and J. Azaña, “On-chip CMOS-compatible all-optical integrator,” Nat. Commun 1(3), 29 (2010). [CrossRef]   [PubMed]  

12. L. Zhang, R. Ji, Y. Tian, L. Yang, P. Zhou, Y. Lu, W. Zhu, Y. Liu, L. Jia, Q. Fang, and M. Yu, “Simultaneous implementation of XOR and XNOR operations using a directed logic circuit based on two microring resonators,” Opt. Express 19(7), 6524–6540 (2011). [CrossRef]   [PubMed]  

13. M. R. Watts, “Integrated optic vector-matrix multiplier,” US patent #2011/8027587B1.

14. D. Liang and J. E. Bowers, “Recent progress in lasers on silicon,” Nat. Photonics 4(8), 511–517 (2010). [CrossRef]  

15. G. T. Reed, G. Mashanovich, F. T. Gardes, and D. J. Thomson, “silicon optical modulator,” Nat. Photonics 4(8), 518–526 (2010). [CrossRef]  

16. J. Michel, J. Liu, and L. C. Kimerling, “High-performance Ge-on-Si photodetector,” Nat. Photonics 4(8), 527–534 (2010). [CrossRef]  

17. R. C. Gonzalez and R. E. Wood, Digital Image Processing (Prentice Hall, 2007).

18. M. A. Richards, Fundamentals of Radar Signal Processing (McGraw-Hill, 2005).

19. S. Betti, G. D. Marchis, and E. Iannone, Coherent Optical Communications Systems (Wiley, 1995).

20. J. W. Goodman, A. R. Dias, and L. M. Woody, “Fully parallel, high-speed incoherent optical method for performing discrete Fourier transforms,” Opt. Lett. 2(1), 1–3 (1978). [CrossRef]   [PubMed]  

21. http://www.thirdwave.de/3w/tech/optical/EnLight256.pdf.

22. D. E. Tamir, N. T. Shaked, P. J. Wilson, and S. Dolev, “High-speed and low-power electro-optical DSP coprocessor,” J. Opt. Soc. Am. A 26(8), A11–A20 (2009). [CrossRef]   [PubMed]  

23. R. Q. Ji, L. Yang, L. Zhang, Y. H. Tian, J. F. Ding, H. T. Chen, Y. Y. Lu, P. Zhou, and W. W. Zhu, “Five-port optical router for photonic networks-on-chip,” Opt. Express 19(21), 20258–20268 (2011). [CrossRef]   [PubMed]  

24. Q. Xu, B. Schmidt, S. Pradhan, and M. Lipson, “Micrometre-scale silicon electro-optic modulator,” Nature 435(7040), 325–327 (2005). [CrossRef]   [PubMed]  

25. Q. Xu, D. Fattal, and R. G. Beausoleil, “Silicon microring resonators with 1.5-microm radius,” Opt. Express 16(6), 4309–4315 (2008). [CrossRef]   [PubMed]  

26. X. Xiao, H. Xu, X. Li, Y. Hu, K. Xiong, Z. Li, T. Chu, Y. Yu, and J. Yu, “25 Gbit/s silicon microring modulator based on misalignment-tolerant interleaved PN junctions,” Opt. Express 20(3), 2507–2515 (2012). [CrossRef]   [PubMed]  

27. J. Liu, X. Sun, R. Camacho-Aguilera, L. C. Kimerling, and J. Michel, “Ge-on-Si laser operating at room temperature,” Opt. Lett. 35(5), 679–681 (2010). [CrossRef]   [PubMed]  

28. H. Park, A. Fang, S. Kodama, and J. Bowers, “Hybrid silicon evanescent laser fabricated with a silicon waveguide and III-V offset quantum wells,” Opt. Express 13(23), 9460–9464 (2005). [CrossRef]   [PubMed]  

References

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  • |
  • |

  1. B. Razavi, “Prospects of CMOS technology for high-speed optical communication circuits,” IEEE J. Solid-state Circuits 2(9), 1135–1145 (2002).
    [CrossRef]
  2. D. A. B. Miller, “Device requirements for optical interconnects to silicon chips,” Proc. IEEE 97(7), 1166–1185 (2009).
    [CrossRef]
  3. M. Haurylau, G. Chen, H. Chen, J. Zhang, N. A. Nelson, D. H. Albonesi, E. G. Friedman, and P. M. Fauchet, “On-chip optical interconnect roadmap: challenges and critical directions,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1699–1705 (2006).
    [CrossRef]
  4. H. J. Caulfield and S. Dolev, “Why future supercomputing requires optics,” Nat. Photonics 4(5), 261–263 (2010).
    [CrossRef]
  5. T. Barwicz, H. Byun, F. Gan, C. W. Holzwarth, M. A. Popovic, P. T. Rakich, M. R. Watts, E. P. Ippen, F. X. Kartner, H. I. Smith, J. S. Orcutt, R. J. Ram, V. Stojanovic, O. O. Olubuyide, J. L. Hoyt, S. Spector, M. Geis, M. Grein, T. Lyszczarz, and J. U. Yoon, “Silicon photonics for compact, energy-efficient interconnects [Invited],” J. Opt. Netw. 6(1), 63–73 (2007).
    [CrossRef]
  6. J. Ahn, M. Fiorentino, R. Beausoleil, N. Binkert, A. Davis, D. Fattal, N. Jouppi, M. McLaren, C. Santori, R. Schreiber, S. Spillane, D. Vantrease, and Q. Xu, “Devices and architectures for photonic chip-scale integration,” Appl. Phys., A Mater. Sci. Process. 95(4), 989–997 (2009).
    [CrossRef]
  7. D. A. B. Miller, “Are optical transistors the logical next step,” Nat. Photonics 4(1), 3–5 (2010).
    [CrossRef]
  8. Q. Xu and R. Soref, “Reconfigurable optical directed-logic circuits using microresonator-based optical switches,” Opt. Express 19(6), 5244–5259 (2011).
    [CrossRef] [PubMed]
  9. R. S. Tucker and J. L. Riding, “Optical ring-resonator random-access memories,” J. Lightwave Technol. 26(3), 320–328 (2008).
    [CrossRef]
  10. L. Zhang, M. Geng, L. Yang, L. Jia, H. Tian, P. Chen, T. Wang, and Y. Liu, “A silicon-based integrated optical vector-matrix multiplier,” CN patent #2011/10116741.0.
  11. M. Ferrera, Y. Park, L. Razzari, B. E. Little, S. T. Chu, R. Morandotti, D. J. Moss, and J. Azaña, “On-chip CMOS-compatible all-optical integrator,” Nat. Commun 1(3), 29 (2010).
    [CrossRef] [PubMed]
  12. L. Zhang, R. Ji, Y. Tian, L. Yang, P. Zhou, Y. Lu, W. Zhu, Y. Liu, L. Jia, Q. Fang, and M. Yu, “Simultaneous implementation of XOR and XNOR operations using a directed logic circuit based on two microring resonators,” Opt. Express 19(7), 6524–6540 (2011).
    [CrossRef] [PubMed]
  13. M. R. Watts, “Integrated optic vector-matrix multiplier,” US patent #2011/8027587B1.
  14. D. Liang and J. E. Bowers, “Recent progress in lasers on silicon,” Nat. Photonics 4(8), 511–517 (2010).
    [CrossRef]
  15. G. T. Reed, G. Mashanovich, F. T. Gardes, and D. J. Thomson, “silicon optical modulator,” Nat. Photonics 4(8), 518–526 (2010).
    [CrossRef]
  16. J. Michel, J. Liu, and L. C. Kimerling, “High-performance Ge-on-Si photodetector,” Nat. Photonics 4(8), 527–534 (2010).
    [CrossRef]
  17. R. C. Gonzalez and R. E. Wood, Digital Image Processing (Prentice Hall, 2007).
  18. M. A. Richards, Fundamentals of Radar Signal Processing (McGraw-Hill, 2005).
  19. S. Betti, G. D. Marchis, and E. Iannone, Coherent Optical Communications Systems (Wiley, 1995).
  20. J. W. Goodman, A. R. Dias, and L. M. Woody, “Fully parallel, high-speed incoherent optical method for performing discrete Fourier transforms,” Opt. Lett. 2(1), 1–3 (1978).
    [CrossRef] [PubMed]
  21. http://www.thirdwave.de/3w/tech/optical/EnLight256.pdf .
  22. D. E. Tamir, N. T. Shaked, P. J. Wilson, and S. Dolev, “High-speed and low-power electro-optical DSP coprocessor,” J. Opt. Soc. Am. A 26(8), A11–A20 (2009).
    [CrossRef] [PubMed]
  23. R. Q. Ji, L. Yang, L. Zhang, Y. H. Tian, J. F. Ding, H. T. Chen, Y. Y. Lu, P. Zhou, and W. W. Zhu, “Five-port optical router for photonic networks-on-chip,” Opt. Express 19(21), 20258–20268 (2011).
    [CrossRef] [PubMed]
  24. Q. Xu, B. Schmidt, S. Pradhan, and M. Lipson, “Micrometre-scale silicon electro-optic modulator,” Nature 435(7040), 325–327 (2005).
    [CrossRef] [PubMed]
  25. Q. Xu, D. Fattal, and R. G. Beausoleil, “Silicon microring resonators with 1.5-microm radius,” Opt. Express 16(6), 4309–4315 (2008).
    [CrossRef] [PubMed]
  26. X. Xiao, H. Xu, X. Li, Y. Hu, K. Xiong, Z. Li, T. Chu, Y. Yu, and J. Yu, “25 Gbit/s silicon microring modulator based on misalignment-tolerant interleaved PN junctions,” Opt. Express 20(3), 2507–2515 (2012).
    [CrossRef] [PubMed]
  27. J. Liu, X. Sun, R. Camacho-Aguilera, L. C. Kimerling, and J. Michel, “Ge-on-Si laser operating at room temperature,” Opt. Lett. 35(5), 679–681 (2010).
    [CrossRef] [PubMed]
  28. H. Park, A. Fang, S. Kodama, and J. Bowers, “Hybrid silicon evanescent laser fabricated with a silicon waveguide and III-V offset quantum wells,” Opt. Express 13(23), 9460–9464 (2005).
    [CrossRef] [PubMed]

2012 (1)

2011 (3)

2010 (7)

H. J. Caulfield and S. Dolev, “Why future supercomputing requires optics,” Nat. Photonics 4(5), 261–263 (2010).
[CrossRef]

D. A. B. Miller, “Are optical transistors the logical next step,” Nat. Photonics 4(1), 3–5 (2010).
[CrossRef]

M. Ferrera, Y. Park, L. Razzari, B. E. Little, S. T. Chu, R. Morandotti, D. J. Moss, and J. Azaña, “On-chip CMOS-compatible all-optical integrator,” Nat. Commun 1(3), 29 (2010).
[CrossRef] [PubMed]

D. Liang and J. E. Bowers, “Recent progress in lasers on silicon,” Nat. Photonics 4(8), 511–517 (2010).
[CrossRef]

G. T. Reed, G. Mashanovich, F. T. Gardes, and D. J. Thomson, “silicon optical modulator,” Nat. Photonics 4(8), 518–526 (2010).
[CrossRef]

J. Michel, J. Liu, and L. C. Kimerling, “High-performance Ge-on-Si photodetector,” Nat. Photonics 4(8), 527–534 (2010).
[CrossRef]

J. Liu, X. Sun, R. Camacho-Aguilera, L. C. Kimerling, and J. Michel, “Ge-on-Si laser operating at room temperature,” Opt. Lett. 35(5), 679–681 (2010).
[CrossRef] [PubMed]

2009 (3)

J. Ahn, M. Fiorentino, R. Beausoleil, N. Binkert, A. Davis, D. Fattal, N. Jouppi, M. McLaren, C. Santori, R. Schreiber, S. Spillane, D. Vantrease, and Q. Xu, “Devices and architectures for photonic chip-scale integration,” Appl. Phys., A Mater. Sci. Process. 95(4), 989–997 (2009).
[CrossRef]

D. A. B. Miller, “Device requirements for optical interconnects to silicon chips,” Proc. IEEE 97(7), 1166–1185 (2009).
[CrossRef]

D. E. Tamir, N. T. Shaked, P. J. Wilson, and S. Dolev, “High-speed and low-power electro-optical DSP coprocessor,” J. Opt. Soc. Am. A 26(8), A11–A20 (2009).
[CrossRef] [PubMed]

2008 (2)

2007 (1)

2006 (1)

M. Haurylau, G. Chen, H. Chen, J. Zhang, N. A. Nelson, D. H. Albonesi, E. G. Friedman, and P. M. Fauchet, “On-chip optical interconnect roadmap: challenges and critical directions,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1699–1705 (2006).
[CrossRef]

2005 (2)

2002 (1)

B. Razavi, “Prospects of CMOS technology for high-speed optical communication circuits,” IEEE J. Solid-state Circuits 2(9), 1135–1145 (2002).
[CrossRef]

1978 (1)

Ahn, J.

J. Ahn, M. Fiorentino, R. Beausoleil, N. Binkert, A. Davis, D. Fattal, N. Jouppi, M. McLaren, C. Santori, R. Schreiber, S. Spillane, D. Vantrease, and Q. Xu, “Devices and architectures for photonic chip-scale integration,” Appl. Phys., A Mater. Sci. Process. 95(4), 989–997 (2009).
[CrossRef]

Albonesi, D. H.

M. Haurylau, G. Chen, H. Chen, J. Zhang, N. A. Nelson, D. H. Albonesi, E. G. Friedman, and P. M. Fauchet, “On-chip optical interconnect roadmap: challenges and critical directions,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1699–1705 (2006).
[CrossRef]

Azaña, J.

M. Ferrera, Y. Park, L. Razzari, B. E. Little, S. T. Chu, R. Morandotti, D. J. Moss, and J. Azaña, “On-chip CMOS-compatible all-optical integrator,” Nat. Commun 1(3), 29 (2010).
[CrossRef] [PubMed]

Barwicz, T.

Beausoleil, R.

J. Ahn, M. Fiorentino, R. Beausoleil, N. Binkert, A. Davis, D. Fattal, N. Jouppi, M. McLaren, C. Santori, R. Schreiber, S. Spillane, D. Vantrease, and Q. Xu, “Devices and architectures for photonic chip-scale integration,” Appl. Phys., A Mater. Sci. Process. 95(4), 989–997 (2009).
[CrossRef]

Beausoleil, R. G.

Binkert, N.

J. Ahn, M. Fiorentino, R. Beausoleil, N. Binkert, A. Davis, D. Fattal, N. Jouppi, M. McLaren, C. Santori, R. Schreiber, S. Spillane, D. Vantrease, and Q. Xu, “Devices and architectures for photonic chip-scale integration,” Appl. Phys., A Mater. Sci. Process. 95(4), 989–997 (2009).
[CrossRef]

Bowers, J.

Bowers, J. E.

D. Liang and J. E. Bowers, “Recent progress in lasers on silicon,” Nat. Photonics 4(8), 511–517 (2010).
[CrossRef]

Byun, H.

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M. Haurylau, G. Chen, H. Chen, J. Zhang, N. A. Nelson, D. H. Albonesi, E. G. Friedman, and P. M. Fauchet, “On-chip optical interconnect roadmap: challenges and critical directions,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1699–1705 (2006).
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Chen, H.

M. Haurylau, G. Chen, H. Chen, J. Zhang, N. A. Nelson, D. H. Albonesi, E. G. Friedman, and P. M. Fauchet, “On-chip optical interconnect roadmap: challenges and critical directions,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1699–1705 (2006).
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M. Haurylau, G. Chen, H. Chen, J. Zhang, N. A. Nelson, D. H. Albonesi, E. G. Friedman, and P. M. Fauchet, “On-chip optical interconnect roadmap: challenges and critical directions,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1699–1705 (2006).
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M. Ferrera, Y. Park, L. Razzari, B. E. Little, S. T. Chu, R. Morandotti, D. J. Moss, and J. Azaña, “On-chip CMOS-compatible all-optical integrator,” Nat. Commun 1(3), 29 (2010).
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M. Haurylau, G. Chen, H. Chen, J. Zhang, N. A. Nelson, D. H. Albonesi, E. G. Friedman, and P. M. Fauchet, “On-chip optical interconnect roadmap: challenges and critical directions,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1699–1705 (2006).
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M. Haurylau, G. Chen, H. Chen, J. Zhang, N. A. Nelson, D. H. Albonesi, E. G. Friedman, and P. M. Fauchet, “On-chip optical interconnect roadmap: challenges and critical directions,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1699–1705 (2006).
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J. Ahn, M. Fiorentino, R. Beausoleil, N. Binkert, A. Davis, D. Fattal, N. Jouppi, M. McLaren, C. Santori, R. Schreiber, S. Spillane, D. Vantrease, and Q. Xu, “Devices and architectures for photonic chip-scale integration,” Appl. Phys., A Mater. Sci. Process. 95(4), 989–997 (2009).
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D. Liang and J. E. Bowers, “Recent progress in lasers on silicon,” Nat. Photonics 4(8), 511–517 (2010).
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Q. Xu, B. Schmidt, S. Pradhan, and M. Lipson, “Micrometre-scale silicon electro-optic modulator,” Nature 435(7040), 325–327 (2005).
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M. Ferrera, Y. Park, L. Razzari, B. E. Little, S. T. Chu, R. Morandotti, D. J. Moss, and J. Azaña, “On-chip CMOS-compatible all-optical integrator,” Nat. Commun 1(3), 29 (2010).
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J. Michel, J. Liu, and L. C. Kimerling, “High-performance Ge-on-Si photodetector,” Nat. Photonics 4(8), 527–534 (2010).
[CrossRef]

J. Liu, X. Sun, R. Camacho-Aguilera, L. C. Kimerling, and J. Michel, “Ge-on-Si laser operating at room temperature,” Opt. Lett. 35(5), 679–681 (2010).
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J. Ahn, M. Fiorentino, R. Beausoleil, N. Binkert, A. Davis, D. Fattal, N. Jouppi, M. McLaren, C. Santori, R. Schreiber, S. Spillane, D. Vantrease, and Q. Xu, “Devices and architectures for photonic chip-scale integration,” Appl. Phys., A Mater. Sci. Process. 95(4), 989–997 (2009).
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J. Liu, X. Sun, R. Camacho-Aguilera, L. C. Kimerling, and J. Michel, “Ge-on-Si laser operating at room temperature,” Opt. Lett. 35(5), 679–681 (2010).
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D. A. B. Miller, “Are optical transistors the logical next step,” Nat. Photonics 4(1), 3–5 (2010).
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M. Ferrera, Y. Park, L. Razzari, B. E. Little, S. T. Chu, R. Morandotti, D. J. Moss, and J. Azaña, “On-chip CMOS-compatible all-optical integrator,” Nat. Commun 1(3), 29 (2010).
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M. Ferrera, Y. Park, L. Razzari, B. E. Little, S. T. Chu, R. Morandotti, D. J. Moss, and J. Azaña, “On-chip CMOS-compatible all-optical integrator,” Nat. Commun 1(3), 29 (2010).
[CrossRef] [PubMed]

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M. Ferrera, Y. Park, L. Razzari, B. E. Little, S. T. Chu, R. Morandotti, D. J. Moss, and J. Azaña, “On-chip CMOS-compatible all-optical integrator,” Nat. Commun 1(3), 29 (2010).
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G. T. Reed, G. Mashanovich, F. T. Gardes, and D. J. Thomson, “silicon optical modulator,” Nat. Photonics 4(8), 518–526 (2010).
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J. Ahn, M. Fiorentino, R. Beausoleil, N. Binkert, A. Davis, D. Fattal, N. Jouppi, M. McLaren, C. Santori, R. Schreiber, S. Spillane, D. Vantrease, and Q. Xu, “Devices and architectures for photonic chip-scale integration,” Appl. Phys., A Mater. Sci. Process. 95(4), 989–997 (2009).
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Q. Xu, B. Schmidt, S. Pradhan, and M. Lipson, “Micrometre-scale silicon electro-optic modulator,” Nature 435(7040), 325–327 (2005).
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J. Ahn, M. Fiorentino, R. Beausoleil, N. Binkert, A. Davis, D. Fattal, N. Jouppi, M. McLaren, C. Santori, R. Schreiber, S. Spillane, D. Vantrease, and Q. Xu, “Devices and architectures for photonic chip-scale integration,” Appl. Phys., A Mater. Sci. Process. 95(4), 989–997 (2009).
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J. Ahn, M. Fiorentino, R. Beausoleil, N. Binkert, A. Davis, D. Fattal, N. Jouppi, M. McLaren, C. Santori, R. Schreiber, S. Spillane, D. Vantrease, and Q. Xu, “Devices and architectures for photonic chip-scale integration,” Appl. Phys., A Mater. Sci. Process. 95(4), 989–997 (2009).
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M. Haurylau, G. Chen, H. Chen, J. Zhang, N. A. Nelson, D. H. Albonesi, E. G. Friedman, and P. M. Fauchet, “On-chip optical interconnect roadmap: challenges and critical directions,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1699–1705 (2006).
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J. Michel, J. Liu, and L. C. Kimerling, “High-performance Ge-on-Si photodetector,” Nat. Photonics 4(8), 527–534 (2010).
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Q. Xu, B. Schmidt, S. Pradhan, and M. Lipson, “Micrometre-scale silicon electro-optic modulator,” Nature 435(7040), 325–327 (2005).
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http://www.thirdwave.de/3w/tech/optical/EnLight256.pdf .

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Figures (4)

Fig. 1
Fig. 1

Schematic of the on-chip optical matrix-vector multiplier. The system can implement the matrix-vector multiplication of A·B = C, in which the matrix A is represented by the transmissivity of the M × N microring modulator matrix, the vector B is represented by the output optical power of the N × 1 laser-modulator array, and the result vector C is represented by the optical powers detected by the M × 1 photodetector array. MD, modulator. PD, photodetector.

Fig. 2
Fig. 2

Microscope image of the 4 × 4 microring modulator matrix and amplified image of the PIN modulation region.

Fig. 3
Fig. 3

Experimental setup and transmission spectra for the optical MVM. (a) Experimental setup for the static and dynamic response characterization of the optical MVM. (b) Transmission spectra of the cascaded microring modulators with (red line) and without (black line) forward bias voltages. MD, MZI modulator. PC, polarization controller. OSA, optical spectral analyzer. DUT, device under test. EDFA, erbium doped fiber amplifier. PD, photodetector. OSC, oscilloscope. AFG, arbitrary function generator.

Fig. 4
Fig. 4

Waveforms of the driving voltages and optical output. Voltages applied to the MZI modulators to generate the optical vector, representing the elements of vector B = (b1, b2, b3, b4). Voltages applied to the microring modulator array, representing the elements in the first row of matrix A.

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