Measurement and control is an important step for production-worthy through silicon vias etch. We demonstrate the use and enhancement of an existing wafer metrology tool, spectral reflectometer by implementing novel theoretical model and measurement algorithm for high density through-silicon via (HDTSV) inspection. It is capable of measuring depth and depth variations of array vias by Discrete Fourier Transform (DFT) analysis in one shot measurement. Surface roughness of via bottom can also be extracted by scattering model fitting. Our non-destructive solution can measure TSV profile diameters as small as 5 μm and aspect ratios greater than 13:1. The measurement precision is in the range of 0.02 μm. Metrology results from actual 3D interconnect processing wafers are presented.
© 2011 OSA
High density through silicon via (HDTSV) is a major enabler of 3-D integrated circuit (3DIC) technology . High Si etch rate step combined with efficient passivation or deposition step, has achieved nearly anisotropic profiles, with high etch rates of 5μm/min. or more [2–4]. Good etch depth uniformity and profile requirements for 3-D Integration are necessary in high volume manufacturing process. Variation in via protrusion due to TSV etch depth non-uniformity can have a significant impact on via node resistance . As the etch rate increases, the capability to control the wafer temperature becomes crucial to obtain a uniform etch across the wafer whatever the wafer diameter . The current standard technique to measure and control high aspect-ratio vias is to use cross-sectional scanning electron microscope (SEM) analysis. However, this method is time consuming in addition to being destructive and costly. The fact that one could make via depth measurements nondestructively and extremely fast opens up the possibility of mapping, the via depth variation within the illumination area and also across an entire wafer (center to edge).
The Wafer Thickness Sensor (WTS) from Tamar Technology is an interferometric sensor operating in the IR spectrum for the TSV etch depth measurements . The light source for the WTS is placed facing the back of the wafer, there is none of the sidewall interference that inhibits optical techniques, and thus the Infrared sensor’s accuracy and repeatability are independent of via aspect ratio. However, the spot size (15 μm or 5 μm) creates a limitation to transversal resolution. If two or more vias are closer together than a spot size, then the via depth for each is difficult to be measured independently. Nanometrics uses scanning white-light microscope based on small aperture and low NA (Numerical Aperture) illumination to scan the objective perpendicular to surface to generate signals for in line TSV depth measurement . However, the signal from the top surface and thin buried film mix together if there is a mono or stacked layers on top of TSV sample which are commonly existed. Thus a more advanced algorithm is required for accurate TSV depth measurement.
Reflectometry technology has gained wide acceptance in semiconductor manufacturing processes for monitoring the dielectric film thickness and lithographic linewidth of 2D and 3D structures [9–11]. Thin film interference theory is commonly used for modeling in reflectometry for extracting film thickness. The oscillations in the reflectance are caused by thin film interference between the light reflected from the two surfaces of the film. The periodicity of the oscillations is proportional to the product of the index of refraction (real part) and the film thickness. It is widely applicable and provides film thickness values that, in general, are not seriously affected by inhomogeneity. RCWA theory is commonly used for modeling in reflectometry for extracting linewidth profile. It is based on the analysis of light scattered from a periodic array of objects, such as line/space photoresist gratings or arrays of contact holes. The scalar model assumes that the profile of a patterned wafer is divided into separate uniform thin film regions. However, the calculation is quite time consuming and only the average data of illuminated pattern feature was obtained which is not always correct if the profile of patterned area is anisotropic.
In this paper, we propose a method combining a scattering theoretical model and a discrete Fourier Transform (DFT) algorithm for extraction of via bottom roughness and via depth from the measured reflectance spectrum. We developed spectral decomposition technique which provides a novel means of utilizing optical reflectance spectrum and the DFT algorithm for mapping TSV depth variations. By transforming the reflectance spectrum data into the frequency domain via the DFT, the frequency spectra indicate lateral HDTSVs discontinuities and depth variations. Etch depth uniformity within illumination area can now be verified in one shot measurement in a non-destructive manner, allowing instant feedback for etch process control. We report the first measurement results from various HDTSV arrays sample with small CDs(Critical Dimensions), which is defined as the diameters of the TSVs opening. We demonstrate the use and enhancement of an existing wafer metrology tool, spectral reflectometer by implementing novel theoretical model and measurement algorithm for through-silicon via (TSV) inspection. Our non-destructive solution can measure TSV profile diameters as small as 5 μm and aspect ratios greater than 13:1. The measurement precision is in the range of 0.02 μm. Metrology results from actual 3D interconnect processing wafers are presented.
2. TSV samples and Instrumentation
2.1 TSV Samples Detail
Two different groups of TSV samples from actual 3D interconnect processes were studied. These TSV targets included:
- 1. Circular TSV arrays with nominal CD 5 μm, pitch 10 μm and aspect ratio 13
- 2. Square TSV arrays with a hard mask on top of it. The nominal CD 5 μm, pitch 10 μm and aspect ratio 8
2.2 Reflectometer Configuration
The TSV structures were measured by an unmodified Nanometrics 9010B reflectometer tool, the reflectance spectrum is measured in the broadband wavelength range from 375 nm to 780 nm. It is a nearly normal incidence system equipped with two different objectives (4X, 15X) and an automated translation stage, primarily developed for thin film thickness and optical CD (OCD) measurements. The low-magnification (4X) and low NA (0.035) microscope objective was used in this study. The normal incidence measurement largely relies on the interference between light scattered from different locations on the target structure. To measure the via depth, the light reflected from the top and bottom of the via target structure must interfere with each other. The reflectance spectrum typically has regular oscillation over a large wavelength range. The limiting factor in this case is the pixel resolution of the charge-coupled device (CCD) detector, which is about 0.6 nm at the upper wavelength limit of 780 nm.
3. Theoretical model
3.1 Modified theoretical model of the reflectance spectrum
Theoretical model of the reflectance spectrum of via structure was described in previous publication , but modified in the following derivation. The via structure is modeled as a film with adjustable ratio of the illuminated surface areas. The illumination spot size around 30 um covers various numbers of periodic vias with 5 um CD in one shot measurement. The ratio of illuminated area of the top silicon surface to the vias opening within the spot is considered to be constant, and it depends only on the vias opening shape and pitch. Assume the ratio coefficient α and (1-α) are the portion of the illuminated silicon top surface and the via opening respectively. Eo is the electrical field incident onto the silicon surface and the via area. The via depth is d, and the wavelength isλ. The reflectance intensity I, which is the sum of the two reflected beams from the silicon surface and the via bottom surface is:Eq. (1) indicates that the electrical field reflectances must be combined using their proper phase angle difference.
According to the Fresnel equation, light in air that reflects off a silicon surface will undergo a 180° shift and its electrical field reflectance will be influenced by a reflecting factor, rsi+. The simulated reflectance intensity can be calculated by multiplying the reflecting factor rsi+:Fig. 1(a) . However, the low-magnification objective (4X) has a maximum measurable slope of 2.0° (≅ sin−1 0.035) as shown in Fig. 1 (b) thus light propagation is severely attenuated in the via region. The maximum measurable depth is estimated as 71.5 μm ( = TopCD/2/tan 2.0°), the corresponding aspect ratio (AR) is about 14.3( = 71.5 μm /5 μm). The effective illumination area radius R of via bottom with varying via depth can be calculated by Eq. (3) and it is listed in Table 1 . The ratio of the effective illumination area in via bottom area to the top via opening area is expressed as f.Eq. (2) by adding the coefficient f:Figure 1(c) shows the attenuation of the reflectance spectrum for via depth 50.0 um with measurable slope of 2.0° compared to the one with normal incidence. The effective illumination area radius in the via bottom is about 0.75 um as listed in Table 1, which is only about 30% compared to the top via radius.
In our previous publication , we treat the illumination beam as normal incident onto the vias array sample, so the vias bottom profile significant influence the portion of the reflected light can be detected. However we modified our theoretical reflectance model by adding the conus light effect produced by 4X objective, the effective illumination in the via bottom center area becomes much smaller than the via opening especially in the high aspect ratio case. Moreover, the curvature around the bottom center area is nearly zero, thus the bottom profile influence is no more considered in this study.
3.2 Theoretical model of the via bottom roughness
We initially modeled via bottom structure as quasi-ideal silicon substrate. However, a significant difference in the theoretical fit and the experimental data was observed, especially at the shorter wavelengths. H. E. Bennett et al  provided a theoretical expression and experimental verification that if the light of a sufficiently long wavelength compared to the surface roughness is reflected from the rough surface, the decrease in measured specular reflectance due to surface roughness is a function only of the root mean square height of the surface irregularities.Eq. (4) by combining the Eq. (5):Figure 2 shows the theoretical modeling of the reflectance spectrum with varying surface roughness from 0 to 100 nm for via depth of 50.0 μm and via CD of 5.0 μm. The spectra are strongly attenuated with increasing surface roughness especially at the shorter wavelengths. The spectrum oscillation is nearly diluted at the shorter wavelength range if the surface roughness exceeds 100 nm.
3.3 Theoretical model of the via depth variation
Vijayakumar C et al used broadband reflectometry to determine a vertical dimension of multiple film stacks. The modeled net reflectance spectrum was used to fit thickness of each layer on top of the substrate . Instead of a vertical dimension determining, we implemented Vijayakumar’s concept for the lateral via depth variations analysis.
3.3.1 High aspect ratio silicon vias array
Consider the case of silicon via array with two different depths within one illumination spot area as shown in Fig. 3(a) . We examine the case where the light waves reflecting off the top silicon surface interfere with the waves reflecting from the via bottom surface of 50.0 μm and 51.0 μm depth respectively. Figure 3(b) shows the theoretical modeling of the reflectance spectrum for via depths of 50.0 μm, 51.0 μm using Eq. (6) and their combination if we add them together respectively. The via bottom roughness is assumed to be zero in this simulation case. The spectra for the two via depths have slightly different frequency; the combination one shows interference between two oscillations, perceived as periodic variations in amplitude whose period reveals the difference between the two depths.
3.3.2 High aspect ratio silicon vias array with oxide hard mask
Figure 4 shows another case, in which 50 μm deep silicon via with 5 μm CD is covered by 0.6 μm thick hard oxide mask on top of it. We define d as the via depth from the topmost surface to the bottom of via and doxide is the optical thickness of oxide film which is equal to n(λ)*0.6 μm. The refractive index of oxide n(λ) is a constant 1.46 over our measured wavelength range (375-780 nm). The refractive index of silicon varies with the wavelength range (6.706 at 375 nm to 3.696 at 780 nm) . The light incident on the oxide film surface divides into reflected and refracted portions. The refracted beam reflects again at the oxide film-silicon interface. Part of the light may reflect internally again and continue to experience multiple reflections within the oxide film layer until it has lost its intensity. The electrical field reflecting from oxide film can be expressed according to multiple reflection of thin film interference:16]. The electrical field reflecting from via bottom can be expressed as:
4. Data evaluation algorithm
4.1 Discrete Fourier Transform algorithm for depths extraction
Because the frequency of the oscillation is proportional to the via depth, we developed DFT algorithm to transform the reflectance spectrum to the frequency spectrum. In order to apply DFT method to acquire depth information, reflectance spectrum which is evenly spread versus wavelength (λ) need to be converted to spectrum linearly sampled in wavenumber (k). Thus recalibration of spectral data by spline interpolation and zero-padding combined with tapered window prior to DFT is introduced. Usually there is more than one via of the HDTSV array irradiated by the illumination spot; we implement the DFT analysis approach to obtain via depths and identify the depth variations within one shot measurement. Figure 5 shows the DFT frequency spectrum which is calculated from the simulation data in Fig. 3. The DFT result shows that the frequency for the two via depths are well separated from each other. Figure 6 shows the DFT frequency spectrum which is calculated from the high frequency term of the simulation data in Fig. 4. The DFT result shows three frequencies which are corresponding to the optical path depth: d-2doxide ( = 48.2 μm), d-doxide ( = 49.1 μm) and d ( = 50.0 μm) respectively. The optical thickness of oxide film: doxide = n(λ)*dphysical thickness which is 0.9 μm ( = 1.46*0.6 μm). Because the oxide-silicon surface acts like a mirror, a stronger signal (d-doxide) can be acquired compared to the detection of the light reflected by the top of oxide film (d). An attenuated signal at corresponding optical path depth d-2doxide is coming from the light bounding twice in oxide film then transmitted out top surface interfere with the light reflected from via bottom. In addition to the film thickness and the optical constants, other properties such as the roughness of the via bottom also influence the amplitude of the reflectance. The DFT can handle the difficulty of separating the dense peaks and valleys, as well as combined modulation effect of the high frequency oscillations.
4.2 Measurement Uncertainty Evaluation
Starting in 2007, the International Technology Roadmap for Semiconductors (ITRS) began to define measurement uncertainty as the key metric for metrology systems . We evaluate total measurement uncertainty (TMU) on depth variations as a pooling of the measurement precision, detector’s depth resolution and DFT algorithm resolution.12]:
The DFT resolutionΔD is determined by the total number of the discrete sampling data N and the sampling interval which is limited by the detector resolving power . The DFT resolution is:
Since the major source of measurement uncertainty is from DFT algorithm, it represents the TMU in current measurement cases.
5. Results and discussions
Figure 7(a) shows the top view of the circular HDTSV sample. The via CD is around 5 μm, and the via pitch is around 10 μm. The illumination spot size around 30 μm covers from five to nine vias in one shot measurement. The cross section SEM shown in Fig. 7(b) was taken in a vicinity site for measurement comparison after spectral reflectometry experiments.
Figure 8(a) shows the theoretical model fit to the measured spectrum of the high aspect ratio HDTSV array structure shown in Fig. 7. The incidence of illumination covered the periodic array structures, and a combined interference spectrum was obtained. The illuminated areas of the top silicon surface and the via opening area is roughly 81% ( = α) and 19%( = 1-α) of the total surface area respectively. The oscillation from the via depth is particularly obvious in the long wavelength region as shown in the upper right side of Fig. 8(a). A preliminary fit to the experimental spectrum which only considers the frequency of the oscillation based on the phase angle difference was obtained using the Eq. (2) with a depth d of 65.08 um. According to Eq. (3), the ratio of the effective illumination area in via bottom to the top via opening area (5 um CD in this case) can be calculated from the maximum measurable depth (71.5 um as listed in Table 1) and the via depth (65.08um from the above theoretical modeling fitting), which is about 0.8% ( = f). Thus the portion of the illuminated via bottom areas is further attenuated from 19% of the via opening ratio by multiplying 0.8% for the reflectance calculation as expressed in Eq. (4). Then a nice fit to the experimental spectrum was obtained using the modified theoretical model expressed in Eq. (6) with the root mean square bottom roughness of 110 nm. A cross-section SEM result in Fig. 8(b) shows the bottom surface roughness is in a range of tens to hundred nm which is agreeable to our theoretical estimations.
As the theoretical model of the via depth variation mentioned in section 3.3, a spot illuminates number of silicon vias with various depths resulting a combination reflectance spectra. Figure 9(a) shows the high frequency data which was extracted from the reflectance spectrum in Fig. 8(a). Its DFT result shows the frequencies of the corresponding via depths of 64.04, 65.08, 65.70, 66.13 and 66.56 μm respectively are separated from each other in Fig. 9(b). It reveals the via depth variation of 4.5% (3σ) within the 30 μm illumination spot area. Figure 10 shows repeatability of multiple times measurement at different site a, b and c respectively. The DFT results show the major five depths of each site is consistent in continuous three times measurement which indicate high precision of measurement data and DFT extraction algorithm. There are some peak amplitudes differences and peak broadening was observed among continuous measurement data which might be caused by the slightly unstability of light source power and spot position. Some weak peaks are not clearly shown in the DFT results which might be due to the partial illumination and reflection from the spot edge. The via depth variations are 4.5% (3σ), 4.4% (3σ) and 3.4% (3σ) of site a, b and c respectively. The global depth variations then can be estimated as 4.0% from multiple sites measurements of a, b and c. The top view of HDTSV sample in Fig. 7(a) shows current spot size just about covers five to nine vias in one shot which is consistent to our DFT results. The cross section SEM shown in Fig. 7(b) was usually done for one site cut measurement as the time and expense limitation, thus it is not a convenient and precise method for via depth variations analysis especially for global multiple sites inspection.
Figure 11 shows the cross-section SEM results of top oxide layer and deep via array structure in the upper left and bottom left side respectively. The top view of square HDTSV sample in the bottom right side shows the nominal CD 5 μm, pitch 10 μm, illumination spot is around 30 μm. Figure 12(a) shows an experimental spectrum from an HDTSV array structure with a thin oxide hard mask on top of it. The illuminated areas of the oxide surface and the via opening area is roughly 75% and 25% of the total surface area respectively. The low and high frequency oscillations were extracted using a spectrum processing algorithm as shown in Fig. 12(b) and 12(c) respectively. The low frequency oscillations show an excellent theoretical model fit to the reflectance spectra and its associated hard mask thicknesses at 596 nm. The high frequency oscillation features were analyzed by DFT algorithm to extract multiple via depths within one shot measurement as shown in Fig. 12(d). The DFT result shows six discrete via depths d of 36.27, 36.70, 38.00, 38.55, 39.86 and 41.28 μm respectively, and each depth accompanies two more optical path depths d-2doxide and d-doxide. The optical thickness of oxide film: doxide = n(λ)*dphysical thickness which is around 0.87 μm ( = 1.46*0.596 μm). For example, the first set of via depth data marked with red color value is 34.53( = d-2*0.87), 35.40( = d-0.87) and 36.27 μm ( = d). Some of the attenuated signal at corresponding via depth d-2doxide was too weak which merge into neighboring peak and cause slightly peak broadening. Some residual spikes in few microns range were observed in cross section SEM result as shown in Fig. 11 which agrees with our DFT results of over a 5 μm depth variations.
We demonstrate the use and enhancement of an existing wafer metrology tool, spectral reflectometer by implementing novel theoretical model and measurement algorithm for HDTSV inspection. It is capable of measuring depth and depth variations of array vias by DFT analysis in one shot measurement. Surface roughness of via bottom can also be extracted by scattering model fitting. We successfully opens up the possibility of mapping, the via depth variation within the illumination area and also across an entire wafer in a nondestructively and fast manner.
Our future work will focus on the measurements of HDTSVs with decreasing diameters and increasing aspect ratios. We will reduce our current measurement uncertainty by improving the detector’s resolution and increasing sampling bandwidth, as well as DFT algorithm refinement.
The authors would like to thank EOL/ITRI (Electronics and Opto-Electronics Research Laboratory/ Industrial Technology Research Institute) for 3D interconnect processing wafers support. We also would like to thank Michael Tu and Perry Liang at Nanometrics for their help on collecting reflectometer spectra.
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