Abstract

P-i-n junctions were fabricated along Si nanowires (SiNWs) via the conventional top-down approach using optical lithography. Each device comprises 500 identical SiNWs connected in parallel, and each SiNW has triangular cross-section with dimensions of ~6 nm (base) by ~8 nm (height). The photodiodes exhibit very good rectifying electrical characteristics with a low reverse bias current of ~0.2 fA per SiNW. The photocurrent spectral response exhibits three peaks between 400 nm to 700 nm, which arise due to local optical field enhancement associated with diffraction by the periodic SiNW array and interference in an air/SiO2/Si cavity.

© 2011 OSA

1. Introduction

Nanostructures are integral components of electronic devices as the technology node shrinks further into the nanoscale. To date, nanowires (NWs) have been applied in the realization of nanoscale transistors [1,2] and sensors [3] with impressive performance. Individually doped silicon NWs in a crossed configuration forming abrupt p-n junctions were among the first NWs junction devices demonstrated. Crossed Si-CdS NW avalanche photodiodes fabricated using the bottom-up approach with ultrahigh sensitivity were also reported [4]. Most of the silicon NW junctions were fabricated using the bottom-up approach [4,5]. While this approach of growing SiNWs is able to produce junctions with axial and longitudinal modulations, there are inherent issues related to the exact placement of SiNWs and it remains a challenge to integrate the SiNWs in a scale suitable for practical applications. As such, from manufacturability perspective, the top-down approach for SiNWs fabrication is preferred. This approach also allows a very dense array of SiNWs to be fabricated to provide very high spatial resolution, and the integration of the sensing application with CMOS circuits. P-n junctions formed along SiNWs via the top-down approach have not been widely investigated. We have previously reported lateral SiNW p-n junctions based nano-temperature sensors with a wire dimension down to 20 nm [6]. In this letter, we report on the fabrication of p-i-n junctions formed along SiNWs using the top-down approach with a wire dimension of less than 10 nm. Strong rectifying characteristics have been observed, which confirmed that SiNW p-i-n junctions have been successfully formed. Their photocurrent spectral response has been characterized and several distinct peaks have been observed. This suggests enhanced absorption at certain wavelengths that are not observed in bulk Si devices.

2. Device fabrication

The starting SOI wafers were (100) orientated, p-doped with a 120 nm thick Si top layer. Alternating phase shift mask lithography with KrF scanner was used to pattern photoresist with a width of 120 nm. Plasma resist trimming was then used to further reduce the resist pattern width. Si fins with a width of 45 nm, length of 1 µm and height of 120 nm were formed after silicon etching process. The fins with straight etch profile were subsequently reduced to SiNWs by a 4-hour dry oxidation process at 875 °C. Implant windows were opened consecutively at the Si pads connected to the two ends of the SiNWs to dope them with phosphorus (P) and boron (B). The implant energy and dose for P were 30 keV and 4 × 1015 cm−2 respectively, and for B were 35 keV and 5 × 1015 cm−2 respectively. The concentrations for both dopants at the contact pads were estimated to be in the range of 1020 cm−3 based on Taurus Tsuprem simulation. The high value ensures that good ohmic contacts will be obtained. The intrinsic region, designed to be the entire SiNW, has a doping concentration of about 3 × 1013 cm−3 from Tsuprem simulation. It is less than the initial wafer doping due to the outward diffusion of boron during the thermal oxidation process [7]. The dopants were activated using rapid thermal annealing at 1000 °C for 5 seconds. A layer of 4000 Å thick undoped silicate glass (USG) was deposited to passivate the SiNWs before metallization. Contact holes were defined on the USG and were etched through the passivation layer down to Si pad. A blanket deposition of 25 nm tantalum nitride (TaN) followed by 750 nm aluminum silicon copper compound by physical vapor deposition (PVD) formed the metal/Si contacts. TaN was deposited to prevent the diffusion of Cu that is known to diffuse fast in Si. The metal layers were patterned into larger contact pads for direct probing purposes. The devices were then annealed in a hydrogen and nitrogen ambient at 420 °C for 30 minutes. Fig. 1 shows the SEM micrograph of a typical device comprising 500 SiNWs p-i-n junctions connected in parallel between the two big Si pads. The SiNWs are about 1 μm long and are separated regularly apart by about 372 nm.

 

Fig. 1 SEM image of device structure showing the general device layout having 500 SiNWs p-i-n junctions connected in parallel. Intrinsic Si nanowires are exposed after thermal oxidation and oxide removal. They are connected between heavily doped P and N type Si pad to form p-i-n junction. Scale bar: 400 nm.

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The transmission electron micrograph shown in Fig. 2 reveals that the SiNWs are crystalline and have a triangular cross-section with a height and base of about 8nm and 6nm respectively. The surrounding medium has been verified by energy dispersive X-ray spectroscopy (EDX) to be SiO2.

 

Fig. 2 TEM image of SiNW embedded in SiO2. Scale bar: 10 nm. Dotted line outlines the triangular cross section of the crystalline SiNW.

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3. Device characterization

The electrical characteristic of a 500 SiNWs device measured at room temperature is shown in Fig. 3 . Very strong rectifying characteristic with a rectifying ratio of more than 9 orders of magnitude from −2 V to 2 V can be observed. This verifies that SiNWs p-i-n junctions have been successfully fabricated. The reverse bias current is very low at around 100 fA, which translates to about 0.2 fA per SiNW, attributed to the small cross-sectional area of the nanowire junction. With such low dark current, they can be potentially used as ultra-small-scale photodiodes with very high sensitivity. Individual SiNWs are found to be able to withstand current density up to 106 A/cm2 under high forward bias. The best fit to the data under forward bias yields an ideality factor of around 1.8, as shown in Fig. 3. This could arise from trapped charges in the oxide surrounding the SiNWs and recombination sites at the SiNW/oxide interface, given the large surface to volume ratio of the nanowires p-i-n junctions.

 

Fig. 3 IV characteristic of p-i-n diodes with 500 nanowires connected in parallel. Also shown is the straight line fitting used for deducing the ideality factor.

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The photocurrent spectral response of the SiNWs p-i-n junctions was measured between 400 nm and 700 nm. A tungsten-halogen source was spectrally filtered by a monochromator and focused to a beam with a diameter 520 ± 20 µm at normal incidence to the surface of the chip, and the photocurrent was measured by a low noise current preamplifier. The photocurrent spectral response was normalized to the power spectrum of the excitation. The latter was measured by replacing the sample with a calibrated Si detector. The devices responded well to optical illumination despite their small photon capture area. Fig. 4 shows the spectrum measured with an unpolarized normal incident light source for the 500 SiNWs p-i-n junctions. Three distinct peaks can be identified at 420 nm, 480 nm and 540 nm which are not present in the absorption spectrum of bulk Si and are not seen in bulk Si photodetectors.

 

Fig. 4 Spectral photocurrent response of the 500 SiNWs p-i-n junctions. Several distinct peaks can be observed as indicated by arrow. The inset shows the unit cell comprising air/SiO2/Si-substrate that is used for the construction of a periodic structure to simulate the spectral responsivity of the SiNWs pin device.

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Cao and associates [8] identified peaks in the spectral response of the photocurrent of Ge nanowires of diameter 220 – 280 nm due to the leaky geometrical resonances of dielectric nanostructures. Our calculations employing Lorentz-Mie scattering theory [9] predict that the longest wavelength geometrical resonance of a Si nanowire with diameter less than 10 nm and embedded in SiO2 dielectric is below 200 nm, outside the spectral range of our measurements. The SiNW diameter must exceed 20 nm for such modes to enter the visible-light regime [10]. The periodic array of SiNWs produces a periodic modulation of dielectric permittivity in one spatial dimension, i.e. a diffraction grating, an example of a one dimensional photonic crystal. The mth order diffracted wave occurs at a wavelength λ and angle θ satisfying = ndsinθ, where d = 372 nm and n = 1.46 are the spacing between adjacent SiNWs and optical dielectric constant of SiO2, respectively. The longest wavelength peak observed at 540 nm is in excellent agreement with longest wavelength λ≈540 nm for which first order diffraction is allowed, i.e. θ = π/2. The second diffraction takes place for wavelengths less than 270 nm, outside the spectral range of measurements. Moreover, all the three peaks match the resonant wavelengths predicted by detailed calculations of electromagnetic wave propagation in a periodic structure which has a unit cell comprising air/SiO2/Si-substrate, as illustrated in the inset of Fig. 4. Such a periodic structure resembles the actual device configuration. The simulated resonance wavelengths are 543 nm, 490 nm and 424 nm, which are close to the experimental peak wavelengths of 540 nm, 480 nm and 420 nm respectively. At these wavelengths, light diffracted by the periodic nanowire array interferes constructively as a consequence of multiple reflections at the SiO2/air and SiO2/Si-substrate interfaces, producing an enhancement of local field, and therefore, photocurrent. Our simulation has also shown that these peaks do not exist when only a single structure of air/SiO2/Si-substrate without periodicity is considered, attributed to the absence of diffraction effect. A detailed study of the diffraction effect in the periodic structure will be presented in a separate paper. Apart from these three peaks, the response follows that of bulk Si as expected for SiNWs order with diameter of 10 nm, not small enough to exhibit quantization of electronic structure, but small enough compared to the inverse of the absorption coefficient α of bulk Si that absorption can be understood to be linear. The local field enhancement caused by this combination of grating/cavity effect produces peaks in the absorption spectrum and suggests that it is possible to engineer light absorption by designing multiple SiNWs in parallel to selectively enhance absorption for specific sensing applications.

4. Conclusion

In conclusion, SiNW p-i-n junctions with multiple SiNWs connected in parallel are fabricated by the top-down approach with optical lithography. The device exhibits very good rectifying characteristic with very low reverse bias current as a result of the very small SiNW dimension. It is noted that several responsivity peaks exist in the photocurrent spectrum resulting from local optical field enhancement associated with the periodic dielectric structure of the NWs.

References and links

1. M. T. Björk, J. Knoch, H. Schmid, H. Riel, and W. Riess, “Silicon nanowire tunneling field-effect transistors,” Appl. Phys. Lett. 92(19), 193504 (2008). [CrossRef]  

2. N. Singh, F. Y. Lim, W. W. Fang, S. C. Rustagi, L. K. Bera, A. Agarwal, C. H. Tung, K. M. Hoe, S. R. Omampuliyur, D. Tripathi, A. O. Adeyeye, G. Q. Lo, N. Balasubramanian, and D. L. Kwong, “Ultra-narrow silicon nanowire gate-all-around CMOS devices: impact of diameter channel-orientation and low temperature on device performance,” IEDM Tech. Dig 547–550, 1–4 (2006).

3. X. T. Vu, R. GhoshMoulick, J. F. Eschermann, R. Stockmann, A. Offenhäusser, and S. Ingebrandt, “Fabrication and application of silicon nanowire transistor arrays for biomolecular detection,” Sens. Actuators B Chem. 144(2), 354–360 (2010). [CrossRef]  

4. O. Hayden, R. Agarwal, and C. M. Lieber, “Nanoscale avalanche photodiodes for highly sensitive and spatially resolved photon detection,” Nat. Mater. 5(5), 352–356 (2006). [CrossRef]   [PubMed]  

5. Y. Cui and C. M. Lieber, “Functional nanoscale electronic devices assembled using silicon nanowire building blocks,” Science 291(5505), 851–853 (2001). [CrossRef]   [PubMed]  

6. A. Agarwal, K. Buddharaju, I. K. Lao, N. Singh, N. Balasubramanian, and D. L. Kwong, “Silicon nanowire sensor array using top-down CMOS technology,” Sens. Actuators A Phys. 145–146, 207–213 (2008). [CrossRef]  

7. A. S. Grove, O. Leistiko, and C. T. Sah, “Redistribution of acceptor and donor impurities during thermal oxidation of silicon,” J. Appl. Phys. 35(9), 2695–2701 (1964). [CrossRef]  

8. L. Cao, J.-S. Park, P. Fan, B. Clemens, and M. L. Brongersma, “Resonant germanium nanoantenna photodetectors,” Nano Lett. 10(4), 1229–1233 (2010). [CrossRef]   [PubMed]  

9. C. F. Bohren and D. R. Huffman, Absorption and Scattering of Light by Small Particles (John Wiley & Sons, Inc., 1998).

10. G. Ding, C. T. Chan, Z. Q. Zhang, and P. Sheng, “Resonance-enhanced optical annealing of silicon nanowires,” Phys. Rev. B 71(20), 205302 (2005). [CrossRef]  

References

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  1. M. T. Björk, J. Knoch, H. Schmid, H. Riel, and W. Riess, “Silicon nanowire tunneling field-effect transistors,” Appl. Phys. Lett. 92(19), 193504 (2008).
    [CrossRef]
  2. N. Singh, F. Y. Lim, W. W. Fang, S. C. Rustagi, L. K. Bera, A. Agarwal, C. H. Tung, K. M. Hoe, S. R. Omampuliyur, D. Tripathi, A. O. Adeyeye, G. Q. Lo, N. Balasubramanian, and D. L. Kwong, “Ultra-narrow silicon nanowire gate-all-around CMOS devices: impact of diameter channel-orientation and low temperature on device performance,” IEDM Tech. Dig 547–550, 1–4 (2006).
  3. X. T. Vu, R. GhoshMoulick, J. F. Eschermann, R. Stockmann, A. Offenhäusser, and S. Ingebrandt, “Fabrication and application of silicon nanowire transistor arrays for biomolecular detection,” Sens. Actuators B Chem. 144(2), 354–360 (2010).
    [CrossRef]
  4. O. Hayden, R. Agarwal, and C. M. Lieber, “Nanoscale avalanche photodiodes for highly sensitive and spatially resolved photon detection,” Nat. Mater. 5(5), 352–356 (2006).
    [CrossRef] [PubMed]
  5. Y. Cui and C. M. Lieber, “Functional nanoscale electronic devices assembled using silicon nanowire building blocks,” Science 291(5505), 851–853 (2001).
    [CrossRef] [PubMed]
  6. A. Agarwal, K. Buddharaju, I. K. Lao, N. Singh, N. Balasubramanian, and D. L. Kwong, “Silicon nanowire sensor array using top-down CMOS technology,” Sens. Actuators A Phys. 145–146, 207–213 (2008).
    [CrossRef]
  7. A. S. Grove, O. Leistiko, and C. T. Sah, “Redistribution of acceptor and donor impurities during thermal oxidation of silicon,” J. Appl. Phys. 35(9), 2695–2701 (1964).
    [CrossRef]
  8. L. Cao, J.-S. Park, P. Fan, B. Clemens, and M. L. Brongersma, “Resonant germanium nanoantenna photodetectors,” Nano Lett. 10(4), 1229–1233 (2010).
    [CrossRef] [PubMed]
  9. C. F. Bohren and D. R. Huffman, Absorption and Scattering of Light by Small Particles (John Wiley & Sons, Inc., 1998).
  10. G. Ding, C. T. Chan, Z. Q. Zhang, and P. Sheng, “Resonance-enhanced optical annealing of silicon nanowires,” Phys. Rev. B 71(20), 205302 (2005).
    [CrossRef]

2010 (2)

X. T. Vu, R. GhoshMoulick, J. F. Eschermann, R. Stockmann, A. Offenhäusser, and S. Ingebrandt, “Fabrication and application of silicon nanowire transistor arrays for biomolecular detection,” Sens. Actuators B Chem. 144(2), 354–360 (2010).
[CrossRef]

L. Cao, J.-S. Park, P. Fan, B. Clemens, and M. L. Brongersma, “Resonant germanium nanoantenna photodetectors,” Nano Lett. 10(4), 1229–1233 (2010).
[CrossRef] [PubMed]

2008 (2)

A. Agarwal, K. Buddharaju, I. K. Lao, N. Singh, N. Balasubramanian, and D. L. Kwong, “Silicon nanowire sensor array using top-down CMOS technology,” Sens. Actuators A Phys. 145–146, 207–213 (2008).
[CrossRef]

M. T. Björk, J. Knoch, H. Schmid, H. Riel, and W. Riess, “Silicon nanowire tunneling field-effect transistors,” Appl. Phys. Lett. 92(19), 193504 (2008).
[CrossRef]

2006 (2)

N. Singh, F. Y. Lim, W. W. Fang, S. C. Rustagi, L. K. Bera, A. Agarwal, C. H. Tung, K. M. Hoe, S. R. Omampuliyur, D. Tripathi, A. O. Adeyeye, G. Q. Lo, N. Balasubramanian, and D. L. Kwong, “Ultra-narrow silicon nanowire gate-all-around CMOS devices: impact of diameter channel-orientation and low temperature on device performance,” IEDM Tech. Dig 547–550, 1–4 (2006).

O. Hayden, R. Agarwal, and C. M. Lieber, “Nanoscale avalanche photodiodes for highly sensitive and spatially resolved photon detection,” Nat. Mater. 5(5), 352–356 (2006).
[CrossRef] [PubMed]

2005 (1)

G. Ding, C. T. Chan, Z. Q. Zhang, and P. Sheng, “Resonance-enhanced optical annealing of silicon nanowires,” Phys. Rev. B 71(20), 205302 (2005).
[CrossRef]

2001 (1)

Y. Cui and C. M. Lieber, “Functional nanoscale electronic devices assembled using silicon nanowire building blocks,” Science 291(5505), 851–853 (2001).
[CrossRef] [PubMed]

1964 (1)

A. S. Grove, O. Leistiko, and C. T. Sah, “Redistribution of acceptor and donor impurities during thermal oxidation of silicon,” J. Appl. Phys. 35(9), 2695–2701 (1964).
[CrossRef]

Adeyeye, A. O.

N. Singh, F. Y. Lim, W. W. Fang, S. C. Rustagi, L. K. Bera, A. Agarwal, C. H. Tung, K. M. Hoe, S. R. Omampuliyur, D. Tripathi, A. O. Adeyeye, G. Q. Lo, N. Balasubramanian, and D. L. Kwong, “Ultra-narrow silicon nanowire gate-all-around CMOS devices: impact of diameter channel-orientation and low temperature on device performance,” IEDM Tech. Dig 547–550, 1–4 (2006).

Agarwal, A.

A. Agarwal, K. Buddharaju, I. K. Lao, N. Singh, N. Balasubramanian, and D. L. Kwong, “Silicon nanowire sensor array using top-down CMOS technology,” Sens. Actuators A Phys. 145–146, 207–213 (2008).
[CrossRef]

N. Singh, F. Y. Lim, W. W. Fang, S. C. Rustagi, L. K. Bera, A. Agarwal, C. H. Tung, K. M. Hoe, S. R. Omampuliyur, D. Tripathi, A. O. Adeyeye, G. Q. Lo, N. Balasubramanian, and D. L. Kwong, “Ultra-narrow silicon nanowire gate-all-around CMOS devices: impact of diameter channel-orientation and low temperature on device performance,” IEDM Tech. Dig 547–550, 1–4 (2006).

Agarwal, R.

O. Hayden, R. Agarwal, and C. M. Lieber, “Nanoscale avalanche photodiodes for highly sensitive and spatially resolved photon detection,” Nat. Mater. 5(5), 352–356 (2006).
[CrossRef] [PubMed]

Balasubramanian, N.

A. Agarwal, K. Buddharaju, I. K. Lao, N. Singh, N. Balasubramanian, and D. L. Kwong, “Silicon nanowire sensor array using top-down CMOS technology,” Sens. Actuators A Phys. 145–146, 207–213 (2008).
[CrossRef]

N. Singh, F. Y. Lim, W. W. Fang, S. C. Rustagi, L. K. Bera, A. Agarwal, C. H. Tung, K. M. Hoe, S. R. Omampuliyur, D. Tripathi, A. O. Adeyeye, G. Q. Lo, N. Balasubramanian, and D. L. Kwong, “Ultra-narrow silicon nanowire gate-all-around CMOS devices: impact of diameter channel-orientation and low temperature on device performance,” IEDM Tech. Dig 547–550, 1–4 (2006).

Bera, L. K.

N. Singh, F. Y. Lim, W. W. Fang, S. C. Rustagi, L. K. Bera, A. Agarwal, C. H. Tung, K. M. Hoe, S. R. Omampuliyur, D. Tripathi, A. O. Adeyeye, G. Q. Lo, N. Balasubramanian, and D. L. Kwong, “Ultra-narrow silicon nanowire gate-all-around CMOS devices: impact of diameter channel-orientation and low temperature on device performance,” IEDM Tech. Dig 547–550, 1–4 (2006).

Björk, M. T.

M. T. Björk, J. Knoch, H. Schmid, H. Riel, and W. Riess, “Silicon nanowire tunneling field-effect transistors,” Appl. Phys. Lett. 92(19), 193504 (2008).
[CrossRef]

Brongersma, M. L.

L. Cao, J.-S. Park, P. Fan, B. Clemens, and M. L. Brongersma, “Resonant germanium nanoantenna photodetectors,” Nano Lett. 10(4), 1229–1233 (2010).
[CrossRef] [PubMed]

Buddharaju, K.

A. Agarwal, K. Buddharaju, I. K. Lao, N. Singh, N. Balasubramanian, and D. L. Kwong, “Silicon nanowire sensor array using top-down CMOS technology,” Sens. Actuators A Phys. 145–146, 207–213 (2008).
[CrossRef]

Cao, L.

L. Cao, J.-S. Park, P. Fan, B. Clemens, and M. L. Brongersma, “Resonant germanium nanoantenna photodetectors,” Nano Lett. 10(4), 1229–1233 (2010).
[CrossRef] [PubMed]

Chan, C. T.

G. Ding, C. T. Chan, Z. Q. Zhang, and P. Sheng, “Resonance-enhanced optical annealing of silicon nanowires,” Phys. Rev. B 71(20), 205302 (2005).
[CrossRef]

Clemens, B.

L. Cao, J.-S. Park, P. Fan, B. Clemens, and M. L. Brongersma, “Resonant germanium nanoantenna photodetectors,” Nano Lett. 10(4), 1229–1233 (2010).
[CrossRef] [PubMed]

Cui, Y.

Y. Cui and C. M. Lieber, “Functional nanoscale electronic devices assembled using silicon nanowire building blocks,” Science 291(5505), 851–853 (2001).
[CrossRef] [PubMed]

Ding, G.

G. Ding, C. T. Chan, Z. Q. Zhang, and P. Sheng, “Resonance-enhanced optical annealing of silicon nanowires,” Phys. Rev. B 71(20), 205302 (2005).
[CrossRef]

Eschermann, J. F.

X. T. Vu, R. GhoshMoulick, J. F. Eschermann, R. Stockmann, A. Offenhäusser, and S. Ingebrandt, “Fabrication and application of silicon nanowire transistor arrays for biomolecular detection,” Sens. Actuators B Chem. 144(2), 354–360 (2010).
[CrossRef]

Fan, P.

L. Cao, J.-S. Park, P. Fan, B. Clemens, and M. L. Brongersma, “Resonant germanium nanoantenna photodetectors,” Nano Lett. 10(4), 1229–1233 (2010).
[CrossRef] [PubMed]

Fang, W. W.

N. Singh, F. Y. Lim, W. W. Fang, S. C. Rustagi, L. K. Bera, A. Agarwal, C. H. Tung, K. M. Hoe, S. R. Omampuliyur, D. Tripathi, A. O. Adeyeye, G. Q. Lo, N. Balasubramanian, and D. L. Kwong, “Ultra-narrow silicon nanowire gate-all-around CMOS devices: impact of diameter channel-orientation and low temperature on device performance,” IEDM Tech. Dig 547–550, 1–4 (2006).

GhoshMoulick, R.

X. T. Vu, R. GhoshMoulick, J. F. Eschermann, R. Stockmann, A. Offenhäusser, and S. Ingebrandt, “Fabrication and application of silicon nanowire transistor arrays for biomolecular detection,” Sens. Actuators B Chem. 144(2), 354–360 (2010).
[CrossRef]

Grove, A. S.

A. S. Grove, O. Leistiko, and C. T. Sah, “Redistribution of acceptor and donor impurities during thermal oxidation of silicon,” J. Appl. Phys. 35(9), 2695–2701 (1964).
[CrossRef]

Hayden, O.

O. Hayden, R. Agarwal, and C. M. Lieber, “Nanoscale avalanche photodiodes for highly sensitive and spatially resolved photon detection,” Nat. Mater. 5(5), 352–356 (2006).
[CrossRef] [PubMed]

Hoe, K. M.

N. Singh, F. Y. Lim, W. W. Fang, S. C. Rustagi, L. K. Bera, A. Agarwal, C. H. Tung, K. M. Hoe, S. R. Omampuliyur, D. Tripathi, A. O. Adeyeye, G. Q. Lo, N. Balasubramanian, and D. L. Kwong, “Ultra-narrow silicon nanowire gate-all-around CMOS devices: impact of diameter channel-orientation and low temperature on device performance,” IEDM Tech. Dig 547–550, 1–4 (2006).

Ingebrandt, S.

X. T. Vu, R. GhoshMoulick, J. F. Eschermann, R. Stockmann, A. Offenhäusser, and S. Ingebrandt, “Fabrication and application of silicon nanowire transistor arrays for biomolecular detection,” Sens. Actuators B Chem. 144(2), 354–360 (2010).
[CrossRef]

Knoch, J.

M. T. Björk, J. Knoch, H. Schmid, H. Riel, and W. Riess, “Silicon nanowire tunneling field-effect transistors,” Appl. Phys. Lett. 92(19), 193504 (2008).
[CrossRef]

Kwong, D. L.

A. Agarwal, K. Buddharaju, I. K. Lao, N. Singh, N. Balasubramanian, and D. L. Kwong, “Silicon nanowire sensor array using top-down CMOS technology,” Sens. Actuators A Phys. 145–146, 207–213 (2008).
[CrossRef]

N. Singh, F. Y. Lim, W. W. Fang, S. C. Rustagi, L. K. Bera, A. Agarwal, C. H. Tung, K. M. Hoe, S. R. Omampuliyur, D. Tripathi, A. O. Adeyeye, G. Q. Lo, N. Balasubramanian, and D. L. Kwong, “Ultra-narrow silicon nanowire gate-all-around CMOS devices: impact of diameter channel-orientation and low temperature on device performance,” IEDM Tech. Dig 547–550, 1–4 (2006).

Lao, I. K.

A. Agarwal, K. Buddharaju, I. K. Lao, N. Singh, N. Balasubramanian, and D. L. Kwong, “Silicon nanowire sensor array using top-down CMOS technology,” Sens. Actuators A Phys. 145–146, 207–213 (2008).
[CrossRef]

Leistiko, O.

A. S. Grove, O. Leistiko, and C. T. Sah, “Redistribution of acceptor and donor impurities during thermal oxidation of silicon,” J. Appl. Phys. 35(9), 2695–2701 (1964).
[CrossRef]

Lieber, C. M.

O. Hayden, R. Agarwal, and C. M. Lieber, “Nanoscale avalanche photodiodes for highly sensitive and spatially resolved photon detection,” Nat. Mater. 5(5), 352–356 (2006).
[CrossRef] [PubMed]

Y. Cui and C. M. Lieber, “Functional nanoscale electronic devices assembled using silicon nanowire building blocks,” Science 291(5505), 851–853 (2001).
[CrossRef] [PubMed]

Lim, F. Y.

N. Singh, F. Y. Lim, W. W. Fang, S. C. Rustagi, L. K. Bera, A. Agarwal, C. H. Tung, K. M. Hoe, S. R. Omampuliyur, D. Tripathi, A. O. Adeyeye, G. Q. Lo, N. Balasubramanian, and D. L. Kwong, “Ultra-narrow silicon nanowire gate-all-around CMOS devices: impact of diameter channel-orientation and low temperature on device performance,” IEDM Tech. Dig 547–550, 1–4 (2006).

Lo, G. Q.

N. Singh, F. Y. Lim, W. W. Fang, S. C. Rustagi, L. K. Bera, A. Agarwal, C. H. Tung, K. M. Hoe, S. R. Omampuliyur, D. Tripathi, A. O. Adeyeye, G. Q. Lo, N. Balasubramanian, and D. L. Kwong, “Ultra-narrow silicon nanowire gate-all-around CMOS devices: impact of diameter channel-orientation and low temperature on device performance,” IEDM Tech. Dig 547–550, 1–4 (2006).

Offenhäusser, A.

X. T. Vu, R. GhoshMoulick, J. F. Eschermann, R. Stockmann, A. Offenhäusser, and S. Ingebrandt, “Fabrication and application of silicon nanowire transistor arrays for biomolecular detection,” Sens. Actuators B Chem. 144(2), 354–360 (2010).
[CrossRef]

Omampuliyur, S. R.

N. Singh, F. Y. Lim, W. W. Fang, S. C. Rustagi, L. K. Bera, A. Agarwal, C. H. Tung, K. M. Hoe, S. R. Omampuliyur, D. Tripathi, A. O. Adeyeye, G. Q. Lo, N. Balasubramanian, and D. L. Kwong, “Ultra-narrow silicon nanowire gate-all-around CMOS devices: impact of diameter channel-orientation and low temperature on device performance,” IEDM Tech. Dig 547–550, 1–4 (2006).

Park, J.-S.

L. Cao, J.-S. Park, P. Fan, B. Clemens, and M. L. Brongersma, “Resonant germanium nanoantenna photodetectors,” Nano Lett. 10(4), 1229–1233 (2010).
[CrossRef] [PubMed]

Riel, H.

M. T. Björk, J. Knoch, H. Schmid, H. Riel, and W. Riess, “Silicon nanowire tunneling field-effect transistors,” Appl. Phys. Lett. 92(19), 193504 (2008).
[CrossRef]

Riess, W.

M. T. Björk, J. Knoch, H. Schmid, H. Riel, and W. Riess, “Silicon nanowire tunneling field-effect transistors,” Appl. Phys. Lett. 92(19), 193504 (2008).
[CrossRef]

Rustagi, S. C.

N. Singh, F. Y. Lim, W. W. Fang, S. C. Rustagi, L. K. Bera, A. Agarwal, C. H. Tung, K. M. Hoe, S. R. Omampuliyur, D. Tripathi, A. O. Adeyeye, G. Q. Lo, N. Balasubramanian, and D. L. Kwong, “Ultra-narrow silicon nanowire gate-all-around CMOS devices: impact of diameter channel-orientation and low temperature on device performance,” IEDM Tech. Dig 547–550, 1–4 (2006).

Sah, C. T.

A. S. Grove, O. Leistiko, and C. T. Sah, “Redistribution of acceptor and donor impurities during thermal oxidation of silicon,” J. Appl. Phys. 35(9), 2695–2701 (1964).
[CrossRef]

Schmid, H.

M. T. Björk, J. Knoch, H. Schmid, H. Riel, and W. Riess, “Silicon nanowire tunneling field-effect transistors,” Appl. Phys. Lett. 92(19), 193504 (2008).
[CrossRef]

Sheng, P.

G. Ding, C. T. Chan, Z. Q. Zhang, and P. Sheng, “Resonance-enhanced optical annealing of silicon nanowires,” Phys. Rev. B 71(20), 205302 (2005).
[CrossRef]

Singh, N.

A. Agarwal, K. Buddharaju, I. K. Lao, N. Singh, N. Balasubramanian, and D. L. Kwong, “Silicon nanowire sensor array using top-down CMOS technology,” Sens. Actuators A Phys. 145–146, 207–213 (2008).
[CrossRef]

N. Singh, F. Y. Lim, W. W. Fang, S. C. Rustagi, L. K. Bera, A. Agarwal, C. H. Tung, K. M. Hoe, S. R. Omampuliyur, D. Tripathi, A. O. Adeyeye, G. Q. Lo, N. Balasubramanian, and D. L. Kwong, “Ultra-narrow silicon nanowire gate-all-around CMOS devices: impact of diameter channel-orientation and low temperature on device performance,” IEDM Tech. Dig 547–550, 1–4 (2006).

Stockmann, R.

X. T. Vu, R. GhoshMoulick, J. F. Eschermann, R. Stockmann, A. Offenhäusser, and S. Ingebrandt, “Fabrication and application of silicon nanowire transistor arrays for biomolecular detection,” Sens. Actuators B Chem. 144(2), 354–360 (2010).
[CrossRef]

Tripathi, D.

N. Singh, F. Y. Lim, W. W. Fang, S. C. Rustagi, L. K. Bera, A. Agarwal, C. H. Tung, K. M. Hoe, S. R. Omampuliyur, D. Tripathi, A. O. Adeyeye, G. Q. Lo, N. Balasubramanian, and D. L. Kwong, “Ultra-narrow silicon nanowire gate-all-around CMOS devices: impact of diameter channel-orientation and low temperature on device performance,” IEDM Tech. Dig 547–550, 1–4 (2006).

Tung, C. H.

N. Singh, F. Y. Lim, W. W. Fang, S. C. Rustagi, L. K. Bera, A. Agarwal, C. H. Tung, K. M. Hoe, S. R. Omampuliyur, D. Tripathi, A. O. Adeyeye, G. Q. Lo, N. Balasubramanian, and D. L. Kwong, “Ultra-narrow silicon nanowire gate-all-around CMOS devices: impact of diameter channel-orientation and low temperature on device performance,” IEDM Tech. Dig 547–550, 1–4 (2006).

Vu, X. T.

X. T. Vu, R. GhoshMoulick, J. F. Eschermann, R. Stockmann, A. Offenhäusser, and S. Ingebrandt, “Fabrication and application of silicon nanowire transistor arrays for biomolecular detection,” Sens. Actuators B Chem. 144(2), 354–360 (2010).
[CrossRef]

Zhang, Z. Q.

G. Ding, C. T. Chan, Z. Q. Zhang, and P. Sheng, “Resonance-enhanced optical annealing of silicon nanowires,” Phys. Rev. B 71(20), 205302 (2005).
[CrossRef]

Appl. Phys. Lett. (1)

M. T. Björk, J. Knoch, H. Schmid, H. Riel, and W. Riess, “Silicon nanowire tunneling field-effect transistors,” Appl. Phys. Lett. 92(19), 193504 (2008).
[CrossRef]

IEDM Tech. Dig (1)

N. Singh, F. Y. Lim, W. W. Fang, S. C. Rustagi, L. K. Bera, A. Agarwal, C. H. Tung, K. M. Hoe, S. R. Omampuliyur, D. Tripathi, A. O. Adeyeye, G. Q. Lo, N. Balasubramanian, and D. L. Kwong, “Ultra-narrow silicon nanowire gate-all-around CMOS devices: impact of diameter channel-orientation and low temperature on device performance,” IEDM Tech. Dig 547–550, 1–4 (2006).

J. Appl. Phys. (1)

A. S. Grove, O. Leistiko, and C. T. Sah, “Redistribution of acceptor and donor impurities during thermal oxidation of silicon,” J. Appl. Phys. 35(9), 2695–2701 (1964).
[CrossRef]

Nano Lett. (1)

L. Cao, J.-S. Park, P. Fan, B. Clemens, and M. L. Brongersma, “Resonant germanium nanoantenna photodetectors,” Nano Lett. 10(4), 1229–1233 (2010).
[CrossRef] [PubMed]

Nat. Mater. (1)

O. Hayden, R. Agarwal, and C. M. Lieber, “Nanoscale avalanche photodiodes for highly sensitive and spatially resolved photon detection,” Nat. Mater. 5(5), 352–356 (2006).
[CrossRef] [PubMed]

Phys. Rev. B (1)

G. Ding, C. T. Chan, Z. Q. Zhang, and P. Sheng, “Resonance-enhanced optical annealing of silicon nanowires,” Phys. Rev. B 71(20), 205302 (2005).
[CrossRef]

Science (1)

Y. Cui and C. M. Lieber, “Functional nanoscale electronic devices assembled using silicon nanowire building blocks,” Science 291(5505), 851–853 (2001).
[CrossRef] [PubMed]

Sens. Actuators A Phys. (1)

A. Agarwal, K. Buddharaju, I. K. Lao, N. Singh, N. Balasubramanian, and D. L. Kwong, “Silicon nanowire sensor array using top-down CMOS technology,” Sens. Actuators A Phys. 145–146, 207–213 (2008).
[CrossRef]

Sens. Actuators B Chem. (1)

X. T. Vu, R. GhoshMoulick, J. F. Eschermann, R. Stockmann, A. Offenhäusser, and S. Ingebrandt, “Fabrication and application of silicon nanowire transistor arrays for biomolecular detection,” Sens. Actuators B Chem. 144(2), 354–360 (2010).
[CrossRef]

Other (1)

C. F. Bohren and D. R. Huffman, Absorption and Scattering of Light by Small Particles (John Wiley & Sons, Inc., 1998).

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Figures (4)

Fig. 1
Fig. 1

SEM image of device structure showing the general device layout having 500 SiNWs p-i-n junctions connected in parallel. Intrinsic Si nanowires are exposed after thermal oxidation and oxide removal. They are connected between heavily doped P and N type Si pad to form p-i-n junction. Scale bar: 400 nm.

Fig. 2
Fig. 2

TEM image of SiNW embedded in SiO2. Scale bar: 10 nm. Dotted line outlines the triangular cross section of the crystalline SiNW.

Fig. 3
Fig. 3

IV characteristic of p-i-n diodes with 500 nanowires connected in parallel. Also shown is the straight line fitting used for deducing the ideality factor.

Fig. 4
Fig. 4

Spectral photocurrent response of the 500 SiNWs p-i-n junctions. Several distinct peaks can be observed as indicated by arrow. The inset shows the unit cell comprising air/SiO2/Si-substrate that is used for the construction of a periodic structure to simulate the spectral responsivity of the SiNWs pin device.

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