Monolithic silicon chip with 10 modulator channels at 25 Gbps and 100-GHz spacing

The rapid growth in data and video usage is demanding bandwidth in all communication networks from access, data center interconnects, to long-haul links [1]. Photonic integration becomes an increasingly important direction because of its larger bandwidth density and potentially lower power consumption compared to discrete technologies. In addition, silicon photonics offers the extra benefits of utilizing existing complementary metal-oxide-semiconductor (CMOS) infrastructures and integration with microelectronics [2]. Here we demonstrate a multi-channel, low-chirp silicon modulator chip with potential bandwidth capacity of 250 Gbps on a footprint of 5 mm × 8 mm that is fabricated on 200-mm-diameter silicon-on-insulator wafers using CMOS compatible processes. The results were first reported in the European Conference on Optical Communication (ECOC) in 2011 [3], and we describe it in greater details in this paper.

Figure 1 shows the schematics of chip layout. It monolithically integrates three types of waveguides, i.e., silicon waveguides, Si₃N₄ waveguides, and silica waveguides, for different components within the circuit, as listed in Table 1. The AWG is implemented using Si₃N₄ channel waveguides, since its refractive index is considerably lower than silicon to provide better tolerance against fabrication imperfections, while is still high enough to allow tight bending and a small footprint. It has 5 outputs that are connected to cantilevered silica waveguides [4], because of its very low index contrast and efficient coupling to cleaved single-mode fibers. The 5 outputs have a wavelength spacing of ∼1 nm. The AWG has 12 input channels that are coupled to 12 silicon waveguides. Two channels on the edges are used for reference, and the central 10 channels have Mach-Zehnder interferometer-based silicon modulators. The optical inputs to the silicon modulators also use cantilevered silica waveguide fiber couplers. Figure 1(d) shows an optical photo of a finished chip, rotated 90 degree clockwise from Fig. 1(a).

 

Fig. 1 Multi-channel modulator chip: (a–c) Schematics of the chip. (d) Chip photo.

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Table 1. Integrated waveguide components and materials

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The modulators are based on carrier depletion of silicon p-n junctions [5–10], with a capacitively loaded traveling wave electrode design [11]. As seen in Fig. 2(a), a symmetric coplanar stripline bus electrode encloses both modulator arms, and segments of modulators are periodically loaded to the bus electrode using narrow T-rails. Between the modulator segments are passive waveguides. With a single input drive signal, each arm is driven with half of the bus voltage in a push-pull fashion. Although it offers no improvement in drive voltage compared to conventional configuration that drives only one arm, the capacitance loading (C_load) from the modulator to the RF line is only half of the diode capacitance since the two diodes are connected in series. This improves modulator bandwidth as capacitance is the primary limiting factor for depletion modulators. The push-pull operation also significantly reduces modulation-induced chirp. The impedance and effective index of the loaded RF transmission line can be adjusted by the amount of capacitance loading or the filling factor of the active modulation segments. Figure 2(b) and (c) show the effects as an example, with C_load increasing from 0 to 3 pF/cm in a step of 0.5 pF/cm. We designed for proper matching of the RF impedance to 50 Ω and of the RF index to optical group index 3.77 with C_load=C_d*f/2=1.5 pF/cm, where C_d is the capacitance per p-n diode (expected 3.5–4.0 pF/cm under >3V reverse bias [12]) and f=0.8 is the modulator filling factor. The modulator fabrication process is similar to Ref. [12].

 

Fig. 2 Modulator design. (a) Schematic of the RF line with periodic capacitive loading. (b–c) Effects of capacitance loading on the impedance and RF index.

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We first characterize the optical responses of the SiN AWG. The design has a channel spacing of 100 GHz, a free-spectral-range of 1.6 THz, a grating order of 103, and 80 grating arms. Figure 3(a) shows simulated responses of all 12 channels. One can see a background crosstalk of ∼35 dB and an insertion loss uniformity of ∼0.8 dB. Figure 3(b) shows measured responses from the 12 input ports to the central output port using cleaved single-mode fibers at both ends. The two reference channels are plotted in dashed lines. We measured a channel spacing of 99.7 GHz, and a channel position shift of 4.3 nm caused by slight reduction in waveguide dimensions. The background crosstalk is ∼ 20 dB, and the 1-dB and 3-dB passband widths are 35 GHz and 60 GHz, respectively. Figure 3(c) shows an analysis of the insertion loss. The two reference channels have an averaged fiber-to-fiber insertion loss of about 13.3 dB. The estimated loss breakdown is: 4 dB for the fiber-to-silicon coupler, 1 dB silicon-waveguide loss, 1 dB for the conversion from silicon to SiN waveguide, 5 dB for the SiN AWG including SiN waveguide loss, and 2 dB for the fiber-to-SiN coupler. Improper resolution of the inverse taper tips in lithography is suspected for the higher fiber coupling loss compared to our earlier results [4]. The modulator channels have a loss variation of < ±0.6 dB except the 3rd channel. The averaged loss is 4.2 dB higher than the reference channels, suggesting a modulator insertion loss of <5 dB (when the higher intrinsic loss of the AWG edge channels is taken into account). This loss can be broken down as 0.5 dB from waveguide scattering loss, 0.5 dB from the 1×2 and 2×2 multimode interferometers (MMIs), and <4 dB from the free-carrier absorption (2.4-mm long active region with ∼17 dB/cm loss). When a reverse bias of 5 V is applied, the total insertion loss reduces by 0.6 dB to ∼4 dB.

 

Fig. 3 Transmission spectra: (a) Simulated AWG responses. (b) Measured fiber-to-fiber responses. (c) Analysis of insertion loss and channel uniformity.

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We now characterize the DC responses of the modulators. Figure 4(a) shows a normalized optical transmission against the reverse bias voltage for channels #1–5. The voltage is applied across the bus electrodes with the central bias floating. We measure extinction ratios around 11∼13.5 dB. These low extinction ratios are partially caused by the width deviation of the 2×2 MMI combiners since the chip is on the extreme edge of the wafer. From other parts of the wafer we measured >20 dB extinction ratio. The voltage for π-phase shift (V_π) is about 10 V, leading to a V_πL product of 2.4 V·cm, typical of silicon depletion modulators.

 

Fig. 4 Modulator DC and bandwidth characterizations. (a) Normalized optical transmission vs DC bias for channels #1–5. (b–c) Measured E-E and E-O frequency responses for channel #1. (d) 30 Gbps modulation of channel #1 backward direction.

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The modulator bandwidth is characterized with an electrical-to-electrical component analyzer up to 40 GHz (HP8722D). High speed RF probes are used for both input and output ports. The responses are defined as 20*log₁₀(V_o/V_i), where V_i is the RF voltage applied to the input port, and V_o is the RF voltage at the RF output port or the reflected RF voltage at the input port. Figure 4(b) shows the |S₂₁|² through-port response under different bias for channel #1. With increasing reverse bias, the diode capacitance decreases, and the RF transmission improves. The 3-dB electrical bandwidth is 19 GHz at 3 V bias. The 6-dB electrical bandwidth is above 30 GHz for ≥3 V bias. Note that the finite resistivity of the silicon substrate (quoted 750 Ω-cm) contributed to the RF loss even in the absence of any loading. Figure 4(c) shows the |S₁₁|² reflections, in this case the output RF probe is terminated with a 50 Ω load. The reflection is below −15 dB up to 38 GHz for all cases.

We also measured the modulator operation at 30 Gbps data rate. To avoid the optical filtering effect of the AWG passband, we tested channel #1 modulator in the backward direction (i.e., reversing both RF and optical directions so the modulated light is unfiltered). Two RF probes are used, one for input, one for terminated output, similar to the case for the S₁₁ characterization. Figure 4(d) shows an optical eye with ∼6 Vpp drive and 3 V bias. The thermo-optical phase shifter was adjusted to the quadrature point. The extinction ratio is 7.2 dB. As we are driving not far from a π-phase shift, the additional insertion loss is only about 1 dB, making the total insertion loss ∼5 dB.

We then characterized the modulator chirp parameter with large signal modulation. The driving condition is similar to above except the RF signal is a 50 MHz triangular wave to emphasize the modulation transitions. The complex optical field after modulation is measured through homodyne detection with a silicon-based coherent receiver [13] and a 2 GSample/s real-time sampling scope. Figure 5(a) shows the recovered optical field for a record length of 620 ns. The slight curvature of the transition traces indicate a small chirp. Figure 5(b–d) show the intensity I(t), phase Φ(t), and extracted chirp parameter α ≡ 2I · (dΦ/dt)/(dI/dt) of the optical field [14] as a function of time, with 30 consecutive traces plotted on top of each other. One can see a phase change of ∼0.08 (5°) during transitions, and a chirp from −0.3 to +0.2, with an averaged absolute value of ∼0.1. Such chirp value is considerably lower than that of silicon modulators with single arm being driven [15], and confirms the effectiveness of our push-pull driving.

 

Fig. 5 Modulator chirp characterizations. (a) Traces of optical field during modulation transitions. (b–d) Time dependence of the optical intensity, phase, and chirp parameter.

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Finally, we characterize the performances of the entire chip by modulating all ten wavelength channels (one by one) in the forward direction. Figure 6 shows ten optical eye diagrams after the AWG multiplexer. The driving condition is the same as Fig. 3(d) except at 25 Gbps because of limited AWG passband width. All modulators exhibit clean and open eyes, with extinction ratios between 5.6 dB to 7.1 dB.

 

Fig. 6 Optical eyes at 25 Gbps for channel #1–10. Scale: 10 ps/div.

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In conclusion, we demonstrate a monolithically integrated multi-channel modulator chip. It has ten traveling wave, low-chirp silicon modulators, each capable of operating at 25 Gbps, and the outputs of which are multiplexed together with a SiN AWG with 100-GHz channel spacing. Cantilevered silica waveguide are also integrated for efficient coupling to cleaved single-mode fibers. Although we are unable to modulate multiple channels simultaneously without proper RF packaging, it has a potential bandwidth capacity of 10 x 25 Gbps with a footprint of only 5 mm x 8 mm.