A cost effective clock recovery scheme simultaneously providing signal performance monitoring is proposed for high speed electrical time domain multiplexing (ETDM) transmission systems to release the bandwidth requirement on the involved electrical devices. In the scheme, we first convert the clock frequency down in the optical domain using electroptic modulation, and then extract the clock with a phase locked loop (PLL) after photo-detection. All the devices involved are operated at frequencies lower than half of the symbol rate. Furthermore, we use a quadrature phase detector in the PLL to create a monitor signal which characterizes the transmitted signal performance in terms of optical-to-noise ratio (OSNR) and accumulated chromatic dispersion (ACD). This scheme is applied to a 112-Gbit/s none-return-to-zero (NRZ) differential quadrature phase shift keying (DQPSK) system. Experimental results show that the clock can be recovered in a dispersion range of −40 to 40 ps/nm, and the evaluated OSNR, over a range of 18~36 dB, has a deviation smaller than 1 dB compared to the measured one based on the optical spectrum method. The bit error ratio remains below 10−9 for 12 hours in the back-to-back case and 2 hours after transmission over 100-km standard single mode fiber (SSMF).
©2011 Optical Society of America
Driven by the ever increasing bandwidth consumption demand, the capacity of backhaul transmission system continuously goes up. The line rate evolves from the initial 10Gbit/s to 40Gbit/s, 100Gbit/s nowadays  and 400Gbit/s in future [2,3]. There are three possible scenarios to increase system capacity including adding new wavelengths, raising the symbol rate and adopting a symbol set with multiple states. The latter two are preferred under the constraint of high spectral efficiency. The approach by increasing the available symbol states contributes logarithmically to the capacity, which seems ineffective when the symbol states are of many. Meanwhile, the required DACs and ADCs for symbol generation and receiving are hard to be realized with both high sampling rate and effective quantization bit . Consequently, the symbol rate of this system cannot reach very high. The typical systems of such kind are the single carrier or multi-carrier systems characterized with the coherent detection and digital signal processing (DSP) techniques [5,6]. The other approach through raising the symbol rate will increase the capacity linearly but also encounters many challenges, such as the demanding of wider bandwidth electrical devices, like amplifier, multiplexer and de-multiplexer, clock recovery unit, wide bandwidth modulator, photo detector and so on, which suffers more serious impairments from the device degradation and transmission environment variation, as well as noise. The typical systems of this type are the traditional intensity-detection on-off keying (OOK) and differential detection differential phase shift keying (DxPSK) systems, characterized with high symbol rate, lack of plenty of DSP [7,8]. These two kinds of systems would co-exist in a long time and evolve to their combination in future, despite the dominance of coherent detection systems at present. One of the most important reasons is that limited by the signal processing power and power consumption of DSP processor, it is impossible to deal with all impairments by digital signal processing, i.e., the required processing capability in real time optical communication surpasses the actual one provided by commercial microprocessor governed by the famous Moore Law. Consequently, the research on the high symbol rate system still offers valuable experience to the future systems.
Compared with the coherent detection systems, the most weakness of the direct detection systems is the lack of DSP that makes these systems like an analog electrical circuit, subject to many kinds of impairments with quite small tolerance. For example, the environment change induced some critical parameters drifting with time would lead to the outrage of system tolerance, resulting in serious degradation [9–11]. To circumvent this problem, we have to introduce the performance monitoring (PMON) and feedback control mechanism to make the system adapt to the environment and keep long-time stable . Therefore, the performance monitoring becomes indispensable for this kind of system. Even for the coherent detection system with DSP, PMON is still required, i.e., in some relay sites without add and drop channels, DSP is not used, but the states of the sites and the performance of the related links as well as the service signal passing transparently are required to be known to make the whole networks manageable .
On the other hand, the timing or clock recovery (CR) is necessary to the high symbol rate direct detection systems , because one symbol is sampled only once to make the symbol decision that requires the sampling rate strictly synchronous to the symbol rate or tracking the symbol rate variation. Lack of DSP, the timing extraction has to be implemented by the hardware running at the symbol rate instead of software algorithm, which casts a great challenge to the clock recovery devices [15–17]. Many methods were proposed to address this issue, among of which phase-locked loop (PLL) with an optical or optoelectronic phase detector is considered as a promising method. However, a wide-bandwidth photodetector (PD) or balanced PD is required in these schemes [18,19]. Besides, they only perform clock recovery but lack of signal performance monitoring, which is becoming more important in high speed transmission and reconfigurable networking.
In this paper, we propose a novel CR scheme to reduce the bandwidth requirement on electrical devices using optical domain down-conversion combined with intermediate frequency phase locked loop (PLL) technique . All the electrical devices used in the CR unit work at frequencies lower than half of the symbol rate, i.e., the required highest frequency is 21 GHz for a 56-Gsymbol/s system. Furthermore, we revise the PLL structure to provide a clock intensity indication signal, which is used for PMON such as the accumulated chromatic dispersion (ACD) and optical signal-to-noise ratio (OSNR) of transmitted signal. This CR and PMON combined unit can reduce the system cost and enhance the system reliability. We demonstrate this CR in a single carrier single polarization 112-Gbit/s NRZ-DQPSK transmission system, realizing 100-km error-free transmission. With the recovered clock, the evaluated OSNR over a range of 16~36 dB, has a deviation smaller than 1 dB from the one measured with the optical spectrum analyzing method; as small as 10-ps/nm dispersion variation can be detected.
2. Principle of the proposed clock recovery
The most common way to extract the transmitted signal timing information is to filter out the clock tone in the signal spectrum. However, the direct implementation to the high symbol rate systems faces such difficulties: 1) high cost of wide bandwidth devices, such as photodiode, electrical amplifier; 2) limited by insufficient narrow bandwidth of clock filter, hardly getting a clock with a high purity resulting in pattern dependent ripples on the clock amplitude and zero-crossing jittering; 3) degradations such as reflection, loss, distortion induced by the limit band width of devices in power division, tapping and filtering processes.
All these difficulties origins from the high frequency of the clock, therefore, we propose to down-convert the clock frequency in optical domain first, and then filter out the down-converted clock with an intermediate frequency PLL, which offers a sufficient narrow bandwidth to overcome the pattern effect. Since the clock frequency is down-converted, all the processes including the photo-detection can be operated at frequencies lower than that of the clock, the bandwidth demand on all the electrical devices is released.
2.1 Proposed clock recovery scheme
The schematic diagram of the proposed CR is shown in Fig. 1 , in which a Mach-Zehnder intensity modulator (MZM) with a proper bias driven by high order harmonic of a voltage control oscillator (VCO), is used as a harmonic mixer to down-convert the frequency of a clock signal to an intermediate frequency (IF). The MZM output containing the difference frequency between the clock and the VCO harmonic is photo-detected as a reference clock to synchronize the VCO by a PLL. If the VCO is locked, the clock is recovered by filtering out the wanted VCO harmonic. Below, we give a specific example for better understanding.
Shown in Fig. 1, an incoming signal contains a clock at a frequency of 8f, where f is an arbitrary positive number. The clock frequency is converted to 2f after the signal passing through the MZM driven by a radio frequency (RF) with a frequency of 3f. Here, the RF is the third harmonic of the VCO and the MZM plays a role as a second order harmonic mixer with its bias set at the null point of the transmittance. The converted clock is used to synchronize the VCO through a PLL working at the frequency of 2f. If the PLL is locked, the VCO is synchronized to the signal clock; hence the timing information can be extracted by filtering out the VCO harmonics. In this case, the frequency of the driving signal is 3/8 of symbol rate; if the available highest frequency is 40GHz, the symbol rate can be scaled to 107Gsymbol/s.
The principle of the frequency down conversion with an MZM can be described by
Here, and are the optical power of the signal input and output from the MZM, respectively; m is the modulation index defined as the ratio of the modulation signal amplitude to the half-wave voltage of the MZM; is the phase shift determined by the MZM bias; is the frequency of the VCO and p is the VCO harmonic order.
The spectrum of the MZM output is expressed as
Equation (2) reveals that after passing the MZM, the input signal spectrum is shifted periodically with an interval of pf0 and added up after being weighted, in which the weight coefficients are determined by the MZM bias and modulation index. We can select the wanted mixing component by maximizing its power through proper setting the MZM bias and the modulation index. For example, to take the second harmonic mixing component, the bias and modulation index are set to meet and , so that reaches its maximum.
For better understanding, we give a comparison of the photo-detected signal power spectrum after MZM shown in Fig. 2 between switching off (a) and switching on (b) the driving signal to the MZM. Limited by the measurable frequency range of our spectrum analyzer, we reduced the symbol rate to 40Gbaud. Accordingly, we could see only a 40-GHz clock tone. When we switched on the 15-GHz driving signal, there were several tones appeared. The strongest tone of 30 GHz was the second harmonic of driving signal because the MZM was biased close to the null point. The second strongest tone of 40 GHz was the original clock tone indicated by (2), while the tone of 10 GHz was what we wanted the mixing product of the clock tone and second harmonic of driving signal. With a PLL, we can synchronize VCO to this tone to realized clock recovery.
The lock range and lock time are functions of the PLL parameters according to PLL theory . For an active filter, the lock range is proportional to the loop gain and the lock time is inversely proportional to the natural frequency. In the configuration of our PLL, the loop gain is about 1000 and the natural frequency is about 60 krad/s, thus, the corresponding lock range is about 2 kHz and the lock time is about several milliseconds.
2.2 Revised CR scheme for performance monitoring
Except the optical domain down-conversion, another feature of the proposed CR scheme is its capability in performance monitoring by providing an indication signal proportional to the recovered clock amplitude. This added functionality is done by replacing the tradition phase detector in the PLL with a quadrature phase detector, which outputs the phase error and the indication signal simultaneously, seen in Fig. 1. There is a 90-degree phase shift between the two outputs of the quadrature phase detector. When the PLL is locked, the phase error on one port approaches zero, whereas the indication signal on the other port is a direct current (DC) signal proportional to the amplitude multiplication of the clock and the VCO like this
Note that most kinds of phase detectors like the XOR gate in digital circuit , optical phase detector [18,19,23,24] and etc can only provide a phase error signal, which is irrelevant to the clock amplitude, hence, they cannot offer CR and PMON functionalities simultaneously.
Compared with the scheme measuring the clock power with a microwave diode, this approach has some advantages: 1) no need of extra power tapping, simplifying the system structure and reducing the power loss; 2) the linearity between the indication signal and the clock amplitude or signal optical power, which makes the OSNR estimation easier.
2.3 Consideration of the harmonic order selection
Some considerations in the harmonic order selection should be taken, which include the available bandwidth or running frequency of the involved devices, power conversion efficiency and system stability. These factors are interact, thus the selection should be trade-off. For example, selecting the higher order harmonic benefits for the devices working at lower frequencies but at a cost of reduced power conversion efficiency; to ensure the system stability, some harmonic orders should be avoided such as the orders that makes the down-converted clock frequency equal to those of the driving RF harmonics, otherwise, the coherent addition of these two components leads to power fluctuation originated from unstable phase shift. Sum up these considerations into a mathematical description as
The first equation implies that the frequency of the down-converted clock must be lower than that of the driving RF to ensure the system stability. The second equation indicates that the frequency of the recovered clock should be multiple times that of the VCO. If we want to recover a clock with a half-symbol-rate frequency, when N takes a value of 2 or 3, according to (4), the minimal value of the (m, n) pair are (2, 3) and (1, 3), respectively, what is the cause we take the values in our example in 2.1.
2.4 Operational range in terms of symbol rate
The operational range on the frequency is mainly determined by the bandwidth of the harmonic band-pass filters (BPF) in the schematic diagram of Fig. 1. Assume the bandwidths of the three harmonic BPFs are all the same of f. The lowest frequency of the VCO is f1 and the highest frequency of the VCO is f2. Any operational frequency must meet the requirement that their harmonic falls into the corresponding harmonic BPF bandwidth, shown in Fig. 3 .
The mathematical expression is below
Then we can get
Therefore, the supported symbol rate variation range is twice the BPF bandwidth at most without replacing of the BPFs. Take f = 7GHz in our experiment as an example, the supported symbol rate falls in 49~63 Gbaud.
3. Experimental setup
A single-polarization 112-Gbit/s NRZ-DQPSK system is built for demonstration with its experimental setup shown in Fig. 4 . The NRZ-DQPSK signal is generated by use of a 56-Gbit/s NRZ and its inverse with a 23-bit time delay driving a dual-parallel MZM. The 56-Gbit/s NRZs output from an electrical multiplexer (Centellax), which multiplexes four 14-Gbit/s NRZ signals coming from a pulse pattern generator output by power division and proper time delay. The NRZ-DQPSK signal passes through either a tunable dispersion compensation module (TDCM) or a transmission link composed of 100-km SSMF and a spool of dispersion compensation fiber (DCF) compensating 80-km SSMF dispersion connected before and after the TDCM, respectively. At the receiver, the signal is amplified and divided into 3 branches after being loaded with ASE noise for OSNR control. One branch is used for BER test after one-bit delay differential demodulation, electrical de-multiplexing, and one of the other two is used for OSNR measuring as a reference by an optical spectrum analyzer (OSA), and the other is used for clock recovery, as well as performance monitoring, respectively, in which the recovered clock at half of the symbol rate is fed into an electrical de-multiplexer for de-multiplexing. The signal power at reference points in the system are shown with corresponding figures in Fig. 4. The total link attenuation is 39 dB, including 20 dB of the transmission fiber, 3.8 dB of the TDCM, 8.5 dB of the DCF and 9 dB of the attenuator. The OSNR of the transmitted signal at the receiver is about 30 dB@0.1nm.
In the CR unit, a VCO working at 7 GHz is frequency-quadrupled to recover the 28-GHz half-symbol-rate clock for de-multiplexing, while its third harmonic is used to drive an MZM biased at the minimal transmittance. The resulted 14-GHz (56-2x3x7) difference frequency signal is photo-detected, amplified and phase-locked to the second harmonic of the VCO by a PLL.
4. Results and discussion
4.1 Clock recovery
The spectrum and waveform of the recovered clock at a frequency of 14 GHz are shown in Fig. 5 , from which the evaluated timing jitter is about 900 fs. The spectra of both the VCO output and the clock when the PLL loop is open are also displayed for comparison in a 100-kHz span. The line width of the recovered clock is comparable with that of the VCO (Agilent 8267D), but a higher pedestal level of the recovered clock (−74 dBc/Hz@50KHz) compared with that of the VCO (−86 dBc/Hz@50KHz) indicates that the clock has a higher relative intensity noise (RIN) and phase noise level. The larger RIN is due to the overlap with the base band signal over the same frequency range, explained by (2); the stronger phase noise attributes to the frequency multiplication.
4.2 ACD monitoring
Figure 6 presents the relation between the monitor signal in voltage and the signal optical power input to the CR in microwatt. Here, the monitor signal is amplified by a low frequency electrical amplifier working in linear area with a cut-off frequency of 1 kHz. The strict linear relation proves that the monitor signal is proportional to the signal power, hence well characterizes the clock amplitude contained in the signal.
The ADC monitoring is based on the fact that the ACD causes signal waveform distortion by quadratic phase shift induced the inter-symbol interference, hence varies the clock intensity contained in the signal. By measuring the monitor signal that is linear proportional to the clock amplitude, we can estimate the ACD.
Figure 7 plots the monitor signal in voltage versus the ACD in ps/nm. It can be seen that at zero-dispersion, the clock power reaches a local minimum and drops sharply after rising a little bit with dispersion increasing (both positive and negative). The detectable dispersion variation is 10 ps/nm and dynamic variation range is ± 40 ps/nm. The explanation is that a small dispersion amount induces the interference occurred at the edges of adjacent two symbols resulting in a higher pulse peak or stronger power variation, but a larger dispersion amount causes the interference spreading into the inside of symbol, making the pulses with phase shifts moving into the opposite directions and destroying the timing information for the random occurrence of these pulses, illustrated by the eye-diagrams in the top insets. The measuring is carried on with three different lengths of the pseudo-random binary sequences (PRBSs) that are 27-1, 211-1 and 231-1. With the same PRBS, we measure twice to examine the results repeatability, once for increasing the dispersion and the other once for decreasing the dispersion. The results demonstrate that the monitor signal well characterizes the clock and reflects the clock power variation in ADC monitoring with a good repeatability and insensitive to PRBS length.
The above conclusion is still valid even for higher order dispersion. Figure 8 presents the simulated clock amplitude of a 56-Gbaud NRZ-DQPSK signal after dispersive transmission. In Fig. 8(a), with the dispersion coefficient fixed to 10 ps/nm/km, we set the dispersion slope to 0.058 ps/nm2/km and 10 ps/nm2/km, respectively. The former is the typical value of SSMF and the latter is impossible for regular fiber. We find that the clock amplitude varies with dispersion amount similarly in these two cases. The feature that the local minimum still appears at the zero dispersion and the maximum occurs at the ± 20-ps/nm dispersion amount is in accord with the experiment result. It is because the dispersion is still the dominant factor for the NRZ-DQPSK signal of an insufficient bandwidth. Even we neglect the dispersion and just consider the dispersion slope, the clock amplitude variation still obeys a similar way with a local minimum appearing at the zero dispersion, as shown in Fig. 8(b). The reason is that no matter what order of dispersion induced the ISI, the clock component is firstly enhanced and then attenuated by distorting the NRZ pulse shape via ISI when it is occurring at the edges of adjacent two symbols to spreading into inside of symbol. Consequently, the proposed PMON technique is applicable to any order of dispersion.
4.3 OSNR estimation
The principle of OSNR measurement is that an accurate estimation of the noise power isolates it from the total optical power, which is often quite larger than the noise power. The isolation dependent on the measuring scheme highly affects the estimated OSNR accuracy. Most OSNR estimation schemes in the optical domain utilize the statistical property difference between the signal and noise, such as polarization degree , spectrum envelope  and etc. However, these schemes sometimes fail due to the complicated application environment lowered the isolation, such as PMD induced signal depolarizing , low polarization degree of the polarization multiplexed signal, spectrum width of the high symbol rate signal comparable to that of the noise in band and etc. Here, we use the clock power as the signal’s finger print to differentiate the noise, considering the negligible contribution of the noise to the clock component.
The implementation of OSNR estimation is like that of the ACD monitoring but with another photodiode to measure the total optical power including both the signal and noise. Besides, we have to define a standard bandwidth to unify various measuring systems of different bandwidths and make their measurements comparable. The standard bandwidth is taken 0.1 nm to be compatible with the current industrial standard, though this bandwidth is insufficient to cover the whole spectrum of high symbol rate signal. Fortunately, the difference of the estimated OSNRs between the standard bandwidth and the signal bandwidth is only a scaling factor, if the signal is statistically stable and the noise is white.
The estimated OSNR based on clock power measurement is expressed as
Here, k and d are the slope and intercept of the linear relation between the monitor signal voltage and signal optical power, respectively; is the scaling factor related with the ratio of the OSNRs in 0.1nm to the one in the whole signal bandwidths; Pt is the measured total optical power including the noise. The parameters k, d and are estimated by curve fitting.
Figure 9 gives the total power and monitor signal variations with OSNR decreasing by raising the noise level at fixed signal power, where the total power represented by the full symbol lines increase with increasing noise; the monitor signal denoted by the hollow symbol lines keep constant irrelevant to noise changing. The results prove that these two parameters differentiate the noise from the signal effectively. We can estimate the parameter using the equality of , where the subscripts i and j are the index of any two different points on a full symbol line.
With the estimated parameters, the predicted OSNRs by (7) against the ones measured by the popular optical spectrum analysis method at three different signal power levels are plotted in Fig. 10 . That the excursion is smaller than 1 dB over a range of 16~36 dB indicates the accuracy, robustness and with a large dynamic operation range of the proposed scheme compared with the other OSNR monitoring schemes . The larger excursion at higher OSNR is attributed to a larger uncertainty of the tiny power variation captured by PD.
4.4 BER measurement
Figure 11 shows the averaged BER of the de-multiplexed tributaries versus OSNR at different ACDs. The test data is a PRBS with a length of 27-1. If the value of the ACD is within ± 20 ps/nm, lower than 1e-9 BER performance can be realized but with an OSNR penalty larger than 5dB, which is attributed to the dispersion induced eye closing of the differential demodulated eye diagrams as well as the polarization dependence of the TDCM and DI, shown in the bottom insets of Fig. 7. This result convinces us that the accurate monitoring and compensation of ADC is indispensable for high symbol rate transmission systems without DSP.
Figure 12 plots the BER versus the received optical power in front of the DI at different OSNRs in the case of completed dispersion compensation; the insets show the demodulated eye diagrams before and after transmission. Larger than 11-dBm optical power is required to achieve a BER below 10−9; such high power level accounts for the 3-dB insertion loss of the DI, 0.6-A/W responsivity of the PIN detector and 200-mV peak-to-peak voltage sensitivity of the electrical de-multiplexer. The signal OSNR before and after transmission is 40 dB and 30.8 dB, respectively. Compared to the back-to-back case with a higher OSNR, the transmission power penalty is smaller than 1 dB@BER = 10−9; but the difference becomes negligible in comparison with the back-to-back case with the same OSNR. The little better performance of the transmitted signal is attributed to the uncertainty of the measured OSNR with the optical spectrum analysis method. The results indicate that the dispersion of the transmission link is almost compensated without notable ADC induced signal distortion, illustrated by the eye diagram in the inset. This minor difference of the relations between the BER and OSNR before and after transmission shown in Fig. 13 also supports this conclusion.
All the BERs measured correspond to the I signal, which is the output of the DI with a phase shift. We discriminate it from the Q signal (DI with a phase shift) by matching the predicted receiving sequence, which is calculated given the modulating signals and their time delay, as well as the phase shift of the DI. The BER difference between the I and Q signals is tiny, i.e., different in the first number after the decimal point in our experiment. Because the amplitude of the I and Q signals are nearly the same in the balanced detection, and the difference between their eye diagrams is just polarity inverted. The main contribution to the BER difference comes from the different optimal decision thresholds if they deviate from zero. Therefore, the BER difference can be reduced to negligible by optimizing the decision threshold for the I and Q signal detector, respectively. That is why we use the BER of the I signal to characterize the whole system.
To release the bandwidth requirement on the electrical devices in high symbol rate transmission systems, we propose and demonstrate a CR scheme simultaneously providing multi-impairment monitoring in a single-polarization 112-Gbit/s NRZ-DQPSK system, in which the required highest frequency of the devices in the CR unit is 21 GHz. The scheme uses electro-optical modulation for frequency down-conversion and quadrature-phase detection to generate a monitor signal to characterize the transmitted signal performance in terms of OSNR and ACD. It is expected that the CR scheme would be used in high speed transmission systems for its low cost and multi-functionalities.
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