An ultracompact integrated silicide Schottky barrier detector (SBD) is designed and theoretically investigated to electrically detect the surface plasmon polariton (SPP) propagating along horizontal metal-insulator-silicon-insulator-metal nanoplasmonic slot waveguides at the telecommunication wavelength of 1550 nm. An ultrathin silicide layer inserted between the silicon core and the insulator, which can be fabricated precisely using the well-developed self-aligned silicide process, absorbs the SPP power effectively if a suitable silicide is chosen. Moreover, the Schottky barrier height in the silicide-silicon-silicide configuration can be tuned substantially by the external voltage through the Schottky effect owing to the very narrow silicon core. For a TaSi2 detector with optimized dimensions, numerical simulation predicts responsivity of ~0.07 A/W, speed of ~60 GHz, dark current of ~66 nA at room temperature, and minimum detectable power of ~-29 dBm. The design also suggests that the device’s size can be reduced and the overall performances will be further improved if a silicide with smaller permittivity is used.
© 2011 OSA
Continuous increase in speed and bandwidth of modern electronic circuits requires integration of optical devices to overcome the interconnection bottleneck . However, the conventional silicon electronic photonic integrated circuits (EPICs) face a fundamental challenge, i.e., the dimension mismatch between the nanometer scale of electronic components and the micrometer scale of optical components originated from the diffraction limit . Plasmonics, which deals with surface plasmon polariton (SPP) exciting and propagating at metal-dielectric interfaces, can confine the optical mode into a nanometer scale, thereby providing a great potential to meet the above challenge [3,4]. Recently, a number of ultracompact plasmonic devices have been proposed and/or demonstrated to generate , guide [6,7], modulate , and detect [9,10] the SPP signals. However, most of them require a non-standard complementary metal-oxide-semiconductor (CMOS) technology for fabrication, e.g., (1) Au or Ag, — which is not the CMOS-compatible material, is commonly used as the metal for plasmonics; (2) a special process, such as electron beam or ion beam lithography, is usually required to fabricate the nanostructure; and (3) an unique active material is usually involved in the active devices, such as CdSe quantum dot (QD) , Ge [12–14], or GaAs , etc. In the view of seamless integration of nanoplasmonic devices into the existing Si EPICs, it is highly desirable to use the fully CMOS compatible materials (e.g., Al, Cu, or silicide, etc.) and the industry-standard lithograph process. To meet these requirements, a horizontal metal-insulator-Si-insulator-metal nanoplasmonic slot waveguide with relatively low propagation loss was developed recently, in which Al or Cu was used as the metal and the Si core as narrow as 20 nm was fabricated using the standard UV lithography and dry etching processes [15,16]. Various passive plasmonic devices including couplers, bends , splitters , and waveguide-ring resonators have been experimentally demonstrated based on the above waveguide. Moreover, a nanoplasmonic modulator based on the above waveguide has been proposed and theoretical investigated . It is therefore necessary to also develop a detector which converts the SPP signal propagating along the above waveguide directly to the electrical signal to provide a complete plasmonic-electronic nanocircuit.
In Si integrated photonics, germanium is commonly used to detect the 1550-nm optical signal due to its 0.8-eV direct band gap . However, a relatively large Ge active layer is necessary for sufficient light absorption in the conventional Ge detectors because of the relatively small absorption coefficient of Ge at 1550 nm (~0.046 µm−1). To shrink the detector into the nanometer scale, — which is the requirement for a nanoplasmonic detector, a precise cavity or antenna structure should be developed to confine the light into a small volume [12,13,20]. However, although the technology of Ge heteroepitaxy on Si has been well developed, heteroepitaxy of Ge on Si is still an expensive process. Moreover, it will make the whole fabrication flow of the integrated circuits complex and difficult, especially accompanied with the fabrication of a nano-cavity or antenna structure. On the other hand, silicide Schottky barrier detector (SBD) has been demonstrated as an attractive alternative to detect near infrared signal , in which light absorbed by the silicide layer excites hot carriers in the silicide layer and these hot carriers may emit over the Schottky barrier (ΦB) to silicon and be collected as photocurrent. Because silicides have a large absorption coefficient, typically ~20−50 µm−1 at 1550 nm, the silicide SBD can be inherently much smaller than the Ge-counterpart for sufficient absorption, thus enabling to be scaled down to the nanometer scale. More importantly, the fabrication of silicide SBD is fully CMOS compatible, thus enabling to be seamlessly integrated in the existing Si EPICs. However, the conventional silicide SBD suffers a major shortcoming of low responsivity due to the low internal quantum efficiency, namely the low emission probability of photoexcited carriers from silicide to Si . To improve the internal quantum efficiency, one needs to (1) reduce the Schottky barrier height; and (2) thin down the silicide thickness to be much smaller than the hot carrier attenuation length in silicide, typically < ~3 nm. However, these two approaches suffer their own disadvantages. (1) The reduction of ΦB leads to an increase of the dark current unless the detector is operated at cryogenic temperature. For example, a PtSi/p-Si Schottky detector (ΦB ~0.21 eV) was demonstrated to have responsivity of ~0.25 A/W at 1550 nm, but it needs to operate at 40 K . A suitable ΦB should be chosen to balance the responsivity and the dark current. However, ΦB is mainly determined by the silicide itself. It can only be tuned over a very limited range by the external voltage in the conventional silicide/Si configuration. (2) The thinning-down of silicide thickness will degrade the light absorption efficiency even putting the absorbing silicide layer on the Si waveguide . For example, a Si waveguide-based NiSi2/p-Si Schottky detector requires a long NiSi2 layer on the Si waveguide for a certain light absorption ratio when the NiSi2 thickness reduces from 16 nm to 5 nm . It indicates that one of the main advantages of silicide SBD (i.e., the ultracompact footprint) will be abated when the absorbing silicide layer becomes very thin.
In order to overcome or at lease alleviate the above two issues, a new design of silicide detector is proposed in this work, as shown schematically in Fig. 1(a) , which combines the Si waveguide-based silicide SBD and the recently developed horizontal metal-insulator-Si-insulator-metal nanoplasmonic slot waveguide. The detector contains three parts whose cross sections are shown in Figs. 1(b), 1(c) and 1(d), respectively. The first part is the horizontal metal-insulator-Si-insulator-metal nanoplasmonic slot waveguide which supports a propagating SPP signal with relatively low propagation loss. The second part has a horizontal metal-insulator-silicide-Si-silicide-insulator-metal configuration for absorption of the SPP signal, which is defined as the absorber of the detector. The third part has a horizontal metal-silicide-Si-silicide-metal configuration to connect the external electrodes, which is defined as the contact of the detector. The silicide thickness in the third part is much thicker than that in the second part to prevent metal diffusion into the Si core. The proposed silicide detector offers the following advantages.
- (1) The silicide layer can be fabricated using the well-developed self-aligned silicide (SALICIDE) process [24,25]. For example, after a SiO2 window opening to expose the sidewall Si, a thin metal (such as Ta, Ni, Ti) layer is deposited, followed by rapid thermal annealing to form silicide. The silicide thickness can be precisely controlled by the annealing temperature. Then, the un-reacted metal can be removed by wet etching in a chemical solution such as the hot Piranha solution. The silicide SBD is self-aligned to the nanoplasmonic slot waveguide and it can be seamlessly integrated in the existing silicon EPICs.
- (2) By choosing a silicide with suitable optical parameters, the SPP mode can be concentrated in the thin silicide layer so that the SPP power can be effectively absorbed even the silicide layer is very thin (e.g., ~1-2 nm), as will be revealed in this paper. The small silicide area benefits a small dark current, or tolerates a low ΦB to improve the responsivity for a certain dark current.
- (4) A very high speed can be reached owing to the ultracompact structure.
In the above design, various metals, silicides, and insulators can be chosen. To make the devices fully CMOS compatible, Cu is chosen as the metal for the proposed detector because it has been experimentally demonstrated that the propagation loss of Cu-SiO2-Si-SiO2-Cu nanoplasmonic slot waveguide around 1550 nm is much smaller than that of the Al-counterpart , and various Cu-waveguide based passive plasmonic devices have been experimentally demonstrated [16,17]. At the beginning, SiO2, Si3N4, and various silicides are considered. Then, a suitable one will be selected for further analysis.
The remainder of the paper is organized as follows. Section 2 describes the 2-dimensional (2-D) optical simulation method using the commercial software FullWAVE from RSOFT . Section 3 investigates the absorption of Cu-insulator-silicide-Si-silicide-insulator-Cu waveguide. Section 4 predicts the internal and external quantum efficiency of the plasmonic detector based on Scales’ model . Section 5 estimates the dark current and the speed of the plasmonic detector based on simple calculations. Finally, the key findings are summarized in Section 6.
2. Optical simulation method
The FullWAVE from RSOFT, which is based on a finite-difference time-domain (FDTD) method, is used in this work. A very fine and un-uniform grid, e.g., 0.5 nm at the bulk and 0.1 nm near the interface, is set to accurately capture the field change around the very thin silicide layers. Because the 3-D FDTD simulation with such a fine grid size needs a very long computational time, the 2-D FDTD simulation is used in this work for simplification, which corresponds to an infinite height of device in the y-axis. Since the dependence of optical properties on the height of plasmonic slot waveguides becomes weak when the height is large enough, e.g., > ~0.3 µm [17,29], the 2-D simplification will not cause a remarkable error for the proposed detector with a typical height of ~0.34 µm. A fundamental 1550 nm transverse electric (TE) light (the electric field is parallel to the x-axis) is launched at the plasmonic slot waveguide to excite the SPP signal and then propagate through the detector. A perfectly matched layer (PML) is used to attenuate the field within its region without back reflection. The build-in material’s parameters in RSoft are used, i.e., the complex refractive index of Cu at 1.55 µm is 0.606 + 8.92i, the refractive indices of SiO2, Si3N4 and Si are 1.44, 2.0, and 3.45, respectively. Various silicides are considered, as listed in Table 1 . Their complex refractive indices (n + ki, where n is the real component and k is the imaginary component) at 1550 nm are cited from literature [30–33]. It should be noted that the above indices of silicides were measured on the Si (100) surface, whereas silicide in the proposed detector is on the Si (110) surface (i.e., the sidewall of Si waveguide). It has been reported that both the electrical and optical properties of silicide may depend on the Si orientation [33,34]. This possible orientation dependence is ignored in this study for simplification. Moreover, since a certain part of Si (depending on the silicide itself) is consumed during solid-state reaction of the as-deposited metal and Si, the width of Si core in the detector region will be naturally smaller than that in the waveguide region when it is fabricated by the SALICIDE process. Here, we simply assume that a (Wsilicide/2)-thick Si is consumed to form a Wsilicide-thick silicide for all silicides, i.e., the Si core width (WSi) in the waveguide region becomes (WSi – Wsilicide) in the detector region.
3. SPP power absorption
The absorber of the proposed detector has a Cu-insulator-silicide-Si-silicide-insulator-Cu configuration, which can also be regarded as a plasmonic waveguide generally. SiO2 is first considered as the insulator because various Cu-SiO2-Si-SiO2-Cu based passive nanoplasmonic devices have been experimentally demonstrated [16,17]. Figure 2 shows the map of propagation loss (in dB/µm) of such a waveguide verse n and k of silicide. The parameters of the waveguide are set as follows: WSilicide = 5 nm, WSi = 50 nm (thus, the actual Si core width is 45 nm), and WSiO2 = 10 nm. The n and k of silicide vary from 1 – 6 and 0 – 5.5, respectively, which cover most of known silicides. For comparison, the nanoplasmonic slot waveguide without the silicide layer (i.e., the standard Cu-SiO2-Si-SiO2-Cu waveguide) has the calculated propagation loss of ~0.85 dB/µm, roughly in agreement with the experimental data, where ~0.63 dB/µm propagation loss was measured on the Cu-SiO2-Si-SiO2-Cu waveguide with Si core width of ~21 nm and the sidewall SiO2 thickness of ~12 nm . We can see that the propagation loss of the waveguide with silicide depends strongly not only on k of silicide, but also on n of silicide. This behavior can be explained by the continuity of electric displacement normal to the interfaces, as explained below. Figure 3 shows the y-component magnetic field (Hy) distributions along the waveguide (z-direction) and the x-component electric field (Ex) along the cross section of the waveguide for silicide with index of 1.0 + 1.5i and silicide with index of 4.0 + 5.0i. Due to the continuity of electric displacement normal to the interfaces, we have the boundary conditions:Fig. 3(b), which leads to a quick attenuation of the propagating SPP signal, as revealed in Fig. 3(a). On the other hand, for silicide with index of 4.0 + 5.0i, |εsilicide| = 41 is larger than εSi, which leads to a small electric field in the silicide region, as shown in Fig. 3(d), and a slow attenuation of the propagating SPP signal, as shown in Fig. 3(c).
Unlike the conventional plasmonic waveguide for SPP propagation whose propagation loss is as smaller as better, the requirement for the absorber is that its propagation loss is as larger as better. From Fig. 2, we can see that TaSi2 is the best silicide among those listed in Table 1. Fortunately, TaSi2 is also a silicide which has been well developed and is fully compatible with the standard CMOS technology [35,36]. Moreover, we can see from Fig. 2 that a silicide with small permittivity can provide much large propagation loss. For example, a silicide with index of 1 + 1.5i can provide a propagation loss ~3.5 times larger than TaSi2. Here, we define such a silicide as an ideal silicide. Since the complex index of silicide is mainly determined by silicide material property , it is expected the complex index of silicide may be tailored by alloying two or even three silicides, i.e., the ternary or quaternary silicides may have different index as compared with the individual silicides . The electrical properties of various ternary have been reported , but the optical properties of ternary or quaternary silicides are still lack. However, owing to the wide possibility of various ternary or quaternary silicides, we suspect such an ideal silicide (i.e., with small permittivity at 1550 nm) may be reachable. Moreover, based on the same mechanism, the permittivity of insulator is as large as better for the SPP absorption. The propagation loss map of Cu-Si3N4-silicide-Si-silicide-Si3N4-Cu waveguide verse n and k of silicide is also generated, which looks very similar with Fig. 2 (thus not shown here) but with a larger propagation loss. For instance, the propagation loss for silicide with index of 1 + 1.0i increases from 20 to 35 dB/µm and that for TaSi2 increases from 4.07 to 7.87 dB/µm by replacing SiO2 with Si3N4 as the insulator. Because Si3N4 is also an insulator commonly used in the standard CMOS technology, we choose Si3N4 as the insulator and TaSi2 as the silicide for the proposed detector in the later analysis.
In the above plasmonic waveguide with silicide, the SPP power can be absorbed in Cu, insulator, silicide, and Si core. Obviously, only that absorbed in the silicide region can contribute the photocurrent. Therefore, an effective absorption (A) of a Labs-long absorber can be expressed as follows:Table 1.
From Table 1, we can see that the smaller permittivity of silicide not only results in a larger propagation loss, but also the ratio of power absorbed in the silicide layer due to the power confinement in the silicide region. Meanwhile, we can see that the SPP signal propagating along the horizontal nanoplasmonic slot waveguide can be effectively coupled into the detector.
4. Quantum efficiency
The proposed detector has a horizontal silicide-semiconductor-silicide structure, whose band diagram is shown schematically in the inset of Fig. 4 . Under a positive bias (V), the left silicide/Si Schottky contact is reversely biased and the right silicide/Si Schottky contact is forwardly biased for electrons, and vice versa for holes. We assume that the left and right silicide layers absorb SPP power equally owing to the symmetrical structure of the proposed detector. The hot electrons excited in the left silicide layer emits through Φn to the Si core and then be collected by the right silicide layer, whereas the hot holes excited in the right silicide layer emits through Φp to the silicon and then be collected by the left silicide layer. Due to the narrow Si core width, the Si core is fully depleted under the bias and the constant electric field cross the Si core is given by V/WSi. The Schottky effect predicts a decrease of both Φn and Φp by Figure 4 depicts the internal quantum efficiency (ηi) of thin-film silicide/Si Schottky-barrier detector for various ΦB, calculated based on Scales’s model . We can see that ηi increases dramatically with ΦB lowering and silicide thickness reducing. The maximum ηi reaches to in the case of t/L → 0.
The external quantum efficiency (ηe) is given by:
Figure 5 depicts the absorption and the external quantum efficiency as a function of the TaSi2 thickness. The other parameters of the detector are set as follows: WSi = (50 nm – WTaSi2), WSiN = 10 nm, Labs = 1 or 2 µm, and the hot carrier attenuation length (L) is assumed to 100 nm . In the case of Labs = 1 µm, the increase in A and the decrease in ηi with WTaSi2 increasing leads to a maximum ηe at WTaSi2 of 2–3 nm. Whereas in the case of Labs = 2 µm, ηe is mainly limited by ηi, thus it increases monotonically with WTaSi2 decreasing. For a TaSi2-detector with WTaSi2 = 2 nm and Labs = 2 µm at the 1-V bias (thus, the effective ΦB is 0.55 eV for electron and 0.45 eV for hole), the overall ηe ()is calculated to be ~0.056, which corresponds to a responsivity of ~0.07 A/W. The responsivity increases with the applied voltage increasing due to ΦB lowering, but the dark current also increases. On the other hand, for the detector with the ideal silicide (assuming it has the same barrier height as TaSi2), A is ~0.69 in the case of Labs = 1 µm and Wsilicide = 2 nm, then the overall ηe is ~0.08 and responsivity is ~0.1 A/W at the 1-V bias.
Figure 6 depicts the propagation loss (the left axis) and the SPP power absorption in the silicide region (the right axis) as a function of Si core width (WSi) for absorbers with fixed WSiN of 10 nm and fixed WTaSi2 of 3 nm. Here, the real Si core width in the absorber is WSi – WTaSi2, as the abovementioned. For comparison, the propagation loss of Cu-Si3N4-Si-Si3N4-Cu plasmonic slot waveguide is also shown. Both the propagation loss and the power absorption in the silicide region increase monotonically with WSi decreasing. Therefore, the required Labs for a certain ratio of absorption can be reduced with WSi decreasing, so that the detector with a narrower Si core can be expected to have a better performance. Meanwhile, the propagation loss of conventional nanoplasmonic slot waveguide (i.e., without the silicide layers) also increases with WSi decreasing. The Si core width should be finally determined by the real application of the nanoplasmonic circuit. Here we just set it 50 nm. Figure 7 depicts the propagation loss (the left axis) and the SPP power absorption in the silicide region (the right axis) as a function of Si3N4 width (WSiN) for absorbers with fixed WSi of 50 nm and fixed WTaSi2 of 3 nm. Both the propagation loss and the power absorption in the silicide region increase monotonically with WSiN decreasing. The propagation loss of Cu-Si3N4-Si-Si3N4-Cu plasmonic slot waveguide is also shown as a function of WSiN for comparison. It indicates that WSiN is as thin as better for the proposed detector. WSiN as thin as ~1-2 nm is reachable in fabrication. However, the Si3N4 layer should be thick enough to prevent Cu diffusion into the Si core during subsequent processing. Again, the final insulator thickness should also be determined by the real application of the nanoplasmonic circuits. Here we just set it 10 nm.
5. Dark current and speed
The proposed detector actually is two Schottky diodes connected back-to-back. The total dark current is composed of both electron current and hole currents as follows :40], is then calculated to be ~-29 dBm. For the detector with the ideal silicide (Labs = 1 µm and the other parameters are the same as the TaSi2-detector), Idark becomes ~39 nA and Smin becomes ~-33 dBm.
The speed of the detector is determined by the time of hot carriers transiting cross the Si core and the RC delay. Assuming the drift velocity of carriers is 1 × 107 cm/s in Si, the transit time is estimated to be ~0.5 ps for WSi = 50 nm, which corresponds to a THz cutoff frequency. Therefore, the speed of the proposed detector is mainly limited by the RC delay, which is defined as
The capacitance (C) of the TaSi2-detetctor is calculated to be ~1.75 fF using the simple parallel-plate model. Assuming resistvity (ρ) of TaSi2 is ~40 µΩ⋅cm, the TaSi2 film with length of 2 µm and thickness of 2 nm has a sheet resistance (R) is ~1.3 kΩ. Then, the cutoff frequency is estimated to be ~68 GHz. For the detector with the ideal silicide, assuming the same resistivity of 40 µΩ⋅cm, both R and C reduce due to its short Labs, whose cutoff frequency is then estimated to be ~228 GHz. It should be pointed out that the capacitor of nanoplasmonic waveguide is ignored in the above simple estimation. The waveguide capacitor can be regarded as a parallel-plate capacitor with multilayer dielectrics of insulator, Si, and insulator, whose capacitance depends on the wavelength length (which depends on the real application of the nanoplasmonic circuits), the Si core width, and the insulator thickness. In the case of 5-µm waveguide, 50-nm Si core width, and 5-nm Si3N4 thickness, the waveguide capacitance is calculated to be ~2.22 fF, then, the speed of the TaSi2 detector will be reduced to ~30 GHz.
Moreover, based on the results of Figs. 6 and 7, we can know that the required Labs for a certain ratio of absorption can be reduced with the Si3N4 thickness and/or the Si core width decreasing. The short Labs can both reduce the dark current and improve the speed of the proposed detector.
In summary, a silicide Schottky-barrier detector is designed to directly detect SPP signal propagating along a horizontal metal-insulator-Si-insulator-metal nanoplasmonic slot waveguide, which can be easily and seamlessly integrated in the existing Si EPICs. An ultrathin silicide layer inserted between the insulator and the Si core can effectively absorb the SPP power if a suitable silicide is chosen, and the Schottky barrier height can be widely tuned through the Schottky effect owing to the silicide-Si-silicide configuration with very narrow Si core. TaSi2 is found to be the best silicide among the known silicides due to its lowest permittivity and Si3N4 is better than SiO2 as the insulator because of its larger permittivity. A TaSi2 detector with WSiN = 10 nm and WSi = 50 nm exhibits responsivity of ~0.07 A/W, dark current of ~66 nA at room temperature, and speed of ~60 GHz. The performance can be further improved by reducing the Si core width and the SiN width. In addition, if a silicide with lower permittivity is used, − which may exist in some ternary or quaternary silicides, the performance of the proposed detector can be dramatically improved.
This work was supported by Singapore SERC/A*STAR Grant 092-154-0098.
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