## Abstract

When silicon strip and slot waveguides are coated with a 50nm amorphous titanium dioxide (TiO_{2}) film, measured losses at a wavelength of 1.55 *μ*m can be as low as (2 ± 1)dB/cm and (7 ± 2)dB/cm, respectively. We use atomic layer deposition (ALD), estimate the effect of ALD growth on the surface roughness, and discuss the effect on the scattering losses. Because the gap between the rails of a slot waveguide narrows by the TiO_{2} deposition, the effective slot width can be back-end controlled. This is useful for precise adjustment if the slot is to be filled with, e. g., a nonlinear organic material or with a sensitizer for sensors applications.

©2011 Optical Society of America

## 1. Introduction

Silicon photonic waveguides have gained a lot of interest over the past years. Mature processes are available for fabricating electronics using the silicon platform, and it is highly promising to exploit the same technology also for photonics at wavelengths near 1.55 *μ*m. We consider two basic waveguide types, namely strip and slot waveguides. Both are high index-contrast structures, where light is confined either in the high-index material of the strip, or in the low-index material that fills the gap of slot waveguides [1, 2]. Our strip and slot waveguides were fabricated on silicon-on-insulator (SOI) wafers, where the index contrast between silicon (Si) with a refractive index of *n*
_{Si} = 3.48 and silicon dioxide (SiO_{2}) with *n*
_{SiO2} = 1.46 amounts to Δ*n* ≈ 2.0. This requires very tight tolerances for the fabrication, and puts stringent conditions for the sidewall roughness of the waveguides. Even with 193nm deep-UV lithography these requirements are hard to meet. For slot waveguides, a well-defined slot width of about 100nm has to be realized in addition. The requirements for an accurate smooth slot are especially high for sensor applications, where the slots are usually filled with air or a watery solution [3, 4]. To solve these problems, we previously suggested using conformal atomic layer deposition (ALD) for coating slot waveguides with amorphous titanium dioxide (TiO_{2}) [5]. We also investigated the waveguiding properties of amorphous ALD-TiO_{2} slab waveguides, and measured a refractive index of *n*
_{TiO2} = 2.27 at 1.55 *μ*m [6].

In this paper, we demonstrate to which extent the losses of strip and slot waveguides can be reduced when covering them with a thin TiO_{2} layer, and in particular we show the first experimental characterization of slot waveguides with ALD controlled slot dimensions. We briefly discuss the influence of surface roughness, and the beneficial effect an ALD-grown layer has on the surface profile. We show how ALD coating with TiO_{2} makes otherwise non-guiding slot waveguides work properly, and how the mode properties change as a function of coating thickness. The reduced loss and the possibility to control the slot width are of special advantage for nonlinear silicon-organic hybrid (SOH) slot waveguides [7, 8].

## 2. Surface roughness and loss

Waveguide losses are mainly due to sidewall surface roughness and to leakage into the substrate, if the optical field is not sufficiently guided. In addition, surface states at the uncovered waveguide boundaries can lead to excess absorption. We believe that absorbing surface states are not prominent in our case, because then the thickness of the TiO_{2} cover should not influence the loss. However, in Section 5 we show experimentally that a larger cover thickness actually reduces the loss, and this can be explained by the resulting reduction of the surface roughness. Therefore, we concentrate in the following on the influences of waveguide roughness and of leakage into the substrate.

Surface roughness leads to scattering losses, and a detailed theoretical description backed up with experiments has been published for the case of high index-contrast three-dimensional strip waveguides by Poulton et al. [9]. Intuitively understandable guidelines were given for fabricating low-loss waveguides.

For the simpler case of two-dimensional slab waveguides, a coupled-mode formalism was developed [10]. While this theory is only applicable for strips having a high aspect ratio and therefore closely resembling a symmetric slab, it is still instructive to see the tendency from the closed-form relation for the loss coefficient *α* (unit cm^{−1}) [10],

*φ*(

*d*) is the normalized modal field ( ${\int}_{-\infty}^{+\infty}{\varphi}^{2}(y)\hspace{0.17em}\text{d}y\hspace{0.17em}=\hspace{0.17em}1$) at the core-cladding boundary

*y*= ±

*d*of the symmetric slab waveguide having a width 2

*d*. Core and cladding refractive indices are denoted as

*n*

_{1}and

*n*

_{2}, respectively,

*k*

_{0}=

*ω/c*is the free-space wavenumber for an angular frequency

*ω*and the vacuum speed of light

*c*, the so-called spatial power spectrum

*Ř*(

*θ*) is the Fourier transform of the surface roughness autocorrelation function

*R*(

*u*), and

*β*is the modal propagation constant. This formula has been used in several publications assuming an exponential autocorrelation function and thereby explaining measured losses in Si waveguides [11–14]. It has also been demonstrated that silicon oxidation can be used to reduce the surface roughness and losses of strip waveguides [12, 13], although a part of the reduction probably came from the reduced silicon core thickness and effective index of the mode. However, oxidation is not a suitable method for smoothing silicon slot waveguides as the already too wide slots would get even wider.

Silicon nanophotonic waveguides are typically fabricated on silicon-on-insulator (SOI) wafers with a buried oxide (BOX) thickness of 2 *μ*m. If the strips are dimensioned such that even the fundamental mode is only weakly guided, its modal field tunnels through the BOX layer into the Si substrate. The resulting loss was calculated for the cases of square Si waveguides [15] and slot waveguides [16].

On the other hand, scattering losses for square Si strip waveguides are found to have a maximum, when the effective index *n*
_{eff} = *β/k*
_{0} of the fundamental mode is close to *n*
_{eff} = 1.7 [17]. For *n*
_{eff} < 1.7, the waveguide fields are less confined to the strip, which means that the electric field at the core-cladding boundary (*φ*(*d*) in Eq. (1)) and therefore the loss coefficient *α* become smaller.

## 3. Atomic layer deposition of TiO_{2} for reducing surface roughness

Atomic layer deposition (ALD) is a chemical gas phase vapor deposition process. Substrates are placed in a deposition chamber where temperature, pressure and other parameters are appropriately chosen for the process chemistry and the targeted layer properties. Two (or more) chemicals are then supplied sequentially to the inert gas flowing through the deposition chamber to form a single monolayer of material when reacting with each other on the target surface. This monolayer deposition represents one cycle of the process. The number *τ* = 0, 1, 2, ... of deposition cycles determines the final layer thickness. For deposition of TiO_{2}, we used an ALD process with titanium tetrachloride (TiCl_{4}) and water as precursors. A detailed explanation is found in [6].

The conformal change of an initial surface height geometry *h*(*x*, 0) due to the cyclic growth of ALD monolayers is described as a function of position *x* and cycle number *τ*. Because of the large number of ALD monolayers per final layer, the cycle number *τ* can be regarded as a continuous “time” variable. We write

*v*is the ALD growth rate, and

*vτ*is the resulting thickness of the final layer. For visualizing the ALD growth of materials like amorphous TiO

_{2}or Al

_{2}O

_{3}, a typical growth rate of

*v*= 0.1nm/cycle was chosen. For the surface to be covered, we assumed an exponentially distributed initial height profile

*h*(

*x*, 0) with an autocorrelation length

*L*= 15nm and a root-mean-square (RMS) roughness of

_{c}*σ*= 5nm. We solved Eq. (2) with a finite difference scheme.

The height profiles *h*(*x*) and the RMS roughnesses *σ* are shown in Fig. 1 for various thicknesses of the deposited layers in steps of 10nm. Each additional 10nm layer makes the surface smoother. The smoothing effect is strongest for the highest spatial frequencies of the initial height profile, while the smoothing for lower spatial frequencies is less effective.

## 4. Measurements

The loss reduction was demonstrated experimentally with various silicon strip and slot waveguides. The investigated waveguides were fabricated on SOI wafers using the ePIXfab shuttle service [18].

The SOI wafers had a device layer thickness of 220nm and a 2 *μ*m thick BOX. Grating couplers were used to couple light in and out of the strip waveguides, which were either directly measured or coupled with appropriate adiabatic, virtually lossless transitions to slot waveguides. The losses from coupling external fibers through grating couplers to the silicon strip waveguides were estimated by comparing transmission through reference waveguides (∼ 450nm wide strip waveguides) to the direct fiber-to-fiber transmission. The losses from grating couplers of chips from the same waveguide fabrication run (but without ALD coating) were determined by separating them from waveguide losses in a cutback measurement. The losses from grating couplers were estimated to be the same for the TiO_{2} coated chips (2 × 5.5dB), and the actual losses from waveguides were estimated by deducting the reference difference and the grating coupler losses from the measured transmitted power and dividing the result by the waveguide length. For slot waveguides, also the loss from short strip waveguide sections was deducted. The lengths of strip waveguides were 5.5mm and the lengths of slot waveguides were 4mm (+1.9mm strip waveguide feeding sections). For all loss measurements, we excited the quasi-TE fundamental mode at a wavelength of 1.55 *μ*m.

For the investigated strip and slot waveguides we estimated the actual geometry from scanning electron microscope (SEM) images. The strip waveguide widths varied in the range 161 ...450nm. The slot waveguides had rail widths in the range 177...226nm and slot widths of 150...231nm. The SEM image of a slot waveguide cross-section with a designed rail width 260nm and a slot width 140nm is shown in Fig. 2. The actual rail and slot widths measured from the SEM image are 214nm and 191nm, respectively. Not for all the investigated waveguides we could check the geometry with SEM images. The actual dimensional data for the slot waveguides were interpolated with a straight-line fit using the values for rail widths, slot widths, and coating thicknesses, which could be measured from the available SEM images. The estimated dimensional data for the slot waveguides can be found in Table 1. The RMS error in the fitting compared to the dimensions from the SEM images was ±5nm, which is also close to the accuracy of dimensional measurements from the SEM image. The maximum deviation from the dimensions is estimated to be ±9nm.

As a measure of the field confinement, we calculate the effective indices *n*
_{eff} using the film-mode matching (FMM) method [19] for all investigated waveguides and layer thicknesses, using the actual waveguide geometry (*w _{r}* and

*w*in Table 1) and refractive indices

_{s}*n*

_{Si}= 3.48,

*n*

_{SiO2}= 1.46, and

*n*

_{TiO2}= 2.27. While

*n*eff is a simple and useful indicator for the field confinement, the effective cross-section area

*A*

_{eff}[20, Eq. (1)] would be better suited to estimate the degree of interaction with third-order nonlinear materials in waveguide and cladding.

## 5. Experimental results

At a wavelength of 1.55 *μ*m, we measured the total loss resulting from leakage into the silicon substrate and from roughness-induced scattering for a number of differently dimensioned strip (Fig. 3) and slot waveguides (Fig. 4). Figure 3a shows the strip waveguide losses as a function of initial Si strip width, at various ALD growth thicknesses. As the loss reduction due to the ALD cover can largely be due to the increase of waveguide dimensions for a particular initial strip width, it is better to plot the loss as a function of effective index values *n*
_{eff} calculated for each waveguide structure, as is done in Fig. 3b for strip waveguides, and also for slot waveguides in Fig. 4. Strip and slot waveguides behave in a surprisingly similar manner. The loss decays quickly with increasing *n*
_{eff}, starting at the BOX refractive index, below which no light is guided at all. With increasing *n*
_{eff} the mode experiences a better guiding, and leakage loss reduces. However, because the field *φ*(*d*) at the core-cladding boundary increases, roughness-induced scattering losses gain weight, so that a shallow minimum appears at *n*
_{eff} ≈ 1.6. For *n*
_{eff} ≈ 1.8, a more or less pronounced loss maximum is found. This is connected to the maximum roughness loss reported in [9, Fig. 5, Eq. (40), (41)], but here it is also influenced by leakage losses. With increasing *n*
_{eff}, i. e., for an increased propagation constant *β* chosen by a broader silicon strip (assuming the strip height remains constant because of technological constraints), the roughness losses become less and less important [9]. The maximum *n*
_{eff} is set by the requirement that the waveguide should remain singlemoded.

For the strip waveguides, Fig. 3(b) shows that the largest reduction of losses from 11dB/cm of an uncoated one to 5.7dB/cm of a waveguide covered with 50nm of TiO_{2} is reached when *n*
_{eff} ≈ 1.65. The details of observed loss reduction features cannot be easily explained from basic modefield simulations, and describing them may require rigorous scattering models with accurate information on surface roughness properties. The smallest loss of 2dB/cm was found for the broadest strip (450nm, *n*
_{eff} = 2.45). In this case, a 50nm thick TiO_{2} cover did not improve the loss any further. We estimate an uncertainty of ±1dB/cm for the measurements, based on the variation of transmission values caused in a large part by the uncertainties in the measurement setup.

For slot waveguides, the measured losses as a function of *n*
_{eff} are shown in Fig. 4. With a 50nm thick TiO_{2} cover, minimum losses of 7dB/cm, with an estimated uncertainty of ±2dB/cm (also largely due to the uncertainty of the measurement setup), were reached for *n*
_{eff} = 1.69 (*w _{r}* = 207nm,

*w*= 230nm).

_{s}To illustrate the measurement accuracy, we compared five slot waveguides (waveguides 5, 10, 15, 20, and 25) with similar dimensions as given above and found the loss values (71, 74, 79, 65, 67)dB/cm without any cover (on average (
${71}_{-6}^{+8}$) dB/cm). With a 50nm thick TiO_{2} cover, we measured losses of (10, 9, 9, 8, 7) dB/cm (on average (
${9}_{-2}^{+1}$) dB/cm). For another set of five slot waveguides with similar dimensions (waveguides 2, 7, 12, 17, and 22) we measured the loss values (81, 78, 87, 83, 91)dB/cm without cover (on average (84 ± 7)dB/cm). With a 50nm thick TiO_{2} cover we found (12, 12, 13, 15, 15) dB/cm (on average (13.5 ± 1.5)dB/cm).

For both strip and slot waveguides the TiO_{2} layer thickness of 50nm leads to lower losses than the thicknesses of 30nm and 20nm, especially near the loss minimum at *n*
_{eff} ≈ 1.6. When comparing geometrically different slot waveguides having the same effective index, one has to take into account the geometry as well. For some of the data points with the same effective index in Fig. 4, the lower loss can be explained with the lower modal field strength *φ*(*d*) at the air-TiO_{2} interface, or with the mode geometry leading to a lower substrate leakage loss. The thicker 50nm coating increases the effective index to a range where the substrate leakage is not significant anymore, and thus reduces the loss deviation between the different initial geometries.

To better examine the dependency of losses on the slot width, we plot the loss of slot waveguides with effective indices *n*
_{eff} > 1.55 as a function of the air slot width remaining after coating (Fig. 5). For the chosen *n*
_{eff} range, substrate leakage is not significant anymore, and the losses are larger for narrower slots. Due to a more effective surface smoothening, a thicker coating with a height of 50nm leads to lower losses, especially for narrow air slots.

## 6. Conclusions

Losses in silicon strip and slot waveguides can be reduced with a TiO_{2} cover grown by atomic layer deposition (ALD). For waveguides with low effective refractive index *n*
_{eff}, i. e., with a relatively small field confinement, the measured losses stem mostly from leakage through the 2 *μ*m buried oxide into the silicon substrate. For a better field confinement (larger *n*
_{eff}), scattering from the rough waveguide sidewalls dominates the loss. We found that a 50 nm thick TiO_{2} cover reduces the loss of a 230nm wide strip waveguide from > 50dB/cm to 5.7dB/cm, or from 11dB/cm to 5.7dB/cm when compared to a 320nm wide uncoated waveguide with similar *n*
_{eff} of ~ 1.65. For 450nm wide strip waveguides the loss is as small as (2 ± 1)dB/cm. The loss of slot waveguides reduces from 71dB/cm to (7 ± 2)dB/cm.

As a further advantage, the waveguiding properties for strip waveguides and the slot width for slot waveguides can be adjusted in a back-end process. For slot waveguides this is especially convenient, if a sensor sensitizer or a nonlinear material is used to fill a precisely controlled slot.

## Acknowledgments

We acknowledge support by the Academy of Finland (grant 128826 and 134087 for A. S.) and by the Finnish Funding Agency for Technology and Innovation (TEKES). T. A. acknowledges support from Graduate School of Modern Optics and Photonics, Emil Aaltonen Foundation, and from Walter Ahlström Foundation. This work was further supported by the German Research Foundation (DFG) through DFG Center for Functional Nanostructures (CFN), Karlsruhe School of Optics & Photonics (KSOP), and through the Initiative of Excellence, all at Karlsruhe Institute of Technology (KIT), by the European projects EURO-FOS (grant 224402) and SOFI (grant 248609), and by the German Ministry of Education and Research in the framework of the joint project MISTRAL (BMBF grant 01BL0804). We are grateful for technological support by the European Network of Excellence ePIXnet (now ePIXfab, silicon photonics platform of IMEC and CEA-LETI).

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