In this work we experimentally demonstrate laser erasable germanium implanted Bragg gratings in SOI. Bragg gratings are formed in a silicon waveguide by ion implantation induced amorphization, and are subsequently erased by a contained laser thermal treatment process. An extinction ratio up to 24dB has been demonstrated in transmission for the fabricated implanted Bragg gratings with lengths up to 1000µm. Results are also presented, demonstrating that the gratings can be selectively removed by UV pulsed laser annealing, enabling a new concept of laser erasable devices for integrated photonics.
© 2011 OSA
Silicon Photonics  has the potential to meet the requirements of increasing data rate demands of the modern communications and high performance computing markets. However, the transition from the current electrical interconnects to the photonic era is subject to the capability of delivering cost effective, high volume, integrated photonic systems.
Integrated gratings in Silicon on Insulator (SOI) can be used as optical filters, add-drop multiplexers, integrated mirrors or surface couplers, and have the advantage of a small device footprint, and being fully compatible with CMOS manufacturing. Of this specific class of devices, 2nd order grating couplers have been suggested for many years as one of the possible candidates for coupling to integrated SOI photonic devices, whereas integrated Bragg gratings could be used for data communication applications. The majority of the SOI gratings in the literature rely on reactive ion etching to achieve a periodic refractive index modulation on the waveguide surface. Different configurations of SOI Integrated Bragg gratings have appeared in the literature in the last 10 years, such as those presented by Murphy et al , amorphous silicon gratings , SiON hybrid grating devices , and more recently, silicon self implanted Bragg gratings - . In this work we demonstrate the concept of erasable ion implanted Bragg gratings, which could be used in the development of an optical wafer scale testing technique. In order to demonstrate the concept of laser erasable gratings, implanted Bragg gratings in Silicon on Insulator waveguides have been fabricated and characterized, and the erasability of these gratings demonstrated using laser annealing. Whilst the concept of thermally annealing ion implantation damage has been known for many years (e.g .), and the formation of ion implanted gratings has also been demonstrated by some of the authors of this work (as in ), the concept of producing small area erasable gratings, particularly using very short laser pulses for the annealing process, is highly novel, and may offer a realistic proposal for the development of a wafer scale testing system.
The device concept is shown in Fig. 1 . The silicon on insulator rib waveguide is first covered by a protective silicon dioxide layer which is patterned with the grating template and used as a hard mask during the waveguide implantation. After implantation the hard mask is removed leaving the functional Bragg grating embedded in the silicon waveguide. After use the grating may then be subsequently erased by an appropriate annealing treatment, without affecting the remainder of the wafer.
2. Device fabrication
The optical properties of silicon can be changed by ion implantation induced amorphization, as discussed by many works in the literature , most notably by Baranova et al . The choice of the ions used in this process influences the loss mechanism in the silicon , and optical losses up to 500dB/cm have been observed for MeV energy implants of Xe ions at 1 × 1015 ions/cm2 implantation dose. As a demonstration of our approach we present 1st order Bragg grating fabricated by implantation of germanium ions via an amorphization process. This ion species allows the formation of higher refractive index amorphous material at a relatively low implantation dose (1015 ions/cm2), if compared to common doping ion species, thereby reducing process time and hence cost. Furthermore, the choice of germanium allows room temperature implantation preventing self annealing of the amorphous material during the implantation phase (as opposed to lighter species, such as Si, that require temperature controlled implants ) whilst still keeping the process CMOS compatible. In this work we define the material to be completely amorphous when the concentration of point defects reaches 80% of the crystalline Silicon atomic density . The chosen implantation conditions focus on 30keV energy processes in order to limit damage penetration into the implanted waveguide, thus reducing optical losses.
Germanium test implants have been carried out at the University of Surrey Ion Beam Centre in order to identify suitable conditions for ion implanted Bragg gratings fabrication. Test implants have been analyzed by Rutherford Backscattering Spectroscopy (RBS) in order to confirm the predicted amorphous layer thickness, and infra-red ellipsometry in order to analyze the change in refractive index . A Tauc-Lorentz oscillator model has been used for the ellipsometry data fitting .
Calibration implants were conducted with germanium ions at a dose of 1015 ions/cm2 for energies of 30keV and 70keV, and temperatures of 300K and 70K, corresponding to a predicted amorphous layer thickness of 50nm and 100nm from the implanted surface.
Figure 2(a) shows the real part of the measured refractive indices for germanium amorphised silicon.It has been observed that germanium implants with a dose of 1015 ions/cm2 lead to a refractive index change of 0.5 at a wavelength of 1310nm. The observed data is in agreement with that previously reported by Knights et al  for silicon implantation into silicon. Ion beam analysis and ellipsometry confirmed the amorphous layer thickness to be within 10% of the expected thickness, and quantified the refractive index change.
Once a periodic index change of period Λ has been transferred to the waveguide via implantation, the light propagation inside the structure is altered so that the wavelengths satisfying a specific phase matching condition will be reflected back to the waveguide input. The wavelength of peak reflectivity can be derived from the coupled mode theory  as λBragg = 2neffΛ/m where neff is the optical mode effective index, and m is the grating order.
3. Device characterization
An SEM cross section of the rib waveguide is shown in Fig. 2(b), along with a top view of an implanted waveguide in the inset. Waveguide design has been carried out by using FIMMWave/FIMMProp  in order to identify single mode condition for propagation. Bragg grating device responses have been modeled by using an algorithm based on the coupled mode theory in order to ensure a target extinction ratio of 20dB. The total silicon overlayer thickness H is 0.4µm, the target rib etch depth D is 0.2 µm, the target rib width W is 0.5µm, and the buried oxide thickness h is 1µm. SEM analysis of the fabricated waveguides shows that the target dimensions have been achieved within ± 20nm. The Bragg gratings have been designed with a 212nm period and a 50% duty cycle, resulting in a target central Bragg wavelength of 1310nm. A 200nm layer of SiO2 has been grown on SOI wafers and the grating patterns have been defined by deep UV lithography with a period of 212nm. The oxide layer would later be used as a hardmask during ion implantation. Ge ions have been implanted at energies of 30keV and a dose of 1015ions/cm2 at room temperature.
The chosen implantation energy of 30keV yielded a measured grating depth of 48nm. The post fabrication gratings have a measured duty cycle of 30% (an example is reported later in Fig. 4(a) ). The reduction in duty cycle may be related to the ion shadowing caused by the hardmask walls , a phenomenon widely known in ion implantation technology.
After ion implantation, the oxide layer has been removed and rib waveguides have been etched in correspondence to the implanted regions using the dimensions described previously. After waveguide etching, a 500nm thick SiO2 layer has been deposited on the devices for protection. The wafer has been diced and single dies have been polished and treated with anti reflection coating in order to ensure efficient butt coupling of light into the chip. The voids visible in Fig. 2(b) are due to the HF used in facet preparation, which penetrates the seams left in the oxide after CVD deposition.
Implanted devices have been optically tested by using a Denselight DLCS3207A fiber coupled broadband source with a 40nm signal bandwidth centred on 1310nm wavelength and a Hewlett Packard HP86140A optical spectrum analyzer. Optical losses have been measured by the Fabry-Perot resonance method on samples not treated with anti-reflection coatings, using an Agilent8194A tuneable laser as optical source. The uncertainty on the measurements has been obtained by analyzing the standard deviation of data collected from different samples. The air to silicon reflectivity value employed for waveguide loss measurements is 27%. In order to reduce the uncertainty of the Fabry-Perot resonance method, the reflectivity value has been calculated by simulating the coupling of the input fiber mode to the device facet by a rigorous Eigenmode Expansion method. The analysed devices included gratings with lengths ranging from 100µm up to 1000µm. A summary of the measured extinction ratios and full width half maximum (FWHM) optical bandwidths for different grating lengths are reported in Fig. 3 , accompanied by the theoretical figures calculated by coupled mode theory  for the analyzed structures. Implanted Bragg gratings tested in transmission exhibited an average extinction ratio (ER) of 2.7dB for the 100µm devices, 7.4dB for the 200µm devices, 16.3dB for the 400µm devices, and 21dB and 24dB for the 600µm and 1000µm devices respectively, showing repeatability within ± 2dB across the processed wafer containing the same grating design. The measured grating responses are centred at a wavelength of 1314nm with variations within 2nm from chip to chip, and of less than 0.5nm within different groups of devices on the same chip, as opposed to a target wavelength of 1310nm. The gratings display a FWHM bandwidth of 2.165nm for the 100μm, 1.34nm for the 200μm long devices, 0.94nm for 400μm device, and 0.91nm for the 600μm and 1000μm device. The theoretical figures appear to be in good agreement with the measured data (Fig. 3).
Grating optical losses for “as implanted” devices have been measured to be in the range of 4.2 ± 1.2dB/cm; and are comparable to the unimplanted waveguide loss, measured to be 3.1 ± 1.2dB/cm.
The data collected with transmission measurements allows estimation of the efficiency of the interaction between the guided optical mode and the dielectric perturbation in a waveguide grating. This figure of merit is described by the coupling constant κ :15]. The analyzed devices produced an average measured coupling constant of 62 ± 10cm−1, demonstrating a grating efficiency comparable to that of etched gratings in silicon on insulator previously reported .
4. Laser annealing
Amorphous silicon formed by ion implantation can revert to crystalline material after a moderate temperature annealing process  or UV pulsed laser annealing - . Both techniques are very well known in the fields of ion beam implantation  and microelectronics processing, as well as in the field of material processing and photovoltaic applications . Specifically, this work focuses on the possibility of employing reduced area laser annealing to process only small sections of the processed wafer, thus enabling novel processing strategies for silicon photonics, as it would be impractical to remove grating by heating an entire circuit or wafer.
In order to demonstrate the erasability of the implanted Bragg gratings, and that the refractive index modulation is indeed a result of ion implantation, UV Pulsed laser annealing at 248nm has been used to erase the implanted Bragg gratings in a reduced area (3mm × 3mm) of the fabricated device. Since the light absorption of amorphous silicon is strong in the UV range, the direct laser heating is limited to a thin surface layer. Finite element heat conduction simulations of the devices indicate that a laser fluence of above 200mJ/cm2 is required to recrystallize the amorphous material with a temperature above 550°C. This allows recrystallizing the amorphous material by raising its temperature locally to higher than its melting point, while keeping the macroscopic temperature of the wafer at room temperature. TEM cross-sections of the implanted grating before and after laser annealing are shown in Figs. 4(a) and 4(b) respectively. Figure 4(b) displays almost complete recrystallisation of the amorphous grating, although residual ion damage appears to be still present in the waveguide close to the amorphous - crystalline interface areas.
The implanted devices were annealed by irradiating with pulses from a Lambda Physik LPX210 KrF excimer laser operating at 248 nm with pulse duration of 25ns. The beam was passed through an aperture to select the more uniform central portion and then focused to a square 3mm x 3mm in size. The devices were placed on a computer controlled XY translation stage and the laser beam was scanned across the waveguides at 60 mm/min. A laser repetition rate of 10 Hz was used; hence each point on the device was exposed to 30 pulses, the whole annealing procedure did not take longer than 10 seconds. The pulse energy was varied in the range 10mJ - 25mJ producing laser fluences of 111 mJ/cm2- 278mJ/cm2.
The results of laser annealing at 278mJ/cm2 on the grating spectral performance is also shown in Figs. 5(a) , 5(b), and 5(c) for gratings of lengths 200µm, 600µm, and 1000µm respectively.The extinction ratio of the grating is completely removed after annealing. Therefore the data shows that it is possible to thermally erase implanted structures completely. Annealing at fluences less that 200mJ/cm2 resulted in little or no modification of the device response.
Annealing allows almost instant local recrystallization of the implanted amorphous silicon (the pulse duration is 25ns, and the exposure routine for a chip does not take longer than 10s), whilst leaving the remainder of the devices on a chip intact. The testing conducted during laser annealing highlighted the possibility of selectively annealing implanted devices, unexposed gratings were still functional 1.5mm away from the exposed area, when using a 3mm × 3mm wide laser spot-size. This is a critical requirement toward developing applications such as an optical wafer scale testing technique, since it allow processing only a small fraction of the wafer area designated for testing.
Grating loss measurements after laser annealing measured an average excess loss of 3.6 ± 1.2dB/cm, close to the 3.1 ± 1.2dB/cm measured for unimplanted waveguides, which allows us to hypothesize that the laser annealing process does not affect the integrity of the waveguides.
3. Summary and conclusions
The possibility of fabricating grating structures which can be individually erased opens new possibilities in the world of silicon photonics, specifically in the area of optical wafer scale testing, which requires a minimally intrusive technology. Second-order grating couplers are one of the more viable technologies for coupling light into integrated photonic chips  however they often require additional etching steps or the use of complex structures making them unsuitable for preliminary wafer scale testing, for which a temporary transformation of the material is preferred. The grating technology demonstrated in this paper could be used to fabricate temporary second-order gratings allowing optical testing to be done on arbitrary areas of an optical chip; and then subsequently erased, as this is a natural extension of the work described here. In summary, an extinction ratio up to 24dB in transmission has been successfully demonstrated for germanium implanted Bragg gratings in Silicon on Insulator rib waveguides, as well as the possibility of selectively erasing the implanted structures. Initial testing has demonstrated that devices can be locally erased within an area of 3mm × 3mm, while leaving the unexposed area of the chip still functional. Additional experimentation is currently in progress to reduce the exposed area to a dimension small enough (for example 100μm × 100μm) to eventually enable “single device” annealing.
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