We show GHz modulation in a 2.5 µm radius silicon micro-ring, with only 150 mV peak-peak drive voltage and an electro-optic modal volume of only 2 µm3. The swing voltage and the micro-ring modulator are the smallest demonstrations so-far in silicon. The presented approach lays the ground work for a new class of high speed low voltage modulators enabling, seamless integration of nanophotonics with low voltage digital CMOS nano-electronics.
©2010 Optical Society of America
1. Introduction: scaling the operation voltage of silicon modulators
Low voltage operation of nanophotonic modulators is an important condition for providing the future bandwidth needs via nanophotonic-electronic integration [1–7]. In particular, the operating voltage of silicon nanophotonic modulators must scale aggressively as rail voltages (Vdd) for digital nano-electronics scale to 600 mV in future CMOS platforms [8–11]. Hence, it is of great interest to pursue low voltage modulation methods that are silicon compatible. While several novel approaches using polymers [9–11], nano-wires , plasmonics [13,14], and nano-crystals  have been pursued, a high speed, low voltage modulator remains to be demonstrated on silicon. A low voltage swing modulation scheme can significantly reduce the total transmitter energy and footprint by reducing the drive electronic complexity compared to the existing schemes .
We show GHz modulation in a 2.5 µm radius silicon micro-ring, with only 150 mV peak-peak drive voltage and an electro-optic modal volume of only 2 µm3. We achieve the low drive voltage and ultra low switching energy operation by biasing the modulator near the optimum charge injection efficiency point of the electro-optic device. This feature is unique to carrier injection modulators enabling ultra low voltage operation in contrast with other techniques for electro-optic structures [17–24]. The swing voltage and the micro-ring modulator are the smallest demonstrations so far in silicon. The presented approach lays the ground work for a new class of high-speed low-voltage modulators enabling seamless integration of nanophotonics with low voltage CMOS nano-electronics.
2. Ultra low mode volume (2.5 µm radius) microring modulator
We use a micro-ring of radius 2.5 µm, close to the bending loss limited footprint of micro-rings  in order to minimize both the energy and drive current requirements of the device. The micro-ring is formed with a waveguide of width 500 nm coupled to 350 nm wide silicon waveguides (Fig. 1a ). The transmission spectrum for TE-polarized light is shown in Fig. 1b.
The micro-ring modulators are fabricated on silicon on insulator substrate. The top silicon layer (260 nm thick) is used for the passive waveguides and the electro-optic micro-ring modulator. The patterning steps are all performed with electron-beam lithography (JEOL 9300). We defined the silicon waveguides and the ring resonator and partially etched the silicon layer to a depth of 210 nm. Another lithography step was used to cover the modulator region and continue the silicon etch, leaving the 50 nm slab only around the modulator for the PIN diodes. After the etching, we deposited 20 nm SiO2 for silicon passivation. Next, we performed the implantation steps for the p-region (outside the rings, BF2, dose 3X1015/cm2 at 45 keV) and n-region (inside the ring, Phosphorous, dose 2X1015/cm2 at 33 keV) respectively. A relatively low temperature anneal (650°C Rapid Thermal Anneal (RTA) for 120s) was subsequently used to activate the dopants. Nickel Silicide was then used for the electrical contacts to the modulator, with 15 nm evaporated nickel and 50 s rapid thermal anneal (RTA) at 550°C. We then deposited 1 µm SiO2 top cladding, and patterned vias and contact pads connecting to the electrodes of the modulator. The sample was then diced and facet-polished to sub-wavelength roughness for testing. The device and Non-Return-to-Zero (NRZ) modulation waveforms are shown in Fig. 1, where we drove the modulator with NRZ data at 4 Gbit/s with a peak-peak voltage of 1.4 V biased at 0.5 V. We measured the optical transmission through the device using inverse tapered waveguide to fiber couplers at both ends of the chip . A detailed description of the testing set up is provided in . The insertion loss of the modulator comprising of the short section of the coupling waveguide and the ring is expected to be <0.1 dB. The fiber to fiber insertion losses are ~15 dB dominated by the fiber to waveguide coupling losses and the waveguide insertion loss.
3. Principle of operation for ultra low swing voltage in carrier injection modulators
We achieve very low swing voltage operation of PIN injection modulators by operating the modulator near the optimum charge injection point. Figure 2a shows the experimental and simulated IV characteristics of the micro-ring modulator. The mechanism for optical modulation is the free carrier dispersion due to the electron/hole concentration in the center of the waveguide , which we show in Fig. 2b as a function of voltage. The slope of this curve is the charge injection efficiency per volt () shown in Fig. 2c. There is clearly an optimum charge injection region around a bias voltage of 1V. Here a change in voltage of only 100 mV produces a relatively large change in charge concentration of 2 × 1017 cm−3 inside the waveguide, corresponding to a refractive index change Δn = 7.7 × 10−4 .
The presence of an optimum charge injection region is due to the behavior of the carrier lifetime, which we illustrate here via an analytic model supported by electro-optic device simulations. The electro-optic simulations are in-turn validated against experimental steady state and transient performance of the modulator. The injected charge into the PIN diode can be extracted from the non-linear governing equation:Fig. 2, we show the analytical solution of the above equation along with the simulated and measured IV data. The fitting parameters are I0 = 90 nA, Vt = 0.5 V, α = 0.62, R = 250 Ω. The injected charge density can be obtained from the V(I) characteristics following the non-linear governing equation for the steady state injected carrier density:29]. The above equation can be obtained by the differential equation for injected charge in the diode at steady state by setting . The results from Eqs. (1) and (2) can be combined to obtain the Q (V) and, (shown in Fig. 2 c):
We simulated the transient carrier dynamics of the electro-optic modulator to verify the principle of operation. The electrical modeling was carried out in SILVACO ATLAS device simulation software and the optical modulation was calculated using an optical transmission matrix approach . The software models the internal physics of the device by solving the Poisson equation and the charge continuity equation numerically. We included Shockley Read Hall (SRH), Auger, Direct recombination models. We assumed an interface trap density of 1010/cm2/eV and an interface recombination rate of 104 cm/s. The surface recombination rate of silicon is of the order of 104 cm/s for un-passivated surfaces and 100 cm/s for passivated surfaces. A detailed treatment of electro-optic modeling is presented in . A good agreement between the measured and simulated waveforms can be observed in Fig. 3 .
4. Ultra low swing voltage modulation in carrier injection modulators
We demonstrate 1 Gbit/s modulation with a peak-peak drive voltage of only 150 mV. An eye diagram corresponding to the drive voltage is shown in Fig. 4 a . The output optical waveform generated by the silicon nanophotonic modulator at 1 Gbit/s NRZ is shown in Fig. 4 b. We drive the electro-optic modulator directly from the pattern generator using a 20 dB attenuator to obtain 150 mV voltage swing. A bias-tee is used to add a variable DC voltage to optimize the optical waveforms. The driving signal is terminated in a 50 ohm termination at the end of the high speed to probes to avoid reflections. A 150 mV voltage swing about a bias voltage level of 1.03 V was used to obtain clear waveforms. The optical eye diagram is shown in Fig. 4 b showing an open eye. We observe symmetric rise and fall times of ~1 ns corresponding to the recombination life time in silicon waveguides determined predominantly by the surface recombination processes.
We estimate the RF switching power consumed by the device to be 7.9 fJ/bit excluding the state hold power. The estimate of the switching power is arrived at as follows: The total charge injection times voltage swing provides the switching energy per injection. However, since 0-0, 0-1, 1-0, 1-1 transitions are all equally likely in a pseudo-random signal, the switching energy per bit is given by 1/4th of the switching energy per transition. The total charge injection for switching is estimated from the optical quality factor (Q ~3000), group index (ng = 4.262) and modal volume of the cavity (Θ = 1.96 µm3) and free carrier dispersion in silicon . The refractive index shift required for full optical switching across the ring is obtained from Δn = ng/Qopt = 1.42X10−3. This corresponds to an injected charge density of ρ = 3.9X1017 cm−3. Hence the total charge injected is Φ = 251 fC at each 0-1 transition. The energy per injection is therefore 37.7 fJ. However, since 0-0, 0-1, 1-0, 1-1 transitions are all equally likely in a pseudorandom signal , the switching energy per bit is given by 7.9 fJ/bit. However, we note that the total energy of the injection modulator is dominated by the DC power consumption given by VonIon = eVon ρ ΘQ/τrecomb = 267 µW
The principle of operation presented here can also be extended to faster operating speeds. By controlling the carrier lifetime in the modulator , we expect that the speed of the modulators can be increased while still operating in the low drive voltage regime, with low loss waveguides . In Fig. 5 , we show simulation of 10 Gbps modulator operation with a 500 mV voltage swing by reducing the effective carrier lifetime. The SRH recombination rate is increased such that the effective carrier lifetime is 100 ps. The diode IV forward bias resistance is 110 ohm and the ring resonator loaded Q is 25,000, corresponding to a modest propagation loss of 17 dB/cm and photon lifetime of 21 ps.
5. Towards direct digital CMOS driven modulators
The proposed scheme can enable high-speed direct digital logic driven modulators that can be operated with a single stage (or tapered) inverters. We estimated the switching speeds of a scaled single stage digital logic driver. The maximum switching speed (fs = 1/tsw) for a single stage inverter (Fig. 6 )  driven by minimum sized transistors is estimated as:Fig. 6. Gate lengths, voltages and delays are taken from ITRS 2009, Table PIDS2: High Performance Logic Technology Requirements [32,33]. One can clearly see that at 1 mA current levels for the present modulator, switching speeds approaching 10 GHz can be realised using direct CMOS digital logic drives. The estimated scaled NMOSFET channel width for a 1 mA drive current is expected to be , assuming an Id,sat of 664 μA/µm at a 22 nm CMOS technology node . This implies a drive transistor size of 1.5 µm which can scale down with current densities . We note that the peak current in the device simulation shown in Fig. 5 is 3 mA, which corresponds to a scaled digital inverter cut-off bandwidth of 10 GHz in a 16 nm CMOS node. This reduction in footprint, driver energy, and complexity can enable seamless integration of nanophotonic with CMOS nano-electronics.
In conclusion, we demonstrate ultra-low drive voltage (150 mV) operation of carrier injection micro ring modulators in Gbit/s regime in an ultra low mode volume silicon micro-ring device. This low voltage driving scheme allows for direct digital logic driven modulators driven with micron sized transistors. To the best of our knowledge this is the smallest operating voltage (150 mV) for a GHz silicon modulator to date. The mode volume (2 µm3, (~0.52 λ3) & foot-print (~20 µm2) of the modulator is also the smallest to date for a micro-ring silicon modulator. The ability to scale the voltages of nanophotonic modulators down to few 100 mV may enable compatibility with future low voltage nano-electronic technologies beyond 22 nm CMOS, enabling close integration of nanophotonics with nano-electronics.
This work was performed in part at the Cornell NanoScale Facility, a member of the National Nanotechnology Infrastructure Network, which is supported by the National Science Foundation (NSF) (Grant ECS-0335765). This work was partly supported by the Air Force Office of Scientific Research with Grant FA9550-07-1-0200 under the supervision of Dr. Gernot Pomrenke, and by the National Science Foundation (NSF) under Career Grant No. 0446571.
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