Slot waveguides allow joint confinement of the driving electrical radio frequency field and of the optical waveguide mode in a narrow slot, allowing for highly efficient polymer based interferometers. We show that the optical confinement can be simply explained by a perturbation theoretical approach taking into account the continuity of the electric displacement field. We design phase matched transmission lines and show that their impedance and RF losses can be modeled by an equivalent circuit and linked to slot waveguide properties by a simple set of equations, thus allowing optimization of the device without iterative simulations. We optimize the interferometers for analog optical links and predict record performance metrics (Vπ = 200 mV @ 10 GHz in push-pull configuration) assuming a modest second order nonlinear coefficient (r33 = 50 pm/V) and slot width (100 nm). Using high performance optical polymers (r33 = 150 pm/V), noise figures of state of the art analog optical links can be matched while reducing optical power levels by approximately 30 times. With required optical laser power levels predicted at 50 mW, this could be a game changing improvement by bringing high performance optical analog link power requirements in the reach of laser diodes. A modified transmitter architecture allows shot noise limited performance, while reducing power levels in the slot waveguides and enhancing reliability.
© 2010 OSA
Recent advances in non-linear optical polymers make them extremely promising materials for high performance optical modulators. Electro-optic coefficients as high as r33 = 300 pm/V have been demonstrated , and polymer based modulators with high reliability have been made commercially available . These advances have been enhanced by novel device design. In particular silicon waveguides with a narrow slot in the middle, so called slot waveguides (SWG), have been shown to yield high confinement of the optical field inside the slot . The same structures also allow dropping the entire radio-frequency (RF) driving voltage across the narrow slot , thus yielding very high RF E-fields with high optical overlaps. This allows modulators with ultra low drive voltages to be realized.
Vπ is the voltage required to induce π phase shift between the two arms of the modulator. A low Vπ has several advantages such as reduced transmitter (Tx) power-consumption in digital data-communication links. It is particularly attractive in the context of optical analog links, where it translates directly into enhanced noise Fig. (5) since the electrical-to-electrical power gain and the noise factor of the link scale respectively as Vπ −2 and Vπ 2. Analog links are receiving a lot of attention for their application in radar remoting and phased arrays  and the availability of low noise optical analog links is predicted to have a tremendous impact on this field.
It has been recognized early on that electro-optic polymers constitute a promising material for low Vπ modulators . Low drive voltage modulators have also motivated a considerable amount of research in the lithium niobate community [8-10], with Vπ as low as 1.1 V and 1.35 V at respectively 12 GHz and 18 GHz demonstrated with commercially available high bandwidth modulators targeted towards analog optical links . It should be noted that the definition of Vπ has been adjusted to be consistent with the nomenclature of this paper, as explained in section 5.2. High-speed (> 10 GHz) modulators in silicon have also been a very active field in the last decade [11–14], and recently important progress has been made towards low voltage modulation with the demonstration of a Vπ of 2 V .
The primary focus of this paper is to design SWG based Mach-Zehnder interferometers (MZI) with phase matched transmission lines (TL), allowing for long interaction lengths between the RF signal and the SWG (l>>λRF/4). One of the fundamental trade-offs resides in the doping concentrations : Higher doping leads to higher waveguide losses , but also to lower waveguide series resistance and thus to smaller TL losses and to a reduced Vπ. By increasing doping concentrations relative to the devices described in , SWG based modulators with a bandwidth of 1 GHz have recently been demonstrated . By using dual concentration implants and higher resistivity substrates as described in this paper, it is predicted that much higher bandwidths will be attained. In order to model and to optimize the devices, the waveguides are first independently characterized in terms of their geometry and implantation profile. Relevant SWG characteristics are optical overlap with the slot, group index, absorption losses, capacitance and series resistance. A TL is then designed for a typical waveguide geometry by using a finite-elements solver for Maxwell’s equations in the RF domain (HFSS). Based on the TL mode profile, an equivalent lumped element circuit is proposed for infinitesimal TL segments. Predictive formulas relating phase matched TL characteristics (impedance and RF propagation losses) to waveguide characteristics (group index, linear capacitance and series resistance) are derived from the equivalent circuit and verified against finite-elements simulation results. These models are then used to optimize an MZI with a figure of merit (FOM) maximizing analog link performance. While sections 3.1 and 4.2-4.4 contain most of the novel device physics, sections 3.2 and 4.1 contain detailed data that the reader will find useful to reproduce these results and design similar devices. Section 5 is dedicated to the high-level performance metrics, both for the bare modulators and for the analog optical links. All numerical values are reported assuming an operating wavelength of 1550 nm.
2. Device overview
Figure 1 shows a cross-section of a SWG and of half the TL. The complete TL is a coplanar line of the form Ground-Signal-Ground (GSG) that applies a push-pull signal to the two arms of the MZI, assuming the polymers are poled in the same direction in both slots. In this paper, Vπ is the value for the MZI operated in push-pull configuration, i.e., it is the aggregate effect of both arms. In addition to defining the geometry, Fig. 1 also defines three implant regions: Low, moderate and high density implants. Table 1 summarizes numerical values.
The devices are assumed to be fabricated in silicon-on-insulator (SOI) wafers. Not shown in Fig. 1 are the buried oxide (BOX) thickness and the silicon wafer handle. In order to suppress optical coupling from the waveguides to the silicon handle, the BOX has to be fairly thick and is assumed to be 3 μm in the rest of this paper. In order to avoid TL losses associated to currents in the silicon handle, it has to be made out of high resistivity silicon. In sections 4 and 5 the silicon handle is assumed to have a resistance of 100 Ω × cm. The reader can jump ahead to Fig. 18 for a complete device schematic. The narrow slots are the most challenging aspect of SWG fabrication. However, advances in resist shrinking methods allow fabricating very narrow slots, even with optical lithography. Figure 2 shows an SEM micrograph of a 120 nm slot SWG fabricated with optical lithography.
3. Waveguide properties
This section describes the modeling of the stand alone, implanted waveguides. Section 3.1. describes the overlap of the optical field with the electrical RF driving field. Section 3.2. focuses on secondary metrics, such as implant induced optical losses, series resistance and capacitance.
The strength of SWGs lies in the fact that the optical field is confined is a small volume (the slot) filled with polymer (Fig. 3(a) ). Since the RF voltage can be entirely dropped across the same region (Fig. 3(b)), the resulting RF electrical field strength is very high relative to what would be obtained with wider cross-section modes.
Figure 4 shows the overlap of the optical field with the slot, as well as the optical overlap multiplied by the RF field strength (assuming a 1V bias), the actual FOM for modulation. Interestingly, the FOM keeps growing for smaller slots, down to the smallest simulated (0.2 nm). Of course there will be other limitations in practice such as fabrication, but also excessive capacitance (which scales as the inverse of the slot width) and dielectric breakdown of the polymer under excessive field strengths. High dielectric strengths in excess of 1.5 MV/cm have been demonstrated , however there have been no reliability studies done under continuous exposure to such extreme fields. High capacitance makes phase matching more challenging and leads to higher TL losses (section 4). Finally, small slot widths lead to higher optical power densities that might reduce device lifetime. In the following, 100 nm slots are considered a safe practical dimension, since we have already realized high-quality 100 nm slots with optical lithography and since RF electrical field strengths are below 20 kV/cm (assuming a Vπ of 200 mV). The data shown in Fig. 4(b) can be described in intuitive terms by inverting it: A FOM of 20 μm−1 is the equivalent of perfectly confining the optical field inside a parallel plate capacitor with plate to plate spacing of 50 nm. The FOM for a 100 nm slot is almost an order of magnitude lower, at 2.7 μm−1, equivalent to a perfect field confinement between two plates spaced by 370 nm. Figure 5 shows the ridge width wg_rw optimized for highest slot overlap as a function of slot width wg_sw. It can be fitted as wg_rw = −0.1052 wg_sw2 + 0.1831 wg_sw + 0.4247, where all dimensions are in μm.
Interestingly, even though a cursory visual inspection of Fig. 4(b) could lead to the erroneous conclusion that the theoretical FOM diverges for vanishing slot size, it actually converges to a finite value easily predictable by perturbation theory. By applying the parallel plate approximation to the two internal waveguide edges defining the slot, it can be easily understood how the RF field is confined in the slot region. As already pointed out in , the high optical field in the slot region is a consequence of the continuity of the normal electric displacement field at the silicon-slot interface.
Figure 6(a) shows the electrical field across a SWG with a very narrow slot (2 nm). It can be verified that outside the slot region, the field converges to exactly the profile of a slot-less ridge waveguide of identical dimensions. In order to maintain continuity of the normal D-field, the E-field is multiplied by εsilicon/ εpolymer = nsilicon 2/npolymer 2 inside the slot, where εsilicon and εpolymer are the dielectric constants of silicon and of the polymer and where nsilicon and npolymerare the refractive indices of silicon (3.43) and of the electro-optic polymer (~1.7 at optical frequencies). The overlap integral is given byFig. 4(b) that this is indeed the value the FOM converges to for vanishing slot width.
Figure 7(a) gives some insight into why the FOM drops so quickly for increasing slot width: The field inside the silicon rapidly diverges from the field of the slot-less waveguide, with field maxima moving away from the slot surface into the core of the two silicon regions and resembling the field distribution expected of two coupled waveguides cores (even though this SWG remains single mode). This results in a decrease of the optical field strength at the edges of the slot for a given maximum field in the silicon (max(ESi)). This weakening of the surface E-field can be quantified by introducing the parameter φ, as defined in Fig. 7(a). The decrease of the surface field is further worsened by reduction of max(ESi) itself. This is caused by the fact that the increased flux carried by the widened slot region has to be compensated by a reduction of the flux in the rest of the waveguide after field normalization.
Figure 7(b) compares the simulated FOM to K × max(ESi)2 × cos(φ)2, where K is a normalization constant and max(ESi) and φ were extracted from the field profiles.
The parameter φ can be predicted by a semi-analytical model. If one defines neff as the effective index of the waveguide, nslab as the effective index of the unetched silicon slab (of thickness wg_rh and clad by oxide on one side and polymer on the other, like the waveguide), α as the decay coefficient of the evanescent field inside the slot, β as the wave number of the waveguide, and if one approximates the field inside the silicon waveguide cores as max(ESi) × cos(k(x-wg_sw/2) + φ) × cos(ly + θ):
Figure 8 compares φ as predicted by Eq. (6) to the value extracted from simulated mode profiles. The rapid increase of φ with slot width accounts for about half the reduction of the overlap field-strength product, with the other half accounted for by the reduction of max(ESi).
Decreasing the slot width is not the only method allowing an increase of the slot overlap. A thicker silicon film, or equivalently larger ridge heights (wg_rh), result in higher overlaps as shown in Table 2 . This is due to the fact that for thicker silicon films and a fixed wg_ch, the width of the silicon waveguide cores wg_rw can be reduced while maintaining good field confinement inside the waveguide, so that the slot makes up for a larger portion of the entire waveguide. It should also be noted that the overlap is very sensitive to lateral confinement driven by the cladding height wg_ch. While the overlap field-strength product can be increased by either a higher ridge height and thinner ridge width (increasing the overlap) or a thinner slot width (increasing the field strength), the two methods fundamentally differ in some aspects. Both result in increased SWG capacitance, but reducing the slot width also increases the optical power density inside the slot and is thus ultimately reliability limited, while increasing the ridge height reduces the power densities (section 5). Nonetheless, the analysis in this paper focuses on 200 nm silicon, since this was our process development focus at the time of publication.
3.2. Optical losses, resistance and capacitance
In order to optimize the MZI, several other waveguide characteristics have to be parameterized: Implant induced SWG losses, as well as SWG capacitance and series resistance.
The optical field has a very clear exponential decay in the cladding region, so that the overlap with the implants and the resulting optical losses can be characterized by three numbers: The overlap with the core silicon area (the unetched areas of thickness wg_rh), the overlap with the cladding silicon, and the decay length of the field in the cladding (Fig. 9 ). The latter is described as the distance between the edge of the waveguide and the onset of moderate implants (imp_off), such that the overlap of the moderate implant region (imp_c2) with the cladding field is less than 10% of the total cladding optical field overlap.
For example for a 100 nm slot, and an implant offset imp_off = 330 nm (90% decay length), 43% (core overlap) + 0.9 × 7.7% (90% of cladding overlap) of the field overlaps with the low implant region, while 0.1 × 7.7% (10% of cladding overlap) of the field overlaps with the moderate implant region.
Figure 10 shows the capacitance of the SWG as a function of slot width. A RF relative dielectric constant of 4 was assumed for both silicon dioxide and for the polymer. The SWG capacitance was simulated by solving Poisson’s equation with a finite-elements solver (PISCES) and compared to the parallel plate approximation. Due to the fringe fields, simulated values exceed the parallel plate approximation by an approximately constant amount. For a typical slot width of 100 nm, the fringe fields account for almost half the total capacitance (136 pF/m). Hence, it is very important to base calculations on simulated results.
Series resistance was also simulated with PISCES. However, in this case the obtained resistances were almost exactly equal to estimates based on simple film thickness approximations, even for the core waveguide region where the directions of current flow significantly diverge from the horizontal. Hence these results are not further discussed.
4. Transmission line design
In section 4.1 a typical TL is designed by solving Maxwell’s equations explicitly with a finite-elements based eigensolver (HFSS). Based on inspection of the TL modes (in particular current distributions inside the silicon) an equivalent lumped element circuit for infinitesimal section lengths is proposed (sections 4.2 and 4.3). Predictive analytical models are then derived that allow calculating the impedance and the excess loss of phase-matched TLs from the SWG group index, capacitance and series resistance (section 4.4). These models are validated by comparison to TL simulation results. It was found that the TL characteristics predicted by the analytical models match the simulation results very well in the appropriate regime.
4.1. Geometrical parameters
In this section primary geometrical parameters are set based on simulation results in order to achieve phase matching and reasonable TL losses. Phase matching could be expected to be a problem due to the polymer and silicon dioxide index being around 2 at RF frequencies, and thus significantly lower than the group index of the SWG (3.1). As it turns out, the substantial capacitive loading induced by the SWG slows down the RF signal to such an extent that the opposite becomes true: It becomes challenging to maintain a low enough TL index. For thin slots below 100 nm it becomes increasingly challenging to phase match the TL while maintaining easy to fabricate geometries. It can be done up to a certain point with thick metal films and small tl_sp, but these parameters are respectively limited by fabrication and waveguide losses.
Figure 11 shows the sensitivity of the TL losses and effective index on design parameters (centered on the parameters given in Table 1) as extracted from finite-elements simulations. The group index of the SWG is 3.1, hence this should be the target for the TL effective index in order to obtain phase matching. The design resulted in a TL effective index neff = 3.36, which is slightly off target, but results in a negligible efficiency drop (4%) since the typical MZI length is expected to be relatively short (~9 mm for devices optimized for operation at 10 GHz, see section 5). An index of 3.1 could have been obtained by using thicker metal, or reducing the metal-to-metal spacing. However, both are expected to result in more challenging fabrication, and in the case of reduced metal spacing also higher waveguide losses since it brings the metal closer to the waveguides.
The 2 μm metal thickness was primarily driven by TL losses. Below 2 μm, the skin depth of the top and bottom of the metal overlap at 10 GHz and the series resistance of the aluminum lines quickly increases. In general, in order to achieve phase matching to the SWG a large metal stripe width (tl_w) and height (tl_h), and a small metal to metal spacing (tl_sp) were desirable (all of them decrease the linear inductance and thus also decrease the effective index of the loaded TL as explained at the end of section 4.4). Increasing the metal width becomes ineffective past a certain point, both in terms of losses and of phase matching, since the current concentrates in the vicinity of the metal edge facing towards the opposite metal strip.
4.2. Equivalent circuit for infinitesimal transmission line segments
Figure 12(a) shows the equivalent circuit for an infinitesimal section of loaded TL.
The classic telegraph line equivalent circuit (LTL, CTL and RTL) is complemented by a model for the SWG (red). The horizontal branch of the SWG model corresponds to currents flowing inside the silicon along the axis of the TL (Jz) while RSWG corresponds to currents flowing from the metal lines to the slot (Jx) across the series resistance of the SWG (axes are labeled in Fig. 13 ). It should be noted that for a quasi-TEM mode, such as would be obtained for highly conductive silicon, the current would predominantly flow along the axis of the TL and the horizontal branch would be the dominant contributor to the SWG model. On the other hand, a dominant vertical branch (RSWG) would correspond to currents inside the silicon flowing predominantly along the x-direction, resulting in a substantial deviation from the quasi-TEM approximation. In this case, Fig. 12(a) could be simplified into Fig. 12(b). The SWG could then be simply modeled by an additional capacitive loading of the TL ( = CSWG/(1 + RSWG 2CSWG 2ω2)) combined with a shunt conductance (expressed as = RSWGCSWG 2ω2/(1 + RSWG 2CSWG 2ω2)) resulting in excess TL losses (Fig. 12(c)).
In order to motivate the model shown in Fig. 12(b), the mode profile of a typical loaded TL is first obtained with a finite-elements mode solver and qualitatively inspected. Mostly, it is verified that with silicon implant concentrations compatible with acceptable waveguide losses, the current flow inside the silicon is predominantly along the x-direction, and that the H-field, and thus the self-inductance of the TL, are only slightly perturbed by the presence of the SWG, while the E-field, and thus the linear capacitance, are fundamentally modified.
A quantitative validation of the model results from obtaining the values for the TL impedance, phase velocity and transmission losses as a function of frequency via the finite-elements solver and comparing them to the trends predicted by the equivalent circuit (i.e., by fitting the finite-elements results based on formulas derived from the equivalent circuit model, but by leaving numerical values for LSWG, CSWG, RSWG, LTL and CTL as free fitting parameters). As a final validation step it is verified that the fitted LTL and CTL verify the relationship expected from the unloaded metal lines quasi-TEM mode (i.e., ), and that the fitted values for LSWG, CSWG and RSWG are consistent with the SWG characteristics extracted with PISCES in the electro-static approximation.
The motivation behind first fitting the curves and then comparing the fitted parameters, rather than directly comparing the finite-elements results to curves estimated based on the PISCES numbers, was to accommodate small changes in the parameter values either due to changes in the meshing, or to more fundamental reasons, while demonstrating quasi-perfect agreement of the functional relationship. As it turned out, the discrepancy between fitted values and independently estimated values was only 4% for the SWG capacitance and 15% for the SWG series resistance. It was unclear prior to detailed numerical analysis whether the capacitance of the unloaded TL and of the SWG could be simply taken as is in the combined model (as would be expected in a geometry with spatially cleanly separated E-fields), or whether spatial overlap of the E-field generated by the metal lines with the conductive silicon would induce sufficient interaction to break this simple model. As it turns out, CTL extracted from the simulated loaded TL properties agrees within 13% with the value extracted from the unloaded TL (with unimplanted, non-conductive silicon), and LTL agrees within 1%.
Another open question was whether the excess TL transmission losses, that is the TL losses generated by current flow inside the implanted silicon, is truly dominated by laterally flowing Jx, or whether longitudinal currents (Jz) are sufficiently high inside the silicon to have a significant impact on TL losses. Here too, in the investigated implant density regime losses can be almost entirely ascribed to laterally flowing currents. Had this not been the case, it would have been interesting to investigate whether forcing lateral only currents with a segmented geometry would have helped, however this turned out to be a moot point for the reasons stated above.
4.3. Transmission line mode profile properties
It is very educational to inspect the field and current profiles of the TL mode since they provide a qualitative justification for the simplified equivalent circuit model and for the fitting models applied later in this section.
Figure 13 shows the E- and H-fields of the loaded TL mode. It is apparent that the silicon has very little impact on the H-field. In fact, the H-field closely resembles the distribution of the stand-alone TL. This can be explained by the fact that the current densities in the silicon are more than an order of magnitude lower than in the metal (modeled as aluminum). Hence it is expected that the linear inductance of the loaded TL will be very close to the inductance of the unloaded TL. This conclusion is further reinforced by the fact that the currents in the silicon are mostly along the transverse x-direction, rather than the propagation direction (z), and are thus mostly generating z-components of the H-field that do not contribute to the self-inductance of the TL. The currents in the silicon are breaking the quasi-TE symmetry since they are predominantly transverse. This explains why the TL phase velocity can be significantly different from the cladding material.
The E-field on the other hand is heavily influenced by the presence of the silicon. In fact, most of the voltage is dropped across the slot of the SWG, as required in order to maintain high opto-electronic device performance. It is thus expected for the capacitance of the SWG to be a large portion of the loaded TL capacitance. We will show that the loaded TL capacitance can be closely approximated by the sum of the unloaded TL capacitance and of the SWG capacitance. This increased capacitance slows down the phase velocity of the TL mode, and allows phase matching to the optical SWG mode.
Figure 14 shows RF loss distributions and current distributions in the TL. As previously mentioned, it can be seen that Jz in the metal is an order of magnitude larger than the current in the silicon, and the latter is predominantly (again by more than an order of magnitude) along the x-direction. It can also be seen in Fig. 14(a) that the losses are dominated by resistive losses in the low doping density silicon close to the waveguide.
It might be surprising that the sharp maximum of the E-field in Fig. 13(b) does not correlate to a corresponding feature in the H-field, as would be expected from a quasi-TEM mode. In such a mode Ez and Hz are zero, such that the following holds:Fig. 15 . ThenFig. 15 that the gradient of Hz is mostly confined to the slot. Hz does not register in the H-field magnitude shown in Fig. 13(a) because it is two orders of magnitude smaller than the ambient Hy field generated by the metal stripes. This is a consequence of the fact that the length scale over which Hz varies, the slot height wg_rh = 0.2 μm is much smaller than the wavelength (~1 cm), so that a very small Hz component can still generate a strong enough gradient to account for Ex inside the slot. Even though Ex is approximately 40 times larger in the slot than outside (the spacing between the metal lines is 40 times the slot width), the corresponding Hz-field is more than two orders of magnitude smaller.
4.4. Equivalent circuit validation and loaded transmission line modeling
Figure 16 shows the simulated impedance and effective index of the loaded TL, as well as fitting results assuming functional relationships derived from the equivalent circuit model. The impedance and the effective index were independently fitted, with excellent consistency between the two resulting sets of fitting parameters, and between the fitting parameters and a-priori calculated capacitance and resistance values, thus validating the equivalent circuit model. The slight discrepancy between fit and simulation data at low frequencies is due to the linear resistance of the metal lines that was not included in the analytical model. At low frequencies the series resistance of the aluminum lines becomes comparable to iLω, which leads to a divergence of the TL impedance from its ideal high-speed value ), and of the TL index from its ideal high-speed value . It can be seen in both sets of curves that at high frequencies the characteristics asymptotically converge towards those of the unloaded TL, as the operation frequency exceeds the RC time constant of the SWG and the SWG capacitance is screened.
The following relation for the loaded TL impedance can be easily derived from the equivalent circuit and was taken as a basis for the functional form of the fit:
Table 3 summarizes the fitted parameters and compares the results of the two fits, as well as the fits to expected results obtained independently with PISCES.
The excess transmission losses induced in the resistive silicon can be modeled as the power dissipated by the series resistance of the waveguide, and are given byFigure 17 shows the excess TL losses generated by the resistive silicon (dashed black curve), as well as the excess losses predicted by Eq. (11). In this case, the model was not fitted but directly calculated based on the values reported in Table 3. It can be seen that the agreement between the simulated and predicted excess losses is relatively good overall, and particularly good below the cutoff frequency of the SWG. It can also be seen that the unloaded TL losses have the expected square root dependency on frequency, while the excess losses have a quadratic dependency as predicted by Eq. (11).
In order to obtain phase matching, the effective index of the TL given by Eq. (10) has to equate the group index of the SWG. In a system with relatively homogeneous dielectric indices such as here (the RF indices of the polymer and of silicon dioxide are both ~2), LTLCTL is constrained by the phase velocity of the unloaded TEM TL mode (LTLCTL~ncladding 2/c0 2), so that the second term, LTLCSWG, has to be adjusted to obtain phase matching. In other words, Eq. (10) determines the target for LTL, and the latter can be obtained by adjusting the geometry of the metal lines. For example in the case of the coplanar waveguide geometry used here, increasing the line to line spacing, reducing the metal thickness or the metal width, all increase the self-inductance of the line, the consequences of which on the TL index can be seen in Fig. 11.
5. Device optimization and analog link performance
In this section the models and parameterized SWG properties derived in the previous sections are used to evaluate performance of SWG based MZI modulators (section 5.2), as well as to optimize these modulators for analog optical links and to evaluate analog optical link performance (sections 5.3 and 5.4). Some type of FOM is always required to optimize the MZI in order to arbitrate between insertion losses and Vπ. However, the MZI performance shown in section 5.2 can also serve as indication of achievable modulator performance for other applications, since optimized device characteristics tend to be relatively insensitive on the details of the optimization function (as also shown in section 5.2).
5.1. Analog link figure of merit
The low Vπ of SWG based polymer MZIs is particularly attractive for analog optical links. In the latter, the low Vπ translates directly into a reduced noise figure (NF). Analog links are very noise sensitive, since any noise added to the waveform within the bandwidth of interest permanently destroys information, as opposed to digital data where thresholding operations and error correcting codes allow removing noise and perfect signal recovery.
Here, a simple amplitude modulated analog optical link is used as a vehicle to explore the potential of SWG based polymer modulators for analog data transmission (Fig. 18). A more detailed theory of amplitude modulated analog optical links can for example be found in . In the last decade, many techniques have been investigated to increase the spur free dynamic range and reduce the NF. For example, relative intensity noise (RIN) can be normalized out by using a two fiber link with a balanced receiver and the effect of shot noise can be reduced by biasing the MZI away from the 3 dB point in order to achieve a reduced average optical power . These biasing techniques are not further investigated, but can be straightforwardly applied to the devices described here.
In order to minimize the NF, optical analog links are often operated at power levels sufficiently high for the receiver noise to become negligible. Such a system is then limited by Tx noise and by shot noise, so that laser RIN and shot noise dominate the NF of the link. The electrical power gain of an analog link consisting of an MZI biased at the 3 dB point, an optical link, a photodetector and a transimpedance amplifier (TIA) is given byEq. (13) and (14). This is a much smaller contribution than the noise of the source resistor (Nin) because it propagates along the TL in the opposite direction than the light in the waveguide, so that there is no phase matching . A (wide) upper bound can be obtained by equating it to Nin. Even then it would only have a small impact on the typical NF investigated here (adding 0.4 dB to a 10 dB NF).
In the low RIN limit, the modulator FOM resulting in minimization of the analog link NF is ILZinPin/Vπ 2. Due to the high optical power densities inside the SWG, Pin might be limited by the power handling capability of the device rather than available laser output power. In that case, Pin scales with the slot width of the SWG in addition to Vπ and Zin, resulting in an analog link performance relatively insensitive to the slot width (section 5.3). For a laser power limited link, the analog link markedly improves with an approximately linear dependence on the inverse slot width. In the high RIN limit, the FOM of the modulator is Zin/Vπ 2 and also has an approximately linear dependence on the inverse slot width. In the following the MZIs are optimized for optical analog links operated in the shot noise limited regime, and the FOM chosen to minimize the link NF is ILZinPin/Vπ 2 assuming a reliability limited input power. For a fixed slot width (in which case only the device length and the implant profiles are being optimized), this FOM can be reduced to IL/Vπ 2 since Zin and Pin are fixed for a given waveguide geometry.
5.2. Device optimization
In order to derive device performance, a couple of assumptions have to be made on material properties and process quality. Here we assume relatively conservative numbers of r33 = 50 pm/V and unimplanted (baseline) waveguide losses of 6 dB/cm. To place this in context, electro-optic coefficients up to 300 pm/V have been recently demonstrated for advanced organic nonlinear polymers, and we recently measured baseline SWG losses of 8 dB/cm. An r33 of 30 pm/V has been previously experimentally demonstrated  in SWGs using polymers with an ideal, fully poled coefficient of 100 pm/V (the discrepancy was attributed to partial poling). We are also confident that waveguide losses can be improved with some process development. Vπ for higher r33 can be easily derived by linearly rescaling results reported here.
Device parameters (length and implant profiles) in this section are optimized in order to achieve maximum IL/Vπ 2 at fixed slot width. The optimum waveguide width wg_rw is extracted from Fig. 5. The implant profile (imp_c1, imp_c2 and imp_off) is then optimized to obtain maximum IL/Vπ 2. For a given implant profile, waveguide losses are calculated based on field overlap integrals (Fig. 9) and the absorption data given in . TL losses are evaluated by adding the excess losses estimated with Eq. (11) to the baseline losses of an unloaded TL. Assuming perfect phase matching, the Vπ of the SWG modulators isEq. (16) the relevant losses are α/2 since α corresponds to the RF power losses, but the relevant drive strength is voltage. The optimum device length (that maximizes IL/Vπ 2) can be related to TL losses (α in neper/length) and SWG losses (β in neper/length) with following relationship:
Figure 19 shows the performance metrics of the optimized MZI. It might be surprising that the insertion losses decrease for devices optimized for higher frequencies. This is due to the fact that the optimized device length shrinks faster than the increase in implanted waveguide losses (Fig. 20 ). It is also important to notice that the TL impedance is highly sensitive to slot width. This impacts analog link performance (section 5.3). As a side note, in a process where the implant concentrations are fixed, imp_off remains a lithographically defined free parameter that can partially compensate for the fixed implants. Rather than staying on the order of the evanescent field folding length (~300 nm), it will then have much larger variations as a function of optimization frequency.
It can be seen that the input impedance of the GSG TL is very mismatched from 50Ω. However the device can be driven with two 50Ω inputs in a dual RF drive configuration, since each of the individual SG lines are approximately 50Ω (and exactly so for a 120 nm slot). This dual drive could for example be provided by an RF power splitter. Assuming a 50 pm/V polymer and a 100 nm slot, a DC drive voltage of Vπ < 200 mV is predicted for a device optimized for and operated at 10 GHz (with a 26 GHz bandwidth). This can be compared to the device referred to in  with a Vπ of 1.1 V at 12 GHz. In other words, even assuming modest nonlinear coefficients, the polymer device is predicted to beat the best lithium niobate based devices by a factor 6 in drive voltage, and approximately a factor 30 in drive power (Vπ 2/Zin). Assuming best of class polymers (300 pm/V), the SWG drive voltage would be reduced to < 35 mV, or a factor ~1000 improvement in drive power. In order to obtain a fair comparison, the device in  is assumed to be driven in dual RF drive configuration, i.e both arms of the MZI are supplied with an RF voltage so that the reported Vπ is halved relative to the single RF drive voltage. It should be noted that here a halved Vπ is assumed rather than the improvement mentioned in the datasheet, since in the datasheet the Vπ is referred to the input of the RF power splitter supplying the dual RF drive, while in this paper the Vπ is referred to the input ports of the MZI (the power penalty is taken into account at the system level via Zin in Eq. (14).
One might wonder how dependant these results are on the specific choice of FOM. Figure 21 shows TL and SWG propagation losses as a function of the lowest concentration implant (inside and in the direct vicinity of the SWG) that primarily drives SWG and TL losses. It can be seen that the optimum concentration is located at the elbow of both transmission loss curves. It is thus expected for the optimized implant concentration to be relatively insensitive on the particular FOM. Indeed, optimizing devices for a FOM of IL/Vπ X results in implant concentrations for the lowest density implant imp_c1 ranging from 4.8e16 cm−3 for X = 1 to 6.3e16 cm−3 for X = 3 at 10 GHz, and from 2.3e17 cm−3 for X = 1 to 4.0e17 cm−3 for X = 3 at 100 GHz. The device length 2log(1 + Xα/2β)/α also stays within a factor ~2, ranging from 5.3 mm to 12.3 mm at 10 GHz and from 2.0 mm to 3.0 mm at 100 GHz.
5.3. Analog link performance
Based on existing commercial reliability studies with long term reliability (extrapolated 25 years / 85C), we conservatively estimate that a 100 nm slot SWG should be able to handle at least a few mW of power (at the beginning of the SWG). This should be really understood as a lower bound to the power handling capability, since the estimate is based on reproducing similar optical power densities in the polymer as in studies that showed no degradation in accelerated testing. In this section we also assume an additional 3 dB of insertion losses to account for chip to fiber transitions (typical single mode laser packaging losses are taken as a baseline, since they also consist of submicron waveguides) and 2 dB of insertion losses for other on-chip optics on either side of the MZI (y-junctions or directional couplers, as well as SWG to ridge waveguide mode converters). In other words, there are an additional 10 dB total additional Tx losses assumed here, with 5 dB before the MZI and 5 dB after the MZI. In the graphs in this section, optical power levels refer to the optical power at the beginning of individual SWGs, since it is assumed that power levels are reliability limited, but schemes are also compared at the end of the section in terms of required overall laser power. Semiconductor lasers with ultra-low RIN of −160 dB/Hz can be obtained (e.g. JDS Uniphase CQF938 series) and are assumed to be used here. Finally, nonlinear coefficients of 150 pm/V are assumed in this section, which is close to the coefficients demonstrated for best of class polymers (300 pm/V), but slightly reduced to allow for suboptimal poling, small polymer instability or more conventional materials.
Typical receiver power levels are on the order of 0.1 mW in this section (i.e., after attenuation due to typical insertion losses and fiber to chip coupling losses). Receiver noise generally cannot be ignored at these optical power levels, so that receiver noise needs to be added to Nex is Eq. (14). The development of ultra-low capacitance integrated photodetectors has enabled the design of receivers with record low noise floors  which would allow the NF to be shot noise dominated even at power levels as low as a few hundred μW. However, for simplicity’s sake typical receive optical subassembly (ROSA) input referred noise currents of (rms) are assumed (as can be obtained from off-the-shelf parts). The photodetector sensitivity is assumed to be 0.85 A/W.
Figure 22 shows the NF for analog links as a function of slot width and optical power assuming an r33 of 150 pm/V. When the slot width is varied in Fig. 22(a), the optical power launched into the SWG is also intrinsically varied to maintain a constant optical power density in the polymer (corresponding to 15 mW launched into a 100 nm slot SWG). As already pointed out in section 5.1, the NF is relatively insensitive to slot width because the drive voltage enhancements are negated by reduced TL impedance and reduced optical power levels (to maintain constant, reliability limited optical power densities in the polymer region). For this reason the slot width can be adjusted to obtain joint impedance and phase matching without incurring any major penalties. Another technique used to increase the optical overlap, increasing the film thickness (section 2.1) would yield very different results. In this case the SWG capacitance would also increase, and hence the TL impedance decrease. However, the optical power density in the polymer would decrease, allowing increasing Pin (as opposed to having to decrease it). Thus, it is expected that the NF would scale very favorably with increasing silicon film thickness.
Figures 22(b) and (c) compare the simple link shown in Fig. 18 to a dual fiber solution with the complementary outputs of the MZI sent to a balanced receiver. This is a common technique to normalize out RIN. The balanced receiver also allows halving the optical power relative to the single ended link in the shot noise and receiver noise limited regime .
5.4. Link architecture with homodyne amplification
In this section we address other architecture improvements targeted specifically at alleviating the power handling limitations of SWG based MZIs by using homodyne amplification of the signal inside the Tx sub-system.
This scheme is shown in Fig. 23 . Essentially, the idea is to modulate the phase in one arm only, but to allow the power levels in the other arm (Pamp) to be substantially higher, thus amplifying the signal. Since the lower arm can be made with a conventional waveguide without exposure to the polymer, it can be allowed to transport much higher power levels. The optical signal then scales as, thus resulting in amplified signal levels. As a penalty for using single arm phase modulation rather than a push-pull configuration, Vπ is multiplied by two. A side benefit of this architecture is that the TL impedance is doubled, since it is only driving a single SWG (section 4.4). The shot noise contribution to the noise factor (proportional to the ratio of shot noise power to link gain and input noise) scales as
The receiver noise contribution to the noise factor can be reduced by increasing Pamp, since the signal levels can be arbitrarily increased. The big drawback of the single ended homodyne scheme is that it is very sensitive to RIN, since the average power levels (~Pamp/2) are much larger than in the push-pull configuration. We found that in a typical single ended configuration using these devices, the increased sensitivity to RIN cancels out the benefits from the reduced receiver noise. For this reason, the homodyne scheme is only further investigated in the context of a balanced receiver link. Figure 24 shows estimated performance of this analog link architecture. It can be seen that for high values of Pamp, the NF approaches the shot noise limit. Note that in this section Psig refers to the on-chip power at the beginning of the SWG and Pamp refers to the on-chip power at the input port of the combiner (directional coupler).
It should also be noted that this scheme only makes sense when the power handling capabilities of the phase modulator and the passive optics are highly asymmetric as with polymer based SWGs, since it would otherwise be more optimum to split the power equally between two phase modulators in a push-pull scheme.
Table 4 summarizes the optical power levels for several link architectures. The Lithium Niobate modular has a Vπ that is 16 times larger than what is predicted for a SWG based MZI
with r33 = 150 pm/V. It would thus be expected of the required optical power for the SWG based modulator to be 250 times smaller in order to obtain the same NF. However the Lithium Niobate modulator has smaller insertion losses (9 dB versus 17 dB) and the corresponding link does not suffer from receiver noise due to the high optical power levels. After taking these effects into account, the power reduction resulting from using SWG modulators is expected to be a factor ~30. Beyond allowing many more analog links for a given amount of power, this could be a game changing improvement since 50 mW can be readily sourced by a semiconductor laser diode.
Table 4 also summarizes the maximum input electrical power limited by link linearity, assuming that the peak-to-peak input voltage should remain below 10% of Vπ. While the maximum input powers, on the order of 1 μW, are relatively low, they seem to be roughly in line with a wireless receiver with a typical sensitivity floor of −65 dBm and a 30 dB preamplifier.
We believe these systems to be practical since the required optical power levels for the balanced homodyne architecture are within the range of optical power densities that polymers have been shown to reliably handle, with some room to allow for reduced r33 and less heroic, presumably more stable polymers. For example, a 20 GHz, 5 dB NF could still be obtained by launching 7 mW of power into a 100 nm slot SWG with r33 = 100 pm/V. Finally, the links investigated here could be substantially improved by using best of class ultra low noise receivers , since they are exceptionally sensitive to receiver noise due to the fact that the optical power levels are more than an order of magnitude lower than those in conventional optical analog links, and are getting close to the power levels typically seen in digital links.
We have optimized transmission line driven slot waveguide based Mach-Zehnder interferometers and applied them to a typical optical analog link architecture. Even under conservative assumptions, these devices feature record low driving voltages (Vπ < 200 mV at 10 GHz). With best of class electro-optic materials, their driving voltage could be reduced to below 35 mV. Since low driving voltage scales directly into low transmitter noise figures, these devices will have a large impact on analog optical links.
As part of this analysis, several fundamental aspects of the devices were derived. The fundamental limit to the optical overlap enhancement was explained. Analytical models for loaded transmission lines were derived based on an equivalent circuit model, and validated by comparison with finite-elements simulation results. This allows joint RF-optical optimization without iterating transmission line designs and provides guidance on the design trade-offs. Sensitivities of analog link performance on design parameters were calculated. In particular, it was determined, unexpectedly, that the link performance is relatively insensitive to slot width when optical power levels are limited by the power handling capability of the device. It is predicted that devices built out of thicker silicon will yield even higher link performance. Finally, a transmitter architecture was shown that overcomes receiver noise even when exposing the slot waveguides to very low optical power levels, thus enhancing long term system reliability.
The authors would like to thank Gernot Pomrenke, of the Air Force Office of Scientific Research, for his support through an AFOSR Young Investigators Program Grant, and would like to acknowledge support from the NSF STC MDITR Center and the Washington Research Foundation.
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