On-chip integration of III-V laser diodes and photodetectors with silicon nanowire waveguides is demonstrated. Through flip-chip bonding of GaInNAs/GaAs laser diodes directly onto the silicon substrate, efficient heat dissipation was realized and characteristic temperatures as high as 132K were achieved. Spot-size converters for the laser-to-waveguide coupling were used, with efficiencies greater than 60%. The photodetectors were fabricated by bonding of InGaAs/InP wafers directly to silicon waveguides and formation of metal-semiconductor-metal structures, giving responsivities as high as 0.74 A/W. Both laser diode and the photodetector were integrated with a single silicon waveguide to demonstrate a complete on-chip optical transmission link.
© 2010 OSA
Recent progress in high performance silicon large scale integration (Si-LSI) has faced major challenges from limitations in the bandwidth of electrical interconnects due to signal delay, and also from heating due to the large density of electrical interconnects. Of the potential solutions to overcome these issues optical interconnects are of considerable interest since they feature very large bandwidths that could ultimately lead to more efficient ways of routing information within LSI circuits [1, 2]. Over recent years there has been extensive research into the various types of silicon based optical components required for on-chip optical interconnection. Such components have included waveguides [3–5], light sources [6–10], photodetectors [6, 11–15] and modulators [12, 16–18]. Because of the difficulty in realizing electrically-pumped silicon-based light-emitters, direct integration of III-V materials is a strong candidate for realizing an efficient on-chip light source. For low power consumption it is essential that the output from the laser diode (LD) is efficiently coupled to the optical waveguide, and there are several approaches reported in the literature, such as an evanescent coupling  and butt-joint coupling, with and without spot-size converters (SSC) [6, 8]. However, stable lasing operation at high operating temperatures is problematic since the light sources are typically integrated on dielectric materials, which have poor heat dissipation and lead to a degradation in the laser performance. Photodetectors (PDs) are also key components for on-chip integration technologies, and both III-V compound material systems [6, 11] and germanium (Ge) [12–15] have been successfully employed as detector materials. The III-V material can be integrated by wafer bonding techniques [19, 20] and have superior characteristics to germanium, with a large absorption at 1.3 and 1.5 μm wavelengths and a relative low dark current, attributed to good crystal quality. This enables low-power operation and small device size. In this paper, on-chip light sources and photodetectors are integrated with Si waveguides, and an on-chip optical transmission link is demonstrated by combining these components. The light source is integrated by flip-chip bonding directly onto the Si substrate allowing for high temperature operation, and spot-size converters are used for efficient coupling to the Si waveguide. An InGaAs/InP metal-semiconductor-metal (MSM) structure is integrated using wafer bonding techniques and used for photodetection, and high responsivity is demonstrated.
2. Laser diode integration with Si waveguide
2.1 Device design
Figure 1(a) shows a schematic illustration of a laser diode (LD) integrated with a Si waveguide with 450 nm wide and 200 nm high. The waveguide is formed on the buried oxide (BOX) layer, and the LD chip is flip-chip bonded directly to the Si substrate where the BOX layer has been partially etched away. Light output from the LD enters the etched facet of the BOX layer and is directly coupled to waveguide through an SSC with a thin-overcladding layer . Direct bonding of the LD chip to the Si substrate leads to efficient heat dissipation and allows for stable lasing even at high temperatures. Light propagation in the SSC structure was simulated using 3D beam propagation method (BPM) for a cladding layer (4-μm-wide and 0.7-μm-thick) with refractive-index of 1.6, and assuming a TE-polarized incident light with a wavelength of 1.55 μm. An inverse tapered waveguide of length 300 μm is used for the SSC, with the waveguide tapering 450 nm wide to a tip width of 80 nm. The gap between the LD and the BOX facet is assumed to be 5 μm, which can be further reduced by using high-accuracy flip-chip bonding techniques or by fabricating the laser structure after integrating the III-V epitaxial layers via wafer bonding. The spot-size of the laser output has a width of 4 μm and height of 1 μm, and is guided by the thin overcladding layer in the SSC and evanescently coupled to the Si waveguide. The simulation result demonstrates a high coupling efficiency of over 80% from the LD to the Si waveguide (Fig. 1(b)).
The alignment tolerance of the LD chip bonding is investigated by FDTD simulations and as shown in Fig. 2 . To keep the excess loss to within 1 dB, the offset in the lateral direction needs to be less than ±0.9 μm. This value can be improved up to ±1.5 μm by tapering the overcladdding layer to an input width of 8 μm (Fig. 2(a)), as shown in Fig. 2(b). The tolerances for the vertical displacement and the gap between the LD facet and the BOX facet are shown in Fig. 2(c) and (d) respectively. To keep with 1 dB excess loss a vertical alignment accuracy of better than ±0.5 μm is required and the distance between the LD facet and the BOX facet should be less than 7 μm. The height of the active layer can be controlled to a precision of as ±0.1 μm by adjusting the bonding metal thickness, thus keeping well within the 1 dB tolerance for the vertical alignment for various LD chips with different layer structures. The alignment accuracy (3σ) of the flip-chip bonding used in this paper is ±2.2 μm in lateral direction (Fig. 2(b)) and ±1.4 μm in axis direction (i. e. gap direction as shown in Fig. 2(d)). The throughput is about 60 chips/hour. Taking account of the alignment accuracy of the flip-chip bonding machine, the coupling efficiency is estimated to be 35% in the worst case and 85% in the best case from the theoretical investigation shown in Fig. 2. In case of using high-accuracy flip-chip bonding machine with less than 1 μm , the efficiency in the worst case could be improved to be more than 50%.
2.2 Fabrication and characterization
The Si waveguides were fabricated from a silicon-on-insulator (SOI) substrate which had a silicon thickness of 200 nm. The waveguides and SSCs were defined by electron-beam (EB) lithography and formed by a dry etch processing. The waveguide width was 450 nm, and the tip of the SSC was 80 nm. To allow flip-chip bonding of the LD, the BOX layer was removed and alignment marks and bonding pads were formed using AuSn. The AuSn thickness was used to control the height of the active layer so that it was well aligned to the Si waveguide. A polyimide overcladding layer was then formed with an input taper width of 8 μm (tapering down to 4 μm), and the LD was flip-chip bonded to the substrate. The LD had a 5 μm wide ridge-waveguide structure planarized by polyimide, a cavity length of 600 μm, a chip width of 500 μm and the facets were as-cleaved. The active region of the LD was an GaInNAs/GaAs single-quantum-well layer, and the emission wavelength was 1.25 μm. The details of LD structure are shown in Fig. 1(a). The AuSn thickness was adjusted in order that the center of beam spot from the LD matched to the boundary between BOX and polyimide overcladding layer. Figure 3(a) shows a scanning electron microscope image of the integrated LD chip, Si waveguide and SSC. The gap between the LD facet and the BOX facet was measured to be less than 2 μm. Figure 3(b) shows the light-current characteristics for the integrated LD chip at temperatures ranging from 20 °C to 85 °C. The threshold current and slope efficiency at 20 °C are 50 mA and 0.11 W/A, respectively. Comparing the performance of the device before and after flip-chip bonding (Fig. 3b), there is no degradation in threshold current incurred by the flip-chip bonding process. It is therefore possible to make an estimate of the coupling efficiency to the Si waveguide by comparing the slope efficiency at 20 °C before and after bonding. For this particular device a coupling efficiency of 62% was obtained. This is the typical value, because the coupling efficiency is estimated to be ranging from 35% to 85% as mentioned above. Measured coupling efficiencies for all devices were within this range. The influence of the back reflection from the waveguide was not clearly observed with the air-gap. Filling the index matching materials into the gap may be needed for the practical devices to achieve more stable operation. Figure 3(c) shows the threshold current dependence of the LD on the operating temperature, with a characteristic temperature (T0) of 132 K. This high characteristic temperature is attributed to the large band-offset of the GaInNAs/GaAs material system, and since the device is directly bonded to the substrate, the excellent heat dissipation properties of silicon means that the characteristic temperature measured is the same as that prior to flip-chip bonding (FCB).
3. InGaAs/InP MSM-PD integrated on Si waveguide
3.1 Device design
Figure 4(a) shows the schematic illustration of an InGaAs/InP MSM-PD integrated with an Si waveguide. The InGaAs absorption region is directly bonded to the Si waveguide, and the MSM electrode is formed on the top surface. Input optical signals traveling through the Si waveguide are evanescently coupled to the absorption region, and detected as a photo-current. The Si waveguide is 450 nm wide and 200 nm high, with a 3-μm-thick BOX layer beneath it. Direct bonding of the InGaAs layer to the Si waveguide enables smaller device size due to the efficient optical coupling from waveguide to InGaAs absorption layer. MSM electrodes of composition Pt/Ti/Pt/Au were used due to their simple structure and a low-capacitance, which leads to low-power and high-speed operation with the data rate of 10 Gb/s. A Schottky barrier enhancement layer with a 40 nm thick InAlAs layer was inserted between the InGaAs absorption layer and electrode metal to order to reduce the dark current. Light propagation in the device was simulated by 3D beam propagation modeling, assuming a TE-polarized light with the wavelength of 1.55 μm, and a PD width of 4 μm. Figure 4(b) shows the cross-section of the simulated structure, and optical field distribution along a Si waveguide with an InGaAs layer thickness of 400 nm, simulated using the beam propagation modeling. Optical power in the Si waveguide evanescently couples to the InGaAs layer and decreases in intensity due to absorption. An InGaAs layer thickness of 400 nm was employed for the fabricated device because this resulted in multi-mode guiding, and as a result the light did not efficiently couple back in to the Si waveguide which could reduce the effective absorption length of the device. The reflection at the edge of the InGaAs absorption region was also investigated by finite difference time domain simulations, and was found to be small, with values of ~0.1%. This low reflection is due to the strong optical confinement in Si waveguide, which enables isolator-free integration with optical sources.
3.2 Fabrication and characterization of MSM-PD
MSM-PD devices integrated with Si waveguides were fabricated on SOI wafers comprising 200 nm top-Si layer and 3-μm thick BOX layer. Si waveguides with a width of 450 nm were fabricated by EB lithography and dry etching process as described in the section above. The InGaAs absorption layer epitaxially grown on an InP substrate was directly bonded to the SOI wafer with the fabricated Si waveguide structures using a surface activation bonding technique with Ar ion-beam. During the ion-beam irradiation, metals inside the chamber were also sputterd and deposited on the wafer with Si waveguides, resulting in the increase in the waveguide loss. After selective removal of the InP substrate by wet chemical etching, high-mesa structures for the PD were formed by a combination of dry and wet chemical etching, and the entire structure was planarization by polyimide. After forming interdigitated MSM Schottky electrodes of Pt/Ti/Pt/Au on the mesa surface, the passivation layer and contact metal pads were formed. A 3 µm thick SSC overcladding layer was formed to complete the device fabrication. Figure 5(a) shows a microscope image of the MSM-PD device integrated with the Si waveguide. The response of the fabricated MSM-PD was measured by light coupled to the Si waveguide via the SSC using a lensed fiber.
Figure 5(b) shows I-V characteristics for a PD with dimensions 20 μm in length and 2 μm in width having MSM electrode spacing of 1μm. A responsivity of 0.74 A/W was obtained at bias of 2 V and for the TE-polarized light at the wavelength of 1550 nm, where a 3 dB coupling loss from the fiber to Si waveguide and waveguide losses were assumed in the estimation of the responsivity. This loss was estimated from the experimental results of the coupling and the waveguide propagation loss measurement prepared on the same wafer of PDs. The measured dark current for a bias voltage of 1 V was 1 μA. This large dark current was due to the poor characteristics of the Schottky electrode and can be in principle be reduced down to 10 nA since characterization of the Schottky electrodes prior to wafer bonding showed a lowest dark current of 10 nA. The capacitance of the integrated MSM-PD was measured to be 40 fF.
4. Realization and characterization of on-chip optical transmission
On-chip optical transmission was demonstrated by incorporating the LD chip and the PD with a Si waveguide. The fabrication of the device started from the PD formation. After covering the PD area with photoresist, the BOX layer was etched down to the Si substrate for the LD integration. Metal patterns for FCB alignment and SSCs for efficient coupling of the laser output to the Si waveguide were fabricated next. Finally, FCB of the LD chip was carried out to complete the full process. The PD output current as a function of the LD drive current is shown in Fig. 6 . for the left y-axis, and the right y-axis shows the corresponding LD output power. The PD output current increases linearly from the threshold current value of the laser, thus demonstrating on-chip transmission of light from the LD to the PD via a Si waveguide. The transmission efficiency from LD to PD (i.e. the ratio of the PD output current to output power from the LD) is estimated to be 0.025 A/W. This efficiency is lower than expected, and was attributed to an increase in waveguide loss due to small amounts of metal (Fe, Ni, Cr) contamination during III-V wafer bonding with Ar ion-beam irradiation. The excess waveguide loss was estimated to be ~10 dB. The metal contamination could be reduced during the wafer bonding process by using Ar fast atomic beam (FAB) irradiation. This would lead to an improvement in the waveguide losses down to 3 dB/cm, and the efficiency could increase to 0.46 A/W, assuming a coupling efficiency from the LD to Si waveguide of 62% and a PD responsivity of 0.74 A/W.
7. Summary and conclusion
We have demonstrated a laser diode with low-loss coupling and a high-responsive photodetector integrated on a Si waveguide, and on-chip optical transmission by combining both devices. Coupling efficiency of the laser diode to the Si waveguide of over 60% was achieved, and a responsivity of the MSM photodetector of 0.74 A/W was obtained. Direct bonding of the laser diode chip to Si substrate improved heat dissipation, resulting in stable operation at high temperature. Photodetectors with high responsivity were realized with direct bonding integration. On-chip optical transmission was achieved, and it is anticipated that the efficiency could be improved to 0.46 A/W by reducing waveguide loss. These results indicate that the integration structure investigated here are a promising technology to realize on-chip optical interconnection.
The authors would like to acknowledge Dr. M.G. Thompson (Centre for Communications Research and the Centre for Quantum Photonics at the University of Bristol) for fruitful discussions.
References and links
1. D. A. B. Miller, “Rationale and challenges for optical interconnects to electronic chips,” Proc. IEEE 88(6), 728–749 (2000). [CrossRef]
2. M. Haurylau, G. Chen, H. Chen, J. Zhang, N. A. Nelson, D. H. Albonesi, E. G. Friedman, and P. M. Fauchet, “On-chip optical interconnect roadmap: challenges and critical directions,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1699–1705 (2006). [CrossRef]
3. T. Tsuchizawa, K. Yamada, H. Fukuda, T. Watanabe, J. Takahashi, M. Takahashi, T. Shoji, E. Tamechika, S. Itabashi, and H. Morita, “Microphotonics devices based on silicon microfabrication technology,” IEEE J. Sel. Top. Quantum Electron. 11(1), 232–240 (2005). [CrossRef]
5. H. Yoshida, T. Sato, K. Ohira, R. Hashimoto, N. Iizuka, and M. Ezaki, “A novel thin-overcladding spot- size converter for efficient silicon-wire optical interconnections and waveguide circuits,” in Proceedings of 5th IEEE International Conference on Group IV Photonics (Institute of Electrical and Electronics Engineers, New York, 2008), pp. 377–379.
6. G. Roelkens, D. Van Thourhout, R. Baets, R. Nötzel, and M. Smit, “Laser emission and photodetection in an InP/InGaAsP layer integrated on and coupled to a Silicon-on-Insulator waveguide circuit,” Opt. Express 14(18), 8154–8159 (2006). [CrossRef] [PubMed]
7. A. W. Fang, H. Park, O. Cohen, R. Jones, M. J. Paniccia, and J. E. Bowers, “Electrically pumped hybrid AlGaInAs-silicon evanescent laser,” Opt. Express 14(20), 9203–9210 (2006). [CrossRef] [PubMed]
8. J. V. Campenhout, P. R. Romeo, D. V. Thourhout, C. Seassal, P. Regreny, L. D. Cioccio, J.-M. Fedeli, and R. Baets, “Design and optimization of electrically injected InP-based microdisk lasers integrated on and coupled to a SOI waveguide circuit,” IEEE J. Lightwave Technol. 26(1), 52–63 (2008). [CrossRef]
9. M. Kapulainen, S. Ylinen, T. Aalto, M. Harjanne, K. Solehmainen, J. Ollila, and V. Vilokkinen, “Hybrid integration of InP lasers with SOI waveguides using thermocompression bonding,” in Proceedings of 5th IEEE International Conference on Group IV Photonics (Institute of Electrical and Electronics Engineers, New York, 2008), pp. 61–63.
10. D. Liang, M. Fiorentino, T. Okumura, H.-H. Chang, D. T. Spencer, Y.-H. Kuo, A. W. Fang, D. Dai, R. G. Beausoleil, and J. E. Bowers, “Electrically-pumped compact hybrid silicon microring lasers for optical interconnects,” Opt. Express 17(22), 20355–20364 (2009). [CrossRef] [PubMed]
11. H. Park, Y. H. Kuo, A. W. Fang, R. Jones, O. Cohen, M. J. Paniccia, and J. E. Bowers, “A hybrid AlGaInAs-silicon evanescent preamplifier and photodetector,” Opt. Express 15(21), 13539–13546 (2007). [CrossRef] [PubMed]
12. L. Chen, K. Preston, S. Manipatruni, and M. Lipson, “Integrated GHz silicon photonic interconnect with micrometer-scale modulators and detectors,” Opt. Express 17(17), 15248–15256 (2009). [CrossRef] [PubMed]
13. T. Yin, R. Cohen, M. M. Morse, G. Sarid, Y. Chetrit, D. Rubin, and M. J. Paniccia, “31 GHz Ge n-i-p waveguide photodetectors on Silicon-on-Insulator substrate,” Opt. Express 15(21), 13965–13971 (2007). [CrossRef] [PubMed]
14. D. Ahn, C. Y. Hong, J. Liu, W. Giziewicz, M. Beals, L. C. Kimerling, J. Michel, J. Chen, and F. X. Kärtner, “High performance, waveguide integrated Ge photodetectors,” Opt. Express 15(7), 3916–3921 (2007). [CrossRef] [PubMed]
15. S. Assefa, F. Xia, S. W. Bedell, Y. Zhang, T. Topuria, P. M. Rice, and Y. A. Vlasov, “CMOS-Integrated 40GHz Germanium Waveguide Photodetector for On-Chip Optical Interconnects,” in Optical Fiber Communication Conference, OSA Technical Digest (CD) (Optical Society of America, 2009), paper OMR4. http://www.opticsinfobase.org/abstract.cfm?URI=OFC-2009-OMR4.
19. I. Christiaens, G. Roelkens, K. D. Mesel, D. V. Thourhout, and R. Baets, “Thin-film devices fabricated with benzocyclobutene adhesive wafer bonding,” IEEE J. Lightwave Technol. 23(2), 517–523 (2005). [CrossRef]
20. M. M. R. Howlader, T. Watanabe, and T. Suga, “Investigation of the bonding strength and interface current of p-Si/n-GaAs wafers bonded by surface activated bonding at room temperature,” J. Vac. Sci. Technol. B 19(6), 2114–2118 (2001). [CrossRef]