We demonstrate low loss shallow-ridge silicon waveguides with an average propagation loss of 0.274 ± 0.008 dB/cm in the C-band (1530 nm - 1565 nm). These waveguides have a cross section of 0.25 µm by 2 µm and are fabricated by standard photolithography and dry etching. We also investigate a compact double-level taper which adiabatically couples light from these waveguides to silicon strip waveguides enabling tight bends.
©2010 Optical Society of America
Silicon photonics is gaining interest for a broad spectrum of applications, including optical interconnects, sensing, metrology, and microwave and RF photonics [1–4]. Submicron wide deeply etched waveguide structures are often used in order to achieve efficient and high speed active photonic devices together with compact structures enabled by small waveguide bending radii. These structures are typically fabricated on SOI substrates with a top silicon thickness of around 0.25 µm [5–14]. With a ~0.5 um width, such waveguides exhibit very low bending loss for few-micron-radius bends, enabling many compact and large free spectral range photonic components. However, the lowest propagation loss reported for these waveguides to date at λ = 1550 nm is 1-2 dB/cm [7, 8], which is not suitable for applications such as routing waveguides in optical interconnects (the waveguide length may be a few tens of centimeter for chip to chip communications ) and very narrow bandwidth filters in RF photonics. Recently, several groups have reported shallow-ridge or thin silicon waveguides with losses of 0.3 – 1.0 dB/cm by a selective oxidation fabrication technique [15–19]. With this technique, however, it may be difficult to control the critical dimensions of fabricated devices since the thermal oxidation rate would be affected by device density, hard mask thickness, and the cross section of the waveguides. In this paper, we report low loss silicon ridge waveguides fabricated on SOI substrates with a top silicon thickness of 0.25 µm by CMOS-standard optical lithography and dry etching processes. These waveguides have an average propagation loss of 0.274 dB/cm over the C-band for the fundamental quasi-TE mode. To the best of our knowledge, this is the lowest loss for silicon waveguides with similar geometry using standard lithography and dry etching. We also investigate that efficient coupling between these waveguides and submicron wide strip waveguides with the same silicon height can be realized using a double-level taper structure.
2. Design and fabrication
It is well known that the propagation loss of silicon waveguides arises mainly due to light scattering from the etched sidewalls. Minimizing the optical field overlap with etched interfaces can effectively reduce the waveguide propagation loss. Increasing waveguide width and decreasing etch depth can both realize this purpose. Here, we design a shallow-ridge waveguide. The waveguide width and height is 2 µm and 0.25 µm respectively, and the etch depth to form the ridge waveguide is 0.05 µm. For a wavelength of 1.55 µm, simulation indicates that the effective index and group index of the fundamental quasi-TE mode are ~2.9 and ~3.7, respectively. A modal profile is shown in Fig. 1(a) and the power confinement in the silicon is approximately 84%. In Fig. 1(b), we present the simulation results on effective index change and group index change with etch depth. If we allow an etch depth tolerance of ± 0.01 µm around the etch depth target of 0.05 µm, the group index variation is about 0.0033, which results in a delay time difference about 5 ps for a propagation length of 50 cm. Therefore, the proposed waveguide geometry may allow transmission at high data rates of up to 40 Gbps with a reasonable fabrication tolerance. In addition, this waveguide can support three quasi-TE modes but does not support the quasi-TM mode [20, 21]. The minimum waveguide width to achieve a single quasi-TE mode is about 0.8 µm. We also simulate the bending loss with various bending radii and present the results in Fig. 1(c), from which we determine that a 90° bending with a radius of 100 µm has a theoretical radiation loss less than 10−4 dB. In order to accurately measure waveguide losses of the order of 0.1 dB/cm with the accuracy less than 0.01 dB/cm, we designed spiral shaped waveguides with lengths ranging from a few centimeters to 64 centimeters. The minimum bending radius in these spirals is 300 µm. The waveguide loss can be extracted by measuring the insertion losses for waveguides with different lengths on the same chip.
The above silicon waveguides were fabricated using Soitec 6” SOI wafers with a 0.25 µm thick silicon layer and a 3 µm thick BOX layer. An oxide layer was deposited on the wafers by plasma enhanced chemical vapor deposition to act as a hard mask for waveguide etching. Resist pattern were defined by a deep UV scanner. The pattern was transferred to the oxide hard mask using a CHF3/O2 chemistry. We then removed the resist and etched the silicon layer using an HBr-based silicon etch recipe. Both the oxide and silicon etch recipes were optimized to reduce sidewall roughness. A 1.2 µm thick oxide was then deposited on the wafers as a cladding layer. The fabrication processes are all CMOS comparable. Figure 2(a) shows a scanning electron microscope (SEM) image of the waveguide cross section. Figure 2(b) shows a top-view optical microscopy picture of a fabricated waveguide with a total length of 64 cm, with a spiral area of ~6 mm by ~3 mm.
3. Waveguide loss measurement
We tested the waveguides using an amplified spontaneous emission (ASE) source with a wavelength centered at 1550 nm and an optical spectrum analyzer (OSA). The polarization of the output of the ASE source was set to excite the TE mode by an in-line fiber polarization controller. The light was then coupled into the silicon waveguides by a single mode lensed fiber with a beam diameter of ~3.0 µm at the focus. To increase the coupling efficiency, horizontal tapers with a tip width of 3.0 µm and a taper length of 150 µm were included at both input and output waveguide facets. The waveguide output light was collected by another lensed fiber and the spectrum was measured using an OSA. In Fig. 3(a) , we show the insertion losses measured for different waveguide lengths as a function of wavelength. The insertion losses are normalized to the power measured from direct fiber to fiber coupling, and include both coupling loss from lensed fibers and waveguide propagation loss. From the insertion loss at a particular wavelength for different waveguide lengths, we can extract the waveguide propagation loss using linear fitting, as shown in Fig. 3(b) for λ=1550 nm. A waveguide loss of 0.281 dB/cm was achieved for λ=1550 nm. Figure 3(c) presents the waveguide loss spectrum in the entire C-band, demonstrating an average loss of 0.274 dB/cm and a standard derivation of 0.008 dB/cm. This verifies that the waveguide loss is uniform over the C-band. The insertion loss variation, shown in Fig. 3(a), is about 1 dB for 32 cm long waveguides. This variation may come from multimode behavior.
We measured nine chips from the same wafer and the average propagation loss over the C-band is plotted in Fig. 4 . The wafer-level waveguide loss variation is thought to originate from the etch depth variation in the ridge structure. The deeper the etch depth, the greater the loss of the waveguides because of the increasing mode overlap with the etched sidewalls. From Fig. 4, we achieve an average waveguide loss over the whole 6” wafer of 0.299 dB/cm.
4. Coupling between shallow-ridge waveguides and narrow strip waveguides
Silicon waveguides which can support small bending radii are particularly important to enable compact and low-power devices for on chip applications. Silicon narrow strip waveguides with a small cross section of approximately 450 x 250 nm, demonstrated with a bending radius down to 1.5 µm , have been widely used in ring resonators, high-speed electro-optic modulators, and wavelength division multiplexing (WDM) devices [5–7]. The low loss shallow-ridge waveguides presented in this work require a minimum bending radius of ~100 µm. Efficient coupling between these waveguides to the strip waveguides is required not only for enabling tight bends but also for integration with other active devices and WDM devices. Here we theoretically investigate compact double-level tapers to realize such coupling, if the height of the strip waveguides is the same as that of the shallow-ridge waveguides. The double-level tapers, shown in Fig. 5(a) , enable the optical field to propagate adiabatically from the shallowly etched (0.20 µm slab) and wide (2 µm) waveguides to the deeply etched (0 nm slab) and narrow (0.45 µm) waveguides. Such tapers can be fabricated by two standard lithography and etching steps. Here we use a linear taper, although more advanced tapers such as cosine or parabolic can be designed. If the taper is long enough to make the transformation adiabatic, the excess loss of this taper can be negligible. We show field propagation for a taper with a length of 10 µm in Fig. 5(b), simulated by a semi-vector 3D beam propagation method using Rsoft software . The coupling loss as a function of taper length is shown in Fig. 5(c) where it is observed that a 10 µm long taper is sufficient in order to achieve < 0.25 dB excess loss. Such short length is made possible by the high index contrast between the silicon and surrounding oxide. At the beginning of the shallow-ridge waveguides, the optical mode is weakly confined in the lateral direction. However, during the propagation through the taper, the optical mode becomes more and more strongly confined in the lateral direction, which makes a short taper length possible.
5. Discussions and conclusion
We achieved low loss silicon waveguides by (1) designing wide and shallow-ridge waveguides to minimize the optical field overlap with etched sidewalls, and (2) optimizing lithography and dry etching to reduce sidewall roughness. In this work, the measured waveguide loss was as low as 0.274 dB/cm in the C-band. It is worthwhile to point out that these low loss waveguides were fabricated by standard lithography and dry etching steps. The achieved waveguide loss is slightly lower than that of silicon waveguides formed by local oxidation with similar geometry [15–19] (≥0.3 dB/cm). This proves that standard lithography and dry etching techniques are sufficient to reduce the loss of silicon waveguides to < 0.3 dB/cm and it is expected that 0.1 dB/cm is possible if other smoothing / surface treatment techniques such as resist reflow and hydrogen annealing are employed. The low loss waveguides demonstrated here are suitable for on-chip optical routing applications which may require propagation lengths of a few tens of centimeters . They can be also used in high speed silicon modulators . The double-level tapers studied in section 4 are able to efficiently connect this type of waveguide to submicron wide strip waveguides commonly used in high speed modulators and WDM devices. In addition, ultra-narrow bandwidth filters can be construcuted using this waveguide structure for RF photonics application. From the loss figure obtained here, we estimate that sub-GHz bandwidth filters can be made by using ring resonators with a large free spectral range of ~50 GHz (the required ring radius is ~250 µm). Nonlinear effects in silicon waveguides, such as four wave mixing and continuum generation [25, 26], may also benefit from the low loss.
The authors acknowledge partial funding of this work by DARPA MTO office under UNIC program supervised by Dr. Jagdeep Shah (contract agreement with SUN MicrosystemsHR0011-08-9-0001). The authors gratefully acknowledge Dr. J. Cunningham and Dr. K. Raj from Sun Labs at Oracle for helpful discussions. The views, opinions, and/or findings contained in this article/presentation are those of the author/presenter and should not be interpreted as representing the official views or policies, either expressed or implied, of the Defense Advanced Research Projects Agency or the Department of Defense. Approved for Public Release, Distribution Unlimited.
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