We present successful extraction of a 10 GHz clock from single-wavelength 160 and 320 Gbps OTDM data streams, using an opto-electronic phase-locked loop based on three-wave mixing in periodically-poled lithium niobate as a phase comparator.
©2008 Optical Society of America
Clock recovery is a critical function of any digital communications system. For very-high-bit-rate optical time-division multiplexed (OTDM) transmissions, this includes the need for sub-clock extraction, which is required for demultiplexing, channel add-and-drop, and other kinds of optical signal processing. Such clock synchronization is traditionally performed by an electronic phase-locked loop (PLL); however, at bit rates in excess of several tens of Gbps, electronic devices become a bottleneck.
Numerous all-optical or opto-electronic clock recovery methods are therefore being researched; notably opto-electronic PLLs, which use the same basic scheme, replacing the up-front mixer or phase comparator by a nonlinear optical device, chiefly semiconductor optical amplifiers [1, 2, 3, 4] and more recently bismuth-oxide nonlinear fibers  and periodically-poled lithium niobate (PPLN) [6, 7, 8]. The latter two, being passive, do not exhibit amplified spontaneous emission noise or patterning effects. Furthermore, the three-wave mixing (TWM) in PPLN may be in the visible-light range, easily isolated from near-infrared input signals.
As a follow-up to our previous research [2, 8], we present successful extraction of a 10-GHz sub-clock from 160 and 320 Gbps pseudo-random binary sequences, this time using DPSK-modulated signals, whose better performance and nonlinearity tolerance have been the subject of a renewed interest these past few years. This was performed by an opto-electronic PLL where the phase comparison operation is provided by efficient three-wave mixing (TWM) in an adhered-ridge waveguide PPLN device  in a fiber-pigtailed module.
2. Opto-electronic PLL setup
The clock recovery system is described in Fig. 1. The three basic building blocks of the PLL can be recognized: voltage-controlled oscillator (VCO); mixer/phase comparator; and loop filter.
The VCO is a standard electronic oscillator, which drives a tunable mode-locked laser (TMLL) to form an optical pulse train of repetition rate fc≃10 GHz at wavelength λc=1567 nm. The pulse width is 2.7 ps. This forms the clock signal.
It is inserted into a 3-dB optical coupler along with the input data signal whose clock is to be extracted. The latter is a phase-modulated OTDM signal around fs≃N×9.95328 GHz with N=16 or 32, which yields a 160 or 320 Gbps data stream at wavelength λs=1557 nm. For OTDM, this has to be a pulsed or return-to-zero signal; the pulse width is 1.8 ps.
Upon injection into the PPLN device, these optical signals generate a TWM beam at [λ -1 s+λ -1 c]-1≃781 nm=λ TWM, which is detected by a silicon avalanche photodetector. Being insensitive to the infrared input signals, and having a limited electrical bandwidth, the detector itself acts as a filter and isolates the TWM signal’s low-frequency components. As is discussed further in section 3.1, this is equivalent to a low-pass-filtered mixer, which can act as a phase comparator.
This phase comparator’s output is then electrically low-pass filtered and shifted to drive the VCO, thus closing the loop.
This setup differentiates itself from  in two main ways. First, it is a single-stage PLL and not a more complex heterodyne PLL, much in the same way as the difference between  and . Second,  uses cascaded sum-frequency processes which bring the error signal back in the infrared, requiring a separate optical filter to isolate it from the input signals; we use simple TWM, which places the error signal in the visible, allowing us to use an infrared-blind silicon photodetector instead.
3. Experimental results
3.1. Phase comparator
Our basic assumption is that wave mixing between modulated optical beams yields a signal whose envelope bears information on the difference between the modulation frequencies or phases of these beams.
To demonstrate this, we measured our error signal at the output of the photodetector, with the opto-electronic PLL open, but having set the input and clock modulation frequencies fs and fc to fixed values. These were chosen so that there be a small offset between fs and the nearest harmonic of the clock signal Nfc.
As shown in Fig. 2(a) (with N=1), if all spectral lines of the input beams contribute to the TWM process, the resulting signal must bear a low-frequency component at |fs-Nfc|. Sum-frequency components should also be present, but will not pass through the low-bandwidth photodetector. On the other hand, if the PLL is locked in (fs=Nfc), then the error signal will be constant and depend on the delay between the input and clock pulse trains. This behavior mimics that of a low-pass-filtered electrical mixer, which can act as a phase comparator.
Figure 2(b) shows oscilloscope traces of the photodetector output with a |fs-Nfc| of a few kilohertz, with N=16 or 32 (input signal at 160 or 320 Gbps, phase-modulated). The error signal at 160 Gbps looks good because we have adequately narrow pulses. There is only a very small offset, so the mixing process is efficient, yielding a very good contrast. At 320 Gbps one sees that the error signal is greatly reduced in amplitude and contrast. The offset is larger which is a clear sign of the clock pulses being too wide for proper resolution. However, one sees that the setup is able to resolve the 320 Gbps data signal and generate an error signal, and as will be apparent below, this signal is adequate for locking purposes.
It is to be noted that this operation is not limited by the PPLN’s TWM bandwidth, which is relatively narrow (on the order of 100 GHz, measured by performing second-harmonic generation on a CW input signal). While the input signals exceed this bandwidth, the actual limitation is on the TWM components that will be generated, which must fall approximately within a one-nanometer window around λ TWM. As noted above, the phase-comparator behavior only depends on the low-frequency part of the TWM signal. Therefore, one must simply ensure that the center wavelengths of the input beams are such that the sum-frequency wavelength [λ -1 s+λ -1 c] is close enough to λ TWM.
Indeed, given that the error signals basically look like what one would expect from just overlapping the data pulses with the clock pulses (i.e. the intercorrelation between the two pulse trains), there is no indication that the PPLN is a limiting factor in the temporal resolution, especially as we recently tested a similar setup up to 640 Gbps [10, 11]. The latter experiment was performed with OOK modulation, which indicates that this PLL does keep lock in presence of strings of zeros.
3.2. Clock recovery
We have successfully extracted a 10-GHz clock from data streams at 160 and 320 Gbps. The clock spectra in both cases are shown in Fig. 3. They indicate good locking, though the lateral peaks at approximately 200 kHz around the central one suggest that some residual instability remains in the PLL. We are currently working on a further analysis of this phenomenon as a function of the loop gain and loop filter characteristics.
A critical characteristic of the clock, if it is to be used for detection or demultiplexing, is its timing jitter, which can be deduced from its phase noise. The latter is shown in Fig. 4 for both input bit rates, in the form of the single-sideband to carrier ratio phase noise curve; the jitter is plotted in Fig. 5 as a function of the upper bound of the integration interval. Jitter at 160 Gbps was thus measured to be 231 fs over the largest interval, from 1 kHz to 1 GHz. The same yields 386 fs at 320 Gbps. The phase noise is higher in the case of the 320 Gbps bit rate; we suspect that it is more linked to the quality of the signal than an intrinsic limitation of the setup.
According to , to attain a bit error rate less than 10-9 on a demultiplexed data stream, the total rms jitter must be less than 1/12.2 of the time slot. Our data jitter being about 90 fs, this means that the recovered clock jitter ought to be less than 504 fs at 160 Gbps (which it is), and less than 240 fs at 320 Gbps (which it is not).
Our clock therefore ought to be suitable for OTDM demultiplexing at 160 Gbps already. Some optimization may still be required for 320 Gbps; however, if flat-top pulses are used for the data as in , 700 fs jitter can be tolerated.
The opto-electronic phase-locked loop setup we propose has successfully recovered a 10-GHz sub-clock from 160 and 320-Gbps phase-modulated data streams. The recovered clock’s jitter is low enough to use it for OTDM demultiplexing at 160 Gbps; some optimization may still be necessary for 320 Gbps and more, especially as some residual instability appears to remain in the loop. Analysis of the PLL’s behavior is underway for jitter and bit error rate estimation.
This joint experiment was partially funded and facilitated by the European Network of Excellence e-Photon/ONe+ and the cooperative actions COST 291 and 288.
The research was partially supported by the National Institute of Information and Communications technology, Japan.
The work of F. Gómez Agis was supported by a scholarship from CONACyT-México.
References and links
1. O. Kamatani and S. Kawanishi, “Ultrahigh-speed clock recovery with phase lock loop based on four-wave mixing in a traveling-wave laser diode amplifier,” J. Lightwave Technol. 14, 1757–1767 (1996). [CrossRef]
2. L. K. Oxenløwe, D. Zibar, M. Galili, A. T. Clausen, L. J. Christiansen, and P. Jeppesen, “Filtering-assisted cross-phase modulation in a semiconductor optical amplifier enabling 320 Gb/s clock recovery,” in ECOC, We3.5.5, pp. 485–487 (Glasgow, Scotland, U.K., 2005).
3. C. Ware and D. Erasme, “30 GHz sub-clock recovery using an opto-electronic phase-locked loop based on four-wave mixing in a semiconductor optical amplifier,” in CLEO/Europe, CI3-5-MON (Munich, Germany, 2005).
4. E. Tangdiongga, H. C. Hansen Mulvad, H. de Waardt, G. D. Khoe, A. M. J. Koonen, and H. J. S. Dorren, “SOA-based Clock Recovery and Demultiplexing in a Lab Trial of 640-Gb/s OTDM Transmission over 50-km Fibre Link,” in ECOC, Postdeadline paper PD 1.2 (Berlin, Germany, 2007).
5. J. H. Lee, S. Ohara, T. Nagashima, T. Hasegawa, N. Sugimoto, K. Igarashi, K. Katoh, and K. Kikuchi, “Clock recovery and demultiplexing of high-speed OTDM signal through combined use of bismuth oxide nonlinear fiber and erbium-doped bismuth oxide fiber,” IEEE Photon. Technol. Lett. 17, 2658–2660 (2005). [CrossRef]
6. F. Gómez Agis, C. Ware, D. Erasme, R. Ricken, V. Quiring, and W. Sohler, “10-GHz Clock Recovery Using an Optoelectronic Phase-Locked Loop Based on Three-Wave Mixing in Periodically Poled Lithium Niobate,” IEEE Photon. Technol. Lett. 18, 1460–1462 (2006). [CrossRef]
7. T. Ohara, H. Takara, I. Shake, T. Yamada, M. Ishii, I. Ogawa, M. Okamoto, and S. Kawanishi, “Highly Stable 160-Gb/s OTDM Technologies Based on Integrated MUX/DEMUX and Drift-Free PLL-Type Clock Recovery,” IEEE J. Sel. Top. Quantum Electron. 13, 40–48 (2007). [CrossRef]
8. F. Gómez Agis, C. Ware, and D. Erasme, “Clock synchronization and sub-clock extraction of optical signals at high rates using an opto-electronic PLL based on three-wave mixing in PPLN,” in International Conference on Transparent Optical Networks (ICTON) (Rome, Italy, 2007). Invited paper.
9. S. Kurimura, Y. Kato, M. Maruyama, Y. Usui, and H. Nakajima, “Quasi-phase-matched adhered ridge waveguide in LiNbO3,” Appl. Phys. Lett. 89, 191,123 (2006). [CrossRef]
10. L. K. Oxenløwe, F. Gómez Agis, C. Ware, S. Kurimura, H. C. H. Mulvad, M. Galili, K. Kitamura, H. Nakajima, J. Ichikawa, D. Erasme, A. T. Clausen, and P. Jeppesen, “640 Gbit/s clock recovery using periodically poled lithium niobate,” Electron. Lett. 44, 370–371 (2008). [CrossRef]
11. L. K. Oxenløwe, F. Gómez Agis, C. Ware, S. Kurimura, H. C. H. Mulvad, M. Galili, K. Kitamura, H. Nakajima, J. Ichikawa, D. Erasme, A. T. Clausen, and P. Jeppesen, “640 Gbit/s data transmission and clock recovery using an ultra-fast periodically poled lithium niobate device,” in OFC, Postdeadline paper PDP22 (San Diego, CA, U.S.A., 2008).
12. M. Jinno, “Effects of Crosstalk and Timing Jitter on All-Optical Time-Division Demultiplexing Using a Nonlinear Fiber Sagnac Interferometer Switch,” IEEE J. Quantum Electron. 30, 2842–2853 (1994). [CrossRef]
13. R. Slavík, L. K. Oxenløwe, M. Galili, H. C. H. Mulvad, Y. Park, J. Azaña, and P. Jeppesen, “Demultiplexing of 320 Gb/s OTDM data using ultrashort flat-top pulses,” IEEE Photon. Technol. Lett. 19, 1855–1857 (2007). [CrossRef]