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Y. Ueng, K. Liao, H. Chou, and C. Yang, “A high-throughput trellis-based layered decoding architecture for non-binary LDPC codes using Max-Log-QSPA,” IEEE Trans. Signal Process. 61(11), 2940–2951 (2013).

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[Crossref]

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[Crossref]

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[Crossref]

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[Crossref]

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[Crossref]

D. Declercq and M. Fossorier, “Decoding algorithm for nonbinary LDPC codes over GF(q),” IEEE Trans. Commun. 55(4), 633–643 (2007).

[Crossref]

M. P. C. Fossorier, “Quasi-cyclic low-density parity-check codes from circulant permutation matrices,” IEEE Trans. Inf. Theory 50(8), 1788–1793 (2004).

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[Crossref]

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[Crossref]

C. Seok, H. Lee, N. Kaneda, and Y. Chen, “Concatenated non-binary LDPC and HD-FEC codes for 100 Gb/s optical transport system,” in Proceedings of IEEE International Symposium on Circuits and Systems (IEEE, 2012), pp. 1783–1786.

B. Zhou, J. Kang, Y. Tai, S. Lin, and Z. Ding, “High performance non-binary quasi-cyclic LDPC codes on Euclidean geometry,” IEEE Trans. Commun. 57(5), 1298–1311 (2009).

[Crossref]

B. Zhou, J. Kang, S. Song, S. Lin, K. A. Ghaffar, and M. Xu, “Construction of non-binary quasi-cyclic LDPC codes by arrays and array dispersion,” IEEE Trans. Commun. 57(6), 1652–1662 (2009).

[Crossref]

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[Crossref]

C. Seok, H. Lee, N. Kaneda, and Y. Chen, “Concatenated non-binary LDPC and HD-FEC codes for 100 Gb/s optical transport system,” in Proceedings of IEEE International Symposium on Circuits and Systems (IEEE, 2012), pp. 1783–1786.

Y. Ueng, K. Liao, H. Chou, and C. Yang, “A high-throughput trellis-based layered decoding architecture for non-binary LDPC codes using Max-Log-QSPA,” IEEE Trans. Signal Process. 61(11), 2940–2951 (2013).

[Crossref]

B. Zhou, J. Kang, Y. Tai, S. Lin, and Z. Ding, “High performance non-binary quasi-cyclic LDPC codes on Euclidean geometry,” IEEE Trans. Commun. 57(5), 1298–1311 (2009).

[Crossref]

B. Zhou, J. Kang, S. Song, S. Lin, K. A. Ghaffar, and M. Xu, “Construction of non-binary quasi-cyclic LDPC codes by arrays and array dispersion,” IEEE Trans. Commun. 57(6), 1652–1662 (2009).

[Crossref]

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[Crossref]

C. Spagnol, E. Popovici, and W. Marnane, “Hardware implementation of GF(2m) LDPC decoders,” IEEE Trans. Circ. Syst. 56(12), 2609–2620 (2009).

[Crossref]

C. Spagnol, E. Popovici, and W. Marnane, “Hardware implementation of GF(2m) LDPC decoders,” IEEE Trans. Circ. Syst. 56(12), 2609–2620 (2009).

[Crossref]

V. Savin, “Min-max decoding for non-binary LDPC codes,” in Proceedings of IEEE International Symposium on Information Theory (IEEE, 2008) pp. 960–964.

C. Seok, H. Lee, N. Kaneda, and Y. Chen, “Concatenated non-binary LDPC and HD-FEC codes for 100 Gb/s optical transport system,” in Proceedings of IEEE International Symposium on Circuits and Systems (IEEE, 2012), pp. 1783–1786.

B. Zhou, J. Kang, S. Song, S. Lin, K. A. Ghaffar, and M. Xu, “Construction of non-binary quasi-cyclic LDPC codes by arrays and array dispersion,” IEEE Trans. Commun. 57(6), 1652–1662 (2009).

[Crossref]

C. Spagnol, E. Popovici, and W. Marnane, “Hardware implementation of GF(2m) LDPC decoders,” IEEE Trans. Circ. Syst. 56(12), 2609–2620 (2009).

[Crossref]

B. Zhou, J. Kang, Y. Tai, S. Lin, and Z. Ding, “High performance non-binary quasi-cyclic LDPC codes on Euclidean geometry,” IEEE Trans. Commun. 57(5), 1298–1311 (2009).

[Crossref]

Y. Ueng, K. Liao, H. Chou, and C. Yang, “A high-throughput trellis-based layered decoding architecture for non-binary LDPC codes using Max-Log-QSPA,” IEEE Trans. Signal Process. 61(11), 2940–2951 (2013).

[Crossref]

I. B. Djordjevic and B. Vasic, “Nonbinary LDPC codes for optical communication systems,” IEEE Photon. Technol. Lett. 17(10), 2224–2226 (2005).

[Crossref]

B. Zhou, J. Kang, S. Song, S. Lin, K. A. Ghaffar, and M. Xu, “Construction of non-binary quasi-cyclic LDPC codes by arrays and array dispersion,” IEEE Trans. Commun. 57(6), 1652–1662 (2009).

[Crossref]

Y. Ueng, K. Liao, H. Chou, and C. Yang, “A high-throughput trellis-based layered decoding architecture for non-binary LDPC codes using Max-Log-QSPA,” IEEE Trans. Signal Process. 61(11), 2940–2951 (2013).

[Crossref]

X. Zhang and F. Cai, “Reduced-complexity decoder architecture for non-binary LDPC codes,” IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 19(7), 1229–1238 (2011).

B. Zhou, J. Kang, Y. Tai, S. Lin, and Z. Ding, “High performance non-binary quasi-cyclic LDPC codes on Euclidean geometry,” IEEE Trans. Commun. 57(5), 1298–1311 (2009).

[Crossref]

B. Zhou, J. Kang, S. Song, S. Lin, K. A. Ghaffar, and M. Xu, “Construction of non-binary quasi-cyclic LDPC codes by arrays and array dispersion,” IEEE Trans. Commun. 57(6), 1652–1662 (2009).

[Crossref]

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[Crossref]

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[Crossref]

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