Abstract

We propose a universal method for constructing N-port non-blocking optical router for photonic networks-on-chip, in which all microring (MR) optical switches or Mach-Zehnder (M-Z) optical switches behave as 2 × 2 optical switches. The optical router constructed by the proposed method has minimum optical switches, in which the number of the optical switches is reduced about 50% compared to the reported optical routers based on MR optical switches and more than 30% compared to the reported optical routers based on M-Z optical switches, and therefore is more compact in footprint and more power-efficient. We also present a strict mathematical proof of the non-blocking routing of the proposed N-port optical router.

© 2014 Optical Society of America

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2013 (2)

R. Ji, J. Xu, L. Yang, “Five-Port Optical Router Based on Microring and Switches for Photonic Networks-on-Chip,” IEEE Photon. Technol. Lett. 25(5), 492–495 (2013).
[Crossref]

T. Hu, H. Shao, L. Yang, C. Xu, M. Yang, H. Yu, X. Jiang, J. Yang, “Four-port silicon multi-wavelength optical router for photonic networks-on-chip,” IEEE Photon. Technol. Lett. 25(23), 2281–2284 (2013).
[Crossref]

2012 (4)

2011 (5)

2010 (3)

P. Dong, W. Qian, H. Liang, R. Shafiiha, N.-N. Feng, D. Feng, X. Zheng, A. V. Krishnamoorthy, M. Asghari, “Low power and compact reconfigurable multiplexing devices based on silicon microring resonators,” Opt. Express 18(10), 9852–9858 (2010).
[Crossref] [PubMed]

J. Michel, J. Liu, L. C. Kimerling, “High-performance Ge-on-Si photodetectors,” Nat. Photonics 4(8), 527–534 (2010).
[Crossref]

S. Assefa, F. N. Xia, Y. A. Vlasov, “Reinventing germanium avalanche photodetector for nanophotonic on-chip optical interconnects,” Nature 464(7285), 80–84 (2010).
[Crossref] [PubMed]

2009 (6)

A. W. Poon, X. Luo, F. Xu, H. Chen, “Cascaded microresonator-based matrix switch for silicon on-chip optical interconnection,” Proc. IEEE 97(7), 1216–1238 (2009).
[Crossref]

M. M. Geng, L. X. Jia, L. Zhang, L. Yang, P. Chen, T. Wang, Y. L. Liu, “Four-channel reconfigurable optical add-drop multiplexer based on photonic wire waveguide,” Opt. Express 17(7), 5502–5516 (2009).
[Crossref] [PubMed]

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Q. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, K. Asanovic, “Building Many-Core Processor-to-DRAM Networks with Monolithic CMOS Silicon Photonics,” IEEE Micro 29(4), 8–21 (2009).
[Crossref]

L. Zhou, S. S. Djordjevic, R. Proietti, D. Ding, S. J. B. Yoo, R. Amirtharajah, V. Akella, “Design and evaluation of an arbitration-free passive optical crossbar for on-chip interconnection networks,” Appl. Phys., A Mater. Sci. Process. 95(4), 1111–1118 (2009).
[Crossref]

A. Kaźmierczak, W. Bogaerts, E. Drouard, F. Dortu, P. Rojo-Romeo, F. Gaffiot, D. Van Thourhout, D. Giannone, “Highly integrated optical 4×4 crossbar in silicon-on-insulator technology,” J. Lightwave Technol. 27(16), 3317–3323 (2009).
[Crossref]

J. Van Campenhout, W. M. J. Green, S. Assefa, Y. A. Vlasov, “Low-power, 2 x 2 silicon electro-optic switch with 110-nm bandwidth for broadband reconfigurable optical networks,” Opt. Express 17(26), 24020–24029 (2009).
[Crossref] [PubMed]

2008 (4)

A. W. Poon, F. Xu, X. Luo, “Cascaded active silicon microresonator array cross-connect circuits for WDM networks-on-chip,” Proc. SPIE 6898, 689812 (2008).
[Crossref]

N. Sherwood-Droz, H. Wang, L. Chen, B. G. Lee, A. Biberman, K. Bergman, M. Lipson, “Optical 4x4 hitless slicon router for optical networks-on-chip (NoC),” Opt. Express 16(20), 15915–15922 (2008).
[Crossref] [PubMed]

A. Shacham, K. Bergman, L. P. Carloni, “Photonic networks-on-chip for future generations of chip multiprocessors,” IEEE Trans. Comput. 57(9), 1246–1260 (2008).
[Crossref]

J. Brouckaert, W. Bogaerts, S. Selvaraja, P. Dumon, R. Baets, D. Van Thourhout, “Planar concave grating demultiplexer with high reflective Bragg reflector facets,” IEEE Photon. Technol. Lett. 20(4), 309–311 (2008).
[Crossref]

2007 (2)

T. Barwicz, H. Byun, F. Gan, C. W. Holzwarth, M. A. Popovic, P. T. Rakich, M. R. Watts, E. P. Ippen, F. X. Kartner, H. I. Smith, J. S. Orcutt, R. J. Ram, V. Stojanovic, O. O. Olubuyide, J. L. Hoyt, S. Spector, M. Geis, M. Grein, T. Lyszczarz, J. U. Yoon, “Silicon photonics for compact, energy-efficient interconnects [Invited],” J.Opt. Netw. 6(1), 63–73 (2007).
[Crossref]

W. M. J. Green, M. J. Rooks, L. Sekaric, Y. A. Vlasov, “Ultra-compact, low RF power, 10 Gb/s silicon Mach-Zehnder modulator,” Opt. Express 15(25), 17106–17113 (2007).
[Crossref] [PubMed]

2006 (2)

M. Haurylau, G. Chen, H. Chen, J. Zhang, N. A. Nelson, D. H. Albonesi, E. G. Friedman, P. M. Fauchet, “On-chip optical interconnect roadmap: challenges and critical directions,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1699–1705 (2006).
[Crossref]

A. W. Fang, H. Park, O. Cohen, R. Jones, M. J. Paniccia, J. E. Bowers, “Electrically pumped hybrid AlGaInAs-silicon evanescent laser,” Opt. Express 14(20), 9203–9210 (2006).
[Crossref] [PubMed]

2005 (1)

Q. Xu, B. Schmidt, S. Pradhan, M. Lipson, “Micrometre-scale silicon electro-optic modulator,” Nature 435(7040), 325–327 (2005).
[Crossref] [PubMed]

2004 (1)

A. Liu, R. Jones, L. Liao, D. Samara-Rubio, D. Rubin, O. Cohen, R. Nicolaescu, M. Paniccia, “A high-speed silicon optical modulator based on a metal-oxide-semiconductor capacitor,” Nature 427(6975), 615–618 (2004).
[Crossref] [PubMed]

Akella, V.

L. Zhou, S. S. Djordjevic, R. Proietti, D. Ding, S. J. B. Yoo, R. Amirtharajah, V. Akella, “Design and evaluation of an arbitration-free passive optical crossbar for on-chip interconnection networks,” Appl. Phys., A Mater. Sci. Process. 95(4), 1111–1118 (2009).
[Crossref]

Albonesi, D. H.

M. Haurylau, G. Chen, H. Chen, J. Zhang, N. A. Nelson, D. H. Albonesi, E. G. Friedman, P. M. Fauchet, “On-chip optical interconnect roadmap: challenges and critical directions,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1699–1705 (2006).
[Crossref]

Amirtharajah, R.

L. Zhou, S. S. Djordjevic, R. Proietti, D. Ding, S. J. B. Yoo, R. Amirtharajah, V. Akella, “Design and evaluation of an arbitration-free passive optical crossbar for on-chip interconnection networks,” Appl. Phys., A Mater. Sci. Process. 95(4), 1111–1118 (2009).
[Crossref]

Asanovic, K.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Q. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, K. Asanovic, “Building Many-Core Processor-to-DRAM Networks with Monolithic CMOS Silicon Photonics,” IEEE Micro 29(4), 8–21 (2009).
[Crossref]

Asghari, M.

Assefa, S.

Baets, R.

J. Brouckaert, W. Bogaerts, S. Selvaraja, P. Dumon, R. Baets, D. Van Thourhout, “Planar concave grating demultiplexer with high reflective Bragg reflector facets,” IEEE Photon. Technol. Lett. 20(4), 309–311 (2008).
[Crossref]

Barwicz, T.

T. Barwicz, H. Byun, F. Gan, C. W. Holzwarth, M. A. Popovic, P. T. Rakich, M. R. Watts, E. P. Ippen, F. X. Kartner, H. I. Smith, J. S. Orcutt, R. J. Ram, V. Stojanovic, O. O. Olubuyide, J. L. Hoyt, S. Spector, M. Geis, M. Grein, T. Lyszczarz, J. U. Yoon, “Silicon photonics for compact, energy-efficient interconnects [Invited],” J.Opt. Netw. 6(1), 63–73 (2007).
[Crossref]

Batten, C.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Q. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, K. Asanovic, “Building Many-Core Processor-to-DRAM Networks with Monolithic CMOS Silicon Photonics,” IEEE Micro 29(4), 8–21 (2009).
[Crossref]

Bergman, K.

A. Shacham, K. Bergman, L. P. Carloni, “Photonic networks-on-chip for future generations of chip multiprocessors,” IEEE Trans. Comput. 57(9), 1246–1260 (2008).
[Crossref]

N. Sherwood-Droz, H. Wang, L. Chen, B. G. Lee, A. Biberman, K. Bergman, M. Lipson, “Optical 4x4 hitless slicon router for optical networks-on-chip (NoC),” Opt. Express 16(20), 15915–15922 (2008).
[Crossref] [PubMed]

Bessette, J. T.

Biberman, A.

Bogaerts, W.

A. Kaźmierczak, W. Bogaerts, E. Drouard, F. Dortu, P. Rojo-Romeo, F. Gaffiot, D. Van Thourhout, D. Giannone, “Highly integrated optical 4×4 crossbar in silicon-on-insulator technology,” J. Lightwave Technol. 27(16), 3317–3323 (2009).
[Crossref]

J. Brouckaert, W. Bogaerts, S. Selvaraja, P. Dumon, R. Baets, D. Van Thourhout, “Planar concave grating demultiplexer with high reflective Bragg reflector facets,” IEEE Photon. Technol. Lett. 20(4), 309–311 (2008).
[Crossref]

Bowers, J. E.

Brouckaert, J.

J. Brouckaert, W. Bogaerts, S. Selvaraja, P. Dumon, R. Baets, D. Van Thourhout, “Planar concave grating demultiplexer with high reflective Bragg reflector facets,” IEEE Photon. Technol. Lett. 20(4), 309–311 (2008).
[Crossref]

Byun, H.

T. Barwicz, H. Byun, F. Gan, C. W. Holzwarth, M. A. Popovic, P. T. Rakich, M. R. Watts, E. P. Ippen, F. X. Kartner, H. I. Smith, J. S. Orcutt, R. J. Ram, V. Stojanovic, O. O. Olubuyide, J. L. Hoyt, S. Spector, M. Geis, M. Grein, T. Lyszczarz, J. U. Yoon, “Silicon photonics for compact, energy-efficient interconnects [Invited],” J.Opt. Netw. 6(1), 63–73 (2007).
[Crossref]

Cai, Y.

Camacho-Aguilera, R. E.

Carloni, L. P.

A. Shacham, K. Bergman, L. P. Carloni, “Photonic networks-on-chip for future generations of chip multiprocessors,” IEEE Trans. Comput. 57(9), 1246–1260 (2008).
[Crossref]

Chen, G.

M. Haurylau, G. Chen, H. Chen, J. Zhang, N. A. Nelson, D. H. Albonesi, E. G. Friedman, P. M. Fauchet, “On-chip optical interconnect roadmap: challenges and critical directions,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1699–1705 (2006).
[Crossref]

Chen, H.

R. Ji, L. Yang, L. Zhang, Y. Tian, J. Ding, H. Chen, Y. Lu, P. Zhou, W. Zhu, “Microring-resonator-based four-port optical router for photonic networks-on-chip,” Opt. Express 19(20), 18945–18955 (2011).
[Crossref] [PubMed]

R. Ji, L. Yang, L. Zhang, Y. Tian, J. Ding, H. Chen, Y. Lu, P. Zhou, W. Zhu, “Five-port optical router for photonic networks-on-chip,” Opt. Express 19(21), 20258–20268 (2011).
[Crossref] [PubMed]

A. W. Poon, X. Luo, F. Xu, H. Chen, “Cascaded microresonator-based matrix switch for silicon on-chip optical interconnection,” Proc. IEEE 97(7), 1216–1238 (2009).
[Crossref]

M. Haurylau, G. Chen, H. Chen, J. Zhang, N. A. Nelson, D. H. Albonesi, E. G. Friedman, P. M. Fauchet, “On-chip optical interconnect roadmap: challenges and critical directions,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1699–1705 (2006).
[Crossref]

Chen, H. T.

Chen, L.

Chen, P.

Chen, Q.

Cohen, O.

A. W. Fang, H. Park, O. Cohen, R. Jones, M. J. Paniccia, J. E. Bowers, “Electrically pumped hybrid AlGaInAs-silicon evanescent laser,” Opt. Express 14(20), 9203–9210 (2006).
[Crossref] [PubMed]

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A. W. Poon, F. Xu, X. Luo, “Cascaded active silicon microresonator array cross-connect circuits for WDM networks-on-chip,” Proc. SPIE 6898, 689812 (2008).
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Xu, J.

R. Ji, J. Xu, L. Yang, “Five-Port Optical Router Based on Microring and Switches for Photonic Networks-on-Chip,” IEEE Photon. Technol. Lett. 25(5), 492–495 (2013).
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J. F. Ding, H. T. Chen, L. Yang, L. Zhang, R. Q. Ji, Y. H. Tian, W. W. Zhu, Y. Y. Lu, P. Zhou, R. Min, M. B. Yu, “Ultra-low-power carrier-depletion Mach-Zehnder silicon optical modulator,” Opt. Express 20(7), 7081–7087 (2012).
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R. Ji, L. Yang, L. Zhang, Y. Tian, J. Ding, H. Chen, Y. Lu, P. Zhou, W. Zhu, “Microring-resonator-based four-port optical router for photonic networks-on-chip,” Opt. Express 19(20), 18945–18955 (2011).
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R. Ji, L. Yang, L. Zhang, Y. Tian, J. Ding, H. Chen, Y. Lu, P. Zhou, W. Zhu, “Five-port optical router for photonic networks-on-chip,” Opt. Express 19(21), 20258–20268 (2011).
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M. M. Geng, L. X. Jia, L. Zhang, L. Yang, P. Chen, T. Wang, Y. L. Liu, “Four-channel reconfigurable optical add-drop multiplexer based on photonic wire waveguide,” Opt. Express 17(7), 5502–5516 (2009).
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IEEE Trans. Comput. (1)

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J. Van Campenhout, W. M. J. Green, S. Assefa, Y. A. Vlasov, “Low-power, 2 x 2 silicon electro-optic switch with 110-nm bandwidth for broadband reconfigurable optical networks,” Opt. Express 17(26), 24020–24029 (2009).
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Y. Ye, X. Wu, J. Xu, W. Zhang, M. Nikdast, and X. Wang, “Holistic Comparison of Optical Routers for Chip Multiprocessors,” in Anti-Counterfeiting, Security and Identification (ASID) International Conference, 1–5 (2012).
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Figures (9)

Fig. 1
Fig. 1

(a) Mesh (b) Cluster-Mesh (c) Fat-Tree (d) Clos photonic networks-on-chip.

Fig. 2
Fig. 2

Schematic of (a) M-Z optical switches, (b) the MR optical switch.

Fig. 3
Fig. 3

(a) and (b) Specific optical links of the input port i based on 1 × 2 optical switches (c) N-1 optical links of the input port 1 based on 1 × 2 optical switches.

Fig. 4
Fig. 4

(a) 1 × 2 optical switch and (b) 2 × 2 optical switch.

Fig. 5
Fig. 5

Expanding method from the (N-2)-port non-blocking optical router to the N-port non-blocking optical router.

Fig. 6
Fig. 6

Schematics of the (a) 5-port and (b) 6-port non-blocking optical routers.

Fig. 7
Fig. 7

Expanding switching structure composed of cascaded (N-2) expanding elements.

Fig. 8
Fig. 8

Relationship between the i-stage expanding element and the (i + 1)-stage expanding element.

Fig. 9
Fig. 9

Schematics of the (a) 3-port and (b) 4-port non-blocking optical routers, in which the input and output for one specific port are arranged in the same physical address.

Tables (3)

Tables Icon

Table 1 Schematics of the 3- and 4-port Optical Routers and Their Routing Tables

Tables Icon

Table 2 Comparison of the Proposed 4-port Optical Router with the Reported 4-port Optical Routers [2427]

Tables Icon

Table 3 Comparison of the Proposed 5-port Optical Router with the Reported 5-port Optical Routers [2831]

Equations (27)

Equations on this page are rendered with MathJax. Learn more.

O i = I i ' S i T ¯ S i D ¯
O i = I i D S i D
O i = I i T S i T S i D ¯
O i T = I i T S i T ¯
O i T = I i ' S i T
O i D = I i ' S i T ¯ S i D
O i D = I i D S i D ¯
I i+1 T = O i T
I i+1 D = O i D
O i = I i ' S i T ¯ S i D ¯
O i = I N1 S 1 T ¯ S 2 T ¯ S i1 T ¯ S i T S i D ¯
O i = I N S 1 D ¯ S 2 D ¯ S i1 D ¯ S i D
O N1 = I i ' S i T ¯ S i D S i+1 D ¯ S N2 D ¯
O N1 = I N S 1 D ¯ S 2 D ¯ S i D ¯ S N2 D ¯
O N = I i ' S i T S i+1 T ¯ S N2 T ¯
O N = I N1 S 1 T ¯ S 2 T ¯ S i T ¯ S N2 T ¯
                                     O i = I i ' S i T ¯ S i D ¯                                     ( 10 )                              ( a )      O i = I N1 S 1 T ¯ S 2 T ¯ S i1 T ¯ S i T S i D ¯                                     ( 11 )
                             ( b )          O i = I N1 S 1 T ¯ S 2 T ¯ S i1 T ¯ S i T S i D ¯ O i = I N S 1 D ¯ S 2 D ¯ S i1 D ¯ S i D                                      ( 11 ) ( 12 )
                        O N1 = I i ' S i T ¯ S i D S i+1 D ¯ S N2 D ¯                              ( 13 )                ( c )             O N1 = I N S 1 D ¯ S 2 D ¯ S i D ¯ S N2 D ¯                               ( 14 )
        O N = I i ' S i T S i+1 T ¯ S N2 T ¯                                     ( 15 )                             ( d )        O N = I N1 S 1 T ¯ S 2 T ¯ S i T ¯ S N2 T ¯                                      ( 16 )
       O N1 = I i ' S i T ¯ S i D S i+1 D ¯ S N2 D ¯                              ( 13 )                                  ( a )      O N = I i ' S i T S i+1 T ¯ S N2 T ¯                              ( 15 )
                                           O i = I N1 S 1 T ¯ S 2 T ¯ S i1 T ¯ S i T S i D ¯                          ( 11 ) ( b ) O N = I N1 S 1 T ¯ S 2 T ¯ S i T ¯ S N2 T ¯                         ( 16 )
  O i = I N S 1 D ¯ S 2 D ¯ S i1 D ¯ S i D                             ( 12 )                                  ( c )       O N1 = I N S 1 D ¯ S 2 D ¯ S i D ¯ S N2 D ¯                             ( 14 )
                                 O i = I N1 S 1 T ¯ S 2 T ¯ S i1 T ¯ S i T S i D ¯                                          ( 11 ) O N1 = I i ' S i T ¯ S i D S i+1 D ¯ S N2 D ¯                                          ( 13 )
g( N )=N( N1 )
f( 0 )=1,f( N )=N![ C N 0 f( 0 )+ C N 1 f( 1 )+ C N 2 f( 2 )++ C N N1 f( N1 ) ]=N! k=0 N1 C N k f( k )
C N 0 =1, C N k = N! ( Nk )!k!

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