Abstract

We investigate signal-to-noise ratio (SNR) characteristics of an 850-nm optoelectronic integrated circuit (OEIC) receiver fabricated with standard 0.25-µm SiGe bipolar complementary metal-oxide-semiconductor (BiCMOS) technology. The OEIC receiver is composed of a Si avalanche photodetector (APD) and BiCMOS analog circuits including a transimpedance amplifier with DC-balanced buffer, a tunable equalizer, a limiting amplifier, and an output buffer with 50-Ω loads. We measure APD SNR characteristics dependence on the reverse bias voltage as well as BiCMOS circuit noise characteristics. From these, we determine the SNR characteristics of the entire OEIC receiver, and finally, the results are verified with bit-error rate measurement.

© 2014 Optical Society of America

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  1. F.-P. Chou, G.-Y. Chen, C.-W. Wang, Y.-C. Liu, W.-K. Huang, Y.-M. Hsin, “Silicon photodiodes in standard CMOS technology,” IEEE J. Sel. Top. Quantum Electron. 17(3), 730–740 (2011).
    [CrossRef]
  2. H. Zimmermann, Integrated silicon optoelectronics, 2nd ed. (Springer, 2010).
  3. A. C. Carusone, H. Yasotharan, T. Kao, “CMOS technology scaling considerations for multi-gbps optical receivers with integrated photodetectors,” IEEE J. Solid State Circuits 46(8), 1832–1842 (2011).
    [CrossRef]
  4. Y. Dong, K. W. Martin, “A high-speed fully-integrated POF receiver with large-area photo detectors in 65 nm CMOS,” IEEE J. Solid State Circuits 47(9), 2080–2092 (2012).
    [CrossRef]
  5. T. K. Woodward, A. V. Krishnamoorthy, “1-Gb/s integrated optical detectors and receivers in commercial CMOS technologies,” IEEE J. Sel. Top. Quantum Electron. 5(2), 146–156 (1999).
    [CrossRef]
  6. H.-S. Kang, M.-J. Lee, W.-Y. Choi, “Si avalanche photodetectors fabricated in standard complementary metal-oxide-semiconductor process,” Appl. Phys. Lett. 90(15), 151118 (2007).
    [CrossRef]
  7. M.-J. Lee, W.-Y. Choi, “A silicon avalanche photodetector fabricated with standard CMOS technology with over 1 THz gain-bandwidth product,” Opt. Express 18(23), 24189–24194 (2010).
    [CrossRef] [PubMed]
  8. J.-S. Youn, M.-J. Lee, K.-Y. Park, W.-Y. Choi, “10-Gb/s 850-nm CMOS OEIC receiver with a silicon avalanche photodetector,” IEEE J. Quantum Electron. 48(2), 229–236 (2012).
    [CrossRef]
  9. J.-S. Youn, M.-J. Lee, K.-Y. Park, H. Rücker, W.-Y. Choi, “An integrated 12.5-Gb/s optoelectronic receiver with a silicon avalanche photodetector in standard SiGe BiCMOS technology,” Opt. Express 20(27), 28153–28162 (2012).
    [CrossRef] [PubMed]
  10. B. Heinemann, R. Barth, D. Knoll, H. Rücker, B. Tillack, W. Winkler, “High-performance BiCMOS technologies without epitaxially-buried subcollectors and deep trenches,” Semicond. Sci. Technol. 22(1), S153–S157 (2007).
    [CrossRef]
  11. M.-J. Lee, H.-S. Kang, W.-Y. Choi, “Equivalent circuit model for Si avalanche photodetectors fabricated in standard CMOS process,” IEEE Electron Device Lett. 29(10), 1115–1117 (2008).
    [CrossRef]
  12. P. P. Webb, R. J. McIntyre, J. Conradi, “Properties of avalanche photodiode,” RCA Rev. 35, 234–278 (1974).
  13. E. Säckinger, Broadband Circuits for Optical Fiber Communication (Wiley, 2005).
  14. Philips Semiconductors Product Specification (SA5212A) (Philips Semiconductors, 1998).
  15. C.-F. Liao, S.-I. Liu, “40 Gb/s transimpedance-AGC amplifier and CDR circuit for broadband data receivers in 90 nm CMOS,” IEEE J. Solid State Circuits 43(3), 642–655 (2008).
    [CrossRef]
  16. P. Muller and Y. Leblebici, CMOS Multichannel Single-Chip Receivers for Multi-Gigabit Optical Data Communications (Springer, 2007).

2012 (3)

Y. Dong, K. W. Martin, “A high-speed fully-integrated POF receiver with large-area photo detectors in 65 nm CMOS,” IEEE J. Solid State Circuits 47(9), 2080–2092 (2012).
[CrossRef]

J.-S. Youn, M.-J. Lee, K.-Y. Park, W.-Y. Choi, “10-Gb/s 850-nm CMOS OEIC receiver with a silicon avalanche photodetector,” IEEE J. Quantum Electron. 48(2), 229–236 (2012).
[CrossRef]

J.-S. Youn, M.-J. Lee, K.-Y. Park, H. Rücker, W.-Y. Choi, “An integrated 12.5-Gb/s optoelectronic receiver with a silicon avalanche photodetector in standard SiGe BiCMOS technology,” Opt. Express 20(27), 28153–28162 (2012).
[CrossRef] [PubMed]

2011 (2)

F.-P. Chou, G.-Y. Chen, C.-W. Wang, Y.-C. Liu, W.-K. Huang, Y.-M. Hsin, “Silicon photodiodes in standard CMOS technology,” IEEE J. Sel. Top. Quantum Electron. 17(3), 730–740 (2011).
[CrossRef]

A. C. Carusone, H. Yasotharan, T. Kao, “CMOS technology scaling considerations for multi-gbps optical receivers with integrated photodetectors,” IEEE J. Solid State Circuits 46(8), 1832–1842 (2011).
[CrossRef]

2010 (1)

2008 (2)

M.-J. Lee, H.-S. Kang, W.-Y. Choi, “Equivalent circuit model for Si avalanche photodetectors fabricated in standard CMOS process,” IEEE Electron Device Lett. 29(10), 1115–1117 (2008).
[CrossRef]

C.-F. Liao, S.-I. Liu, “40 Gb/s transimpedance-AGC amplifier and CDR circuit for broadband data receivers in 90 nm CMOS,” IEEE J. Solid State Circuits 43(3), 642–655 (2008).
[CrossRef]

2007 (2)

H.-S. Kang, M.-J. Lee, W.-Y. Choi, “Si avalanche photodetectors fabricated in standard complementary metal-oxide-semiconductor process,” Appl. Phys. Lett. 90(15), 151118 (2007).
[CrossRef]

B. Heinemann, R. Barth, D. Knoll, H. Rücker, B. Tillack, W. Winkler, “High-performance BiCMOS technologies without epitaxially-buried subcollectors and deep trenches,” Semicond. Sci. Technol. 22(1), S153–S157 (2007).
[CrossRef]

1999 (1)

T. K. Woodward, A. V. Krishnamoorthy, “1-Gb/s integrated optical detectors and receivers in commercial CMOS technologies,” IEEE J. Sel. Top. Quantum Electron. 5(2), 146–156 (1999).
[CrossRef]

1974 (1)

P. P. Webb, R. J. McIntyre, J. Conradi, “Properties of avalanche photodiode,” RCA Rev. 35, 234–278 (1974).

Barth, R.

B. Heinemann, R. Barth, D. Knoll, H. Rücker, B. Tillack, W. Winkler, “High-performance BiCMOS technologies without epitaxially-buried subcollectors and deep trenches,” Semicond. Sci. Technol. 22(1), S153–S157 (2007).
[CrossRef]

Carusone, A. C.

A. C. Carusone, H. Yasotharan, T. Kao, “CMOS technology scaling considerations for multi-gbps optical receivers with integrated photodetectors,” IEEE J. Solid State Circuits 46(8), 1832–1842 (2011).
[CrossRef]

Chen, G.-Y.

F.-P. Chou, G.-Y. Chen, C.-W. Wang, Y.-C. Liu, W.-K. Huang, Y.-M. Hsin, “Silicon photodiodes in standard CMOS technology,” IEEE J. Sel. Top. Quantum Electron. 17(3), 730–740 (2011).
[CrossRef]

Choi, W.-Y.

J.-S. Youn, M.-J. Lee, K.-Y. Park, H. Rücker, W.-Y. Choi, “An integrated 12.5-Gb/s optoelectronic receiver with a silicon avalanche photodetector in standard SiGe BiCMOS technology,” Opt. Express 20(27), 28153–28162 (2012).
[CrossRef] [PubMed]

J.-S. Youn, M.-J. Lee, K.-Y. Park, W.-Y. Choi, “10-Gb/s 850-nm CMOS OEIC receiver with a silicon avalanche photodetector,” IEEE J. Quantum Electron. 48(2), 229–236 (2012).
[CrossRef]

M.-J. Lee, W.-Y. Choi, “A silicon avalanche photodetector fabricated with standard CMOS technology with over 1 THz gain-bandwidth product,” Opt. Express 18(23), 24189–24194 (2010).
[CrossRef] [PubMed]

M.-J. Lee, H.-S. Kang, W.-Y. Choi, “Equivalent circuit model for Si avalanche photodetectors fabricated in standard CMOS process,” IEEE Electron Device Lett. 29(10), 1115–1117 (2008).
[CrossRef]

H.-S. Kang, M.-J. Lee, W.-Y. Choi, “Si avalanche photodetectors fabricated in standard complementary metal-oxide-semiconductor process,” Appl. Phys. Lett. 90(15), 151118 (2007).
[CrossRef]

Chou, F.-P.

F.-P. Chou, G.-Y. Chen, C.-W. Wang, Y.-C. Liu, W.-K. Huang, Y.-M. Hsin, “Silicon photodiodes in standard CMOS technology,” IEEE J. Sel. Top. Quantum Electron. 17(3), 730–740 (2011).
[CrossRef]

Conradi, J.

P. P. Webb, R. J. McIntyre, J. Conradi, “Properties of avalanche photodiode,” RCA Rev. 35, 234–278 (1974).

Dong, Y.

Y. Dong, K. W. Martin, “A high-speed fully-integrated POF receiver with large-area photo detectors in 65 nm CMOS,” IEEE J. Solid State Circuits 47(9), 2080–2092 (2012).
[CrossRef]

Heinemann, B.

B. Heinemann, R. Barth, D. Knoll, H. Rücker, B. Tillack, W. Winkler, “High-performance BiCMOS technologies without epitaxially-buried subcollectors and deep trenches,” Semicond. Sci. Technol. 22(1), S153–S157 (2007).
[CrossRef]

Hsin, Y.-M.

F.-P. Chou, G.-Y. Chen, C.-W. Wang, Y.-C. Liu, W.-K. Huang, Y.-M. Hsin, “Silicon photodiodes in standard CMOS technology,” IEEE J. Sel. Top. Quantum Electron. 17(3), 730–740 (2011).
[CrossRef]

Huang, W.-K.

F.-P. Chou, G.-Y. Chen, C.-W. Wang, Y.-C. Liu, W.-K. Huang, Y.-M. Hsin, “Silicon photodiodes in standard CMOS technology,” IEEE J. Sel. Top. Quantum Electron. 17(3), 730–740 (2011).
[CrossRef]

Kang, H.-S.

M.-J. Lee, H.-S. Kang, W.-Y. Choi, “Equivalent circuit model for Si avalanche photodetectors fabricated in standard CMOS process,” IEEE Electron Device Lett. 29(10), 1115–1117 (2008).
[CrossRef]

H.-S. Kang, M.-J. Lee, W.-Y. Choi, “Si avalanche photodetectors fabricated in standard complementary metal-oxide-semiconductor process,” Appl. Phys. Lett. 90(15), 151118 (2007).
[CrossRef]

Kao, T.

A. C. Carusone, H. Yasotharan, T. Kao, “CMOS technology scaling considerations for multi-gbps optical receivers with integrated photodetectors,” IEEE J. Solid State Circuits 46(8), 1832–1842 (2011).
[CrossRef]

Knoll, D.

B. Heinemann, R. Barth, D. Knoll, H. Rücker, B. Tillack, W. Winkler, “High-performance BiCMOS technologies without epitaxially-buried subcollectors and deep trenches,” Semicond. Sci. Technol. 22(1), S153–S157 (2007).
[CrossRef]

Krishnamoorthy, A. V.

T. K. Woodward, A. V. Krishnamoorthy, “1-Gb/s integrated optical detectors and receivers in commercial CMOS technologies,” IEEE J. Sel. Top. Quantum Electron. 5(2), 146–156 (1999).
[CrossRef]

Lee, M.-J.

J.-S. Youn, M.-J. Lee, K.-Y. Park, W.-Y. Choi, “10-Gb/s 850-nm CMOS OEIC receiver with a silicon avalanche photodetector,” IEEE J. Quantum Electron. 48(2), 229–236 (2012).
[CrossRef]

J.-S. Youn, M.-J. Lee, K.-Y. Park, H. Rücker, W.-Y. Choi, “An integrated 12.5-Gb/s optoelectronic receiver with a silicon avalanche photodetector in standard SiGe BiCMOS technology,” Opt. Express 20(27), 28153–28162 (2012).
[CrossRef] [PubMed]

M.-J. Lee, W.-Y. Choi, “A silicon avalanche photodetector fabricated with standard CMOS technology with over 1 THz gain-bandwidth product,” Opt. Express 18(23), 24189–24194 (2010).
[CrossRef] [PubMed]

M.-J. Lee, H.-S. Kang, W.-Y. Choi, “Equivalent circuit model for Si avalanche photodetectors fabricated in standard CMOS process,” IEEE Electron Device Lett. 29(10), 1115–1117 (2008).
[CrossRef]

H.-S. Kang, M.-J. Lee, W.-Y. Choi, “Si avalanche photodetectors fabricated in standard complementary metal-oxide-semiconductor process,” Appl. Phys. Lett. 90(15), 151118 (2007).
[CrossRef]

Liao, C.-F.

C.-F. Liao, S.-I. Liu, “40 Gb/s transimpedance-AGC amplifier and CDR circuit for broadband data receivers in 90 nm CMOS,” IEEE J. Solid State Circuits 43(3), 642–655 (2008).
[CrossRef]

Liu, S.-I.

C.-F. Liao, S.-I. Liu, “40 Gb/s transimpedance-AGC amplifier and CDR circuit for broadband data receivers in 90 nm CMOS,” IEEE J. Solid State Circuits 43(3), 642–655 (2008).
[CrossRef]

Liu, Y.-C.

F.-P. Chou, G.-Y. Chen, C.-W. Wang, Y.-C. Liu, W.-K. Huang, Y.-M. Hsin, “Silicon photodiodes in standard CMOS technology,” IEEE J. Sel. Top. Quantum Electron. 17(3), 730–740 (2011).
[CrossRef]

Martin, K. W.

Y. Dong, K. W. Martin, “A high-speed fully-integrated POF receiver with large-area photo detectors in 65 nm CMOS,” IEEE J. Solid State Circuits 47(9), 2080–2092 (2012).
[CrossRef]

McIntyre, R. J.

P. P. Webb, R. J. McIntyre, J. Conradi, “Properties of avalanche photodiode,” RCA Rev. 35, 234–278 (1974).

Park, K.-Y.

J.-S. Youn, M.-J. Lee, K.-Y. Park, H. Rücker, W.-Y. Choi, “An integrated 12.5-Gb/s optoelectronic receiver with a silicon avalanche photodetector in standard SiGe BiCMOS technology,” Opt. Express 20(27), 28153–28162 (2012).
[CrossRef] [PubMed]

J.-S. Youn, M.-J. Lee, K.-Y. Park, W.-Y. Choi, “10-Gb/s 850-nm CMOS OEIC receiver with a silicon avalanche photodetector,” IEEE J. Quantum Electron. 48(2), 229–236 (2012).
[CrossRef]

Rücker, H.

J.-S. Youn, M.-J. Lee, K.-Y. Park, H. Rücker, W.-Y. Choi, “An integrated 12.5-Gb/s optoelectronic receiver with a silicon avalanche photodetector in standard SiGe BiCMOS technology,” Opt. Express 20(27), 28153–28162 (2012).
[CrossRef] [PubMed]

B. Heinemann, R. Barth, D. Knoll, H. Rücker, B. Tillack, W. Winkler, “High-performance BiCMOS technologies without epitaxially-buried subcollectors and deep trenches,” Semicond. Sci. Technol. 22(1), S153–S157 (2007).
[CrossRef]

Tillack, B.

B. Heinemann, R. Barth, D. Knoll, H. Rücker, B. Tillack, W. Winkler, “High-performance BiCMOS technologies without epitaxially-buried subcollectors and deep trenches,” Semicond. Sci. Technol. 22(1), S153–S157 (2007).
[CrossRef]

Wang, C.-W.

F.-P. Chou, G.-Y. Chen, C.-W. Wang, Y.-C. Liu, W.-K. Huang, Y.-M. Hsin, “Silicon photodiodes in standard CMOS technology,” IEEE J. Sel. Top. Quantum Electron. 17(3), 730–740 (2011).
[CrossRef]

Webb, P. P.

P. P. Webb, R. J. McIntyre, J. Conradi, “Properties of avalanche photodiode,” RCA Rev. 35, 234–278 (1974).

Winkler, W.

B. Heinemann, R. Barth, D. Knoll, H. Rücker, B. Tillack, W. Winkler, “High-performance BiCMOS technologies without epitaxially-buried subcollectors and deep trenches,” Semicond. Sci. Technol. 22(1), S153–S157 (2007).
[CrossRef]

Woodward, T. K.

T. K. Woodward, A. V. Krishnamoorthy, “1-Gb/s integrated optical detectors and receivers in commercial CMOS technologies,” IEEE J. Sel. Top. Quantum Electron. 5(2), 146–156 (1999).
[CrossRef]

Yasotharan, H.

A. C. Carusone, H. Yasotharan, T. Kao, “CMOS technology scaling considerations for multi-gbps optical receivers with integrated photodetectors,” IEEE J. Solid State Circuits 46(8), 1832–1842 (2011).
[CrossRef]

Youn, J.-S.

J.-S. Youn, M.-J. Lee, K.-Y. Park, H. Rücker, W.-Y. Choi, “An integrated 12.5-Gb/s optoelectronic receiver with a silicon avalanche photodetector in standard SiGe BiCMOS technology,” Opt. Express 20(27), 28153–28162 (2012).
[CrossRef] [PubMed]

J.-S. Youn, M.-J. Lee, K.-Y. Park, W.-Y. Choi, “10-Gb/s 850-nm CMOS OEIC receiver with a silicon avalanche photodetector,” IEEE J. Quantum Electron. 48(2), 229–236 (2012).
[CrossRef]

Appl. Phys. Lett. (1)

H.-S. Kang, M.-J. Lee, W.-Y. Choi, “Si avalanche photodetectors fabricated in standard complementary metal-oxide-semiconductor process,” Appl. Phys. Lett. 90(15), 151118 (2007).
[CrossRef]

IEEE Electron Device Lett. (1)

M.-J. Lee, H.-S. Kang, W.-Y. Choi, “Equivalent circuit model for Si avalanche photodetectors fabricated in standard CMOS process,” IEEE Electron Device Lett. 29(10), 1115–1117 (2008).
[CrossRef]

IEEE J. Quantum Electron. (1)

J.-S. Youn, M.-J. Lee, K.-Y. Park, W.-Y. Choi, “10-Gb/s 850-nm CMOS OEIC receiver with a silicon avalanche photodetector,” IEEE J. Quantum Electron. 48(2), 229–236 (2012).
[CrossRef]

IEEE J. Sel. Top. Quantum Electron. (2)

F.-P. Chou, G.-Y. Chen, C.-W. Wang, Y.-C. Liu, W.-K. Huang, Y.-M. Hsin, “Silicon photodiodes in standard CMOS technology,” IEEE J. Sel. Top. Quantum Electron. 17(3), 730–740 (2011).
[CrossRef]

T. K. Woodward, A. V. Krishnamoorthy, “1-Gb/s integrated optical detectors and receivers in commercial CMOS technologies,” IEEE J. Sel. Top. Quantum Electron. 5(2), 146–156 (1999).
[CrossRef]

IEEE J. Solid State Circuits (3)

C.-F. Liao, S.-I. Liu, “40 Gb/s transimpedance-AGC amplifier and CDR circuit for broadband data receivers in 90 nm CMOS,” IEEE J. Solid State Circuits 43(3), 642–655 (2008).
[CrossRef]

A. C. Carusone, H. Yasotharan, T. Kao, “CMOS technology scaling considerations for multi-gbps optical receivers with integrated photodetectors,” IEEE J. Solid State Circuits 46(8), 1832–1842 (2011).
[CrossRef]

Y. Dong, K. W. Martin, “A high-speed fully-integrated POF receiver with large-area photo detectors in 65 nm CMOS,” IEEE J. Solid State Circuits 47(9), 2080–2092 (2012).
[CrossRef]

Opt. Express (2)

RCA Rev. (1)

P. P. Webb, R. J. McIntyre, J. Conradi, “Properties of avalanche photodiode,” RCA Rev. 35, 234–278 (1974).

Semicond. Sci. Technol. (1)

B. Heinemann, R. Barth, D. Knoll, H. Rücker, B. Tillack, W. Winkler, “High-performance BiCMOS technologies without epitaxially-buried subcollectors and deep trenches,” Semicond. Sci. Technol. 22(1), S153–S157 (2007).
[CrossRef]

Other (4)

H. Zimmermann, Integrated silicon optoelectronics, 2nd ed. (Springer, 2010).

E. Säckinger, Broadband Circuits for Optical Fiber Communication (Wiley, 2005).

Philips Semiconductors Product Specification (SA5212A) (Philips Semiconductors, 1998).

P. Muller and Y. Leblebici, CMOS Multichannel Single-Chip Receivers for Multi-Gigabit Optical Data Communications (Springer, 2007).

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Figures (7)

Fig. 1
Fig. 1

Simplified block diagram of (a) the fabricated OEIC receiver [9] (b) OEIC receiver for SNR investigation.

Fig. 2
Fig. 2

Experimental setups for APD signal and noise measurement.

Fig. 3
Fig. 3

Measured APD (a) signal and (b) noise characteristics as a function of reverse bias voltage (VR).

Fig. 4
Fig. 4

Measured and simulated signal and noise frequency characteristics of electronic circuits with minimum equalization.

Fig. 5
Fig. 5

Measured APD signal and noise current with and without electronic circuit noise at incident optical power (Popt) of (a) –8 and (b) –10 dBm, respectively.

Fig. 6
Fig. 6

Estimated SNRAPD and SNROEIC as a function of VR at incident optical power (Popt) of –8 and –10 dBm, respectively.

Fig. 7
Fig. 7

Measured and estimated BER as a function of VR at incident optical power (Popt) of –8 and –10 dBm, respectively.

Equations (4)

Equations on this page are rendered with MathJax. Learn more.

SNR APD ( V R )= I s,pp,APD ( V R ) I n,rms,APD 2 ( V R ) ¯ ,
SNR OEIC ( V R )= I s,pp,APD ( V R ) I n,rms,APD 2 ( V R ) ¯ + I n,rms,circuit 2 ¯ ,
I n , r m s , c i r c u i t 2 ¯ = [ 100 M H z B W s i n , c i r c u i t 2 ¯ d f ] B W n B W s ,
BER= 1 2 erfc( α SNR OEIC 2 2 ).

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