Abstract

In this paper, we propose and experimentally demonstrate a free-space based high-speed reconfigurable card-to-card optical interconnect architecture with broadcast capability, which is required for control functionalities and efficient parallel computing applications. Experimental results show that 10 Gb/s data can be broadcast to all receiving channels for up to 30 cm with a worst-case receiver sensitivity better than −12.20 dBm. In addition, arbitrary multicasting with the same architecture is also investigated. 10 Gb/s reconfigurable point-to-point link and multicast channels are simultaneously demonstrated with a measured receiver sensitivity power penalty of ~1.3 dB due to crosstalk.

© 2013 OSA

Full Article  |  PDF Article

References

  • View by:
  • |
  • |
  • |

  1. D. Miller, “Device requirements for optical interconnects to silicon chips,” Proc. IEEE97(7), 1166–1185 (2009).
    [CrossRef]
  2. H. Cho, P. Kapur, and K. Saraswat, “Power consumption between high-speed electrical and optical interconnects for interchip communication,” J. Lightwave Technol.22(9), 2021–2033 (2004).
    [CrossRef]
  3. A. F. Benner, M. Ignatowski, J. A. Kash, D. M. Kuchta, and M. B. Ritther, “Exploitation of optical interconnects in future server architectures,” IBM J. Res. Develop.49(4.5), 755–775 (2005).
    [CrossRef]
  4. Y. Fainman, M. P. Nezhad, D. T. Tan, K. Ikeda, O. Bondarenko, and A. Grieco, “Silicon nanophotonic devices for chip-scale optical communication applications [Invited],” Appl. Opt.52(4), 613–624 (2013).
    [CrossRef] [PubMed]
  5. M. A. Taubenblatt, “Optical interconnects for high performance computing,” J. Lightwave Technol.30(4), 448–457 (2012).
    [CrossRef]
  6. F. E. Doany, B. G. Lee, A. V. Rylyakov, D. M. Kuchta, C. Baks, C. Jahnes, F. Libsch, and C. L. Schow, “Terabit/sec VCSEL-based parallel optical module based on holey CMOS transceiver IC,” in Proceedings of Optical Fiber Communication Conference and Exposition and the National Fiber Optic Engineers Conference(OFC/NFOEC, Los Angeles, California, 2012), PDP5D.9.
    [CrossRef]
  7. C. L. Schow, F. E. Doany, C. W. Baks, Y. H. Kwark, D. M. Kuchta, and J. A. Kash, “A single-chip CMOS-based parallel optical transceiver capable of 240-Gb/s bidirectional data rates,” J. Lightwave Technol.27(7), 915–929 (2009).
    [CrossRef]
  8. C. J. Henderson, D. G. Leyva, and T. D. Wilkinson, “Free space adaptive optical interconnect at 1.25 Gb/s with beam steering using a ferroelectric liquid-crystal SLM,” J. Lightwave Technol.24(5), 1989–1997 (2006).
    [CrossRef]
  9. M. Aljada, K. E. Alameh, Y. T. Lee, and I. S. Chung, “High-speed (2.5 Gbps) reconfigurable inter-chip optical interconnects using opto-VLSI processors,” Opt. Express14(15), 6823–6836 (2006).
    [CrossRef] [PubMed]
  10. K. Wang, A. Nirmalathas, C. Lim, E. Skafidas, and K. Alameh, “Experimental demonstration of high-speed free-space reconfigurable card-to-card optical interconnects,” Opt. Express21(3), 2850–2861 (2013).
    [CrossRef] [PubMed]
  11. K. Wang, A. Nirmalathas, C. Lim, E. Skafidas, and K. Alameh, “High-speed reconfigurable card-to-card optical interconnects with multicasting capability,” in Proceedings of OptoElectronics and Communication Conference (OECC, Kyoto, Japan, 2013), ThT1–3.
  12. K. Wang, A. Nirmalathas, C. Lim, E. Skafidas, and K. Alameh, “High-speed reconfigurable card-to-card optical interconnects with multicasting capability,” in Proceedings of IEEE Optical Interconnects Conference (Santa Fe, New Mexico, 2013), TuP6.
  13. T. Mizuochi, Y. Miyata, K. Kubo, T. Sugihara, K. Onohara, and H. Yoshida, “Progress in soft-decision FEC,” in Proceedings of Optical Fiber Communication Conference and Exposition and National Fiber Optic Engineers Conference (OFC/NFOEC, Los Angeles, California, 2011), pp. 1–3.
  14. K. Wang, A. Nirmalathas, C. Lim, E. Skafidas, and K. Alameh, “Performance of high-speed reconfigurable free-space card-to-card optical interconnects under air turbulence,” J. Lightwave Technol.31(11), 1687–1693 (2013).
    [CrossRef]

2013 (3)

2012 (1)

2009 (2)

2006 (2)

2005 (1)

A. F. Benner, M. Ignatowski, J. A. Kash, D. M. Kuchta, and M. B. Ritther, “Exploitation of optical interconnects in future server architectures,” IBM J. Res. Develop.49(4.5), 755–775 (2005).
[CrossRef]

2004 (1)

Alameh, K.

Alameh, K. E.

Aljada, M.

Baks, C. W.

Benner, A. F.

A. F. Benner, M. Ignatowski, J. A. Kash, D. M. Kuchta, and M. B. Ritther, “Exploitation of optical interconnects in future server architectures,” IBM J. Res. Develop.49(4.5), 755–775 (2005).
[CrossRef]

Bondarenko, O.

Cho, H.

Chung, I. S.

Doany, F. E.

Fainman, Y.

Grieco, A.

Henderson, C. J.

Ignatowski, M.

A. F. Benner, M. Ignatowski, J. A. Kash, D. M. Kuchta, and M. B. Ritther, “Exploitation of optical interconnects in future server architectures,” IBM J. Res. Develop.49(4.5), 755–775 (2005).
[CrossRef]

Ikeda, K.

Kapur, P.

Kash, J. A.

C. L. Schow, F. E. Doany, C. W. Baks, Y. H. Kwark, D. M. Kuchta, and J. A. Kash, “A single-chip CMOS-based parallel optical transceiver capable of 240-Gb/s bidirectional data rates,” J. Lightwave Technol.27(7), 915–929 (2009).
[CrossRef]

A. F. Benner, M. Ignatowski, J. A. Kash, D. M. Kuchta, and M. B. Ritther, “Exploitation of optical interconnects in future server architectures,” IBM J. Res. Develop.49(4.5), 755–775 (2005).
[CrossRef]

Kuchta, D. M.

C. L. Schow, F. E. Doany, C. W. Baks, Y. H. Kwark, D. M. Kuchta, and J. A. Kash, “A single-chip CMOS-based parallel optical transceiver capable of 240-Gb/s bidirectional data rates,” J. Lightwave Technol.27(7), 915–929 (2009).
[CrossRef]

A. F. Benner, M. Ignatowski, J. A. Kash, D. M. Kuchta, and M. B. Ritther, “Exploitation of optical interconnects in future server architectures,” IBM J. Res. Develop.49(4.5), 755–775 (2005).
[CrossRef]

Kwark, Y. H.

Lee, Y. T.

Leyva, D. G.

Lim, C.

Miller, D.

D. Miller, “Device requirements for optical interconnects to silicon chips,” Proc. IEEE97(7), 1166–1185 (2009).
[CrossRef]

Nezhad, M. P.

Nirmalathas, A.

Ritther, M. B.

A. F. Benner, M. Ignatowski, J. A. Kash, D. M. Kuchta, and M. B. Ritther, “Exploitation of optical interconnects in future server architectures,” IBM J. Res. Develop.49(4.5), 755–775 (2005).
[CrossRef]

Saraswat, K.

Schow, C. L.

Skafidas, E.

Tan, D. T.

Taubenblatt, M. A.

Wang, K.

Wilkinson, T. D.

Appl. Opt. (1)

IBM J. Res. Develop. (1)

A. F. Benner, M. Ignatowski, J. A. Kash, D. M. Kuchta, and M. B. Ritther, “Exploitation of optical interconnects in future server architectures,” IBM J. Res. Develop.49(4.5), 755–775 (2005).
[CrossRef]

J. Lightwave Technol. (5)

Opt. Express (2)

Proc. IEEE (1)

D. Miller, “Device requirements for optical interconnects to silicon chips,” Proc. IEEE97(7), 1166–1185 (2009).
[CrossRef]

Other (4)

F. E. Doany, B. G. Lee, A. V. Rylyakov, D. M. Kuchta, C. Baks, C. Jahnes, F. Libsch, and C. L. Schow, “Terabit/sec VCSEL-based parallel optical module based on holey CMOS transceiver IC,” in Proceedings of Optical Fiber Communication Conference and Exposition and the National Fiber Optic Engineers Conference(OFC/NFOEC, Los Angeles, California, 2012), PDP5D.9.
[CrossRef]

K. Wang, A. Nirmalathas, C. Lim, E. Skafidas, and K. Alameh, “High-speed reconfigurable card-to-card optical interconnects with multicasting capability,” in Proceedings of OptoElectronics and Communication Conference (OECC, Kyoto, Japan, 2013), ThT1–3.

K. Wang, A. Nirmalathas, C. Lim, E. Skafidas, and K. Alameh, “High-speed reconfigurable card-to-card optical interconnects with multicasting capability,” in Proceedings of IEEE Optical Interconnects Conference (Santa Fe, New Mexico, 2013), TuP6.

T. Mizuochi, Y. Miyata, K. Kubo, T. Sugihara, K. Onohara, and H. Yoshida, “Progress in soft-decision FEC,” in Proceedings of Optical Fiber Communication Conference and Exposition and National Fiber Optic Engineers Conference (OFC/NFOEC, Los Angeles, California, 2011), pp. 1–3.

Cited By

OSA participates in CrossRef's Cited-By Linking service. Citing articles from OSA journals and other participating publishers are listed here.

Alert me when this article is cited.


Figures (6)

Fig. 1
Fig. 1

Architecture of the proposed reconfigurable card-to-card optical interconnect with both broadcast and multicast capabilities.

Fig. 2
Fig. 2

Experimental setup (not to scale) for demonstrating the proposed reconfigurable optical interconnect architecture with both broadcast and multicast capabilities.

Fig. 3
Fig. 3

BER versus horizontal distance. (a) VCSEL 1 served as transmitter; and (b) VCSEL 2 served as transmitter (reprinted from [12]).

Fig. 4
Fig. 4

Receiver sensitivity for the broadcast function. VCSEL 1 served as the source and the bit rate was 10 Gb/s (reprinted from [12]).

Fig. 5
Fig. 5

BER versus horizontal distance. (a) VCSEL 1 multicast signal to receivers 1 and 2; and (b) VCSEL 1 multicast signal to receivers 2 and 4 (reprinted from [11]).

Fig. 6
Fig. 6

Receiver sensitivity in the multicast scenario. VCSEL 1 multicast signal to receivers 1 and 2 and bit rate was 10 Gb/s (reprinted from [11]).

Metrics