Abstract

We demonstrate a monolithic photonic integration platform that leverages the existing state-of-the-art CMOS foundry infrastructure. In our approach, proven XeF2 post-processing technology and compliance with electronic foundry process flows eliminate the need for specialized substrates or wafer bonding. This approach enables intimate integration of large numbers of nanophotonic devices alongside high-density, high-performance transistors at low initial and incremental cost. We demonstrate this platform by presenting grating-coupled, microring-resonator filter banks fabricated in an unmodified 28 nm bulk-CMOS process by sharing a mask set with standard electronic projects. The lithographic fidelity of this process enables the high-throughput fabrication of second-order, wavelength-division-multiplexing (WDM) filter banks that achieve low insertion loss without post-fabrication trimming.

© 2011 OSA

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2010 (8)

T.-Y. Liow, K.-W. Ang, Q. Fang, J. Song, Y. Xiong, M.-B. Yu, G.-Q. Lo, and D.-L. Kwong, “Silicon modulators and germanium photodetectors on SOI: monolithic integration, compatibility and performance optimization,” IEEE J. Sel. Top. Quantum Electron. 16(1), 307–315 (2010).
[CrossRef]

X. Zheng, J. Lexau, Y. Luo, H. Thacker, T. Pinguet, A. Mekis, G. Li, J. Shi, P. Amberg, N. Pinckney, K. Raj, R. Ho, J. E. Cunningham, and A. V. Krishnamoorthy, “Ultra-low-energy all-CMOS modulator integrated with driver,” Opt. Express 18(3), 3059–3070 (2010), http://www.opticsinfobase.org/oe/abstract.cfm?URI=oe-18-3-3059 .
[CrossRef] [PubMed]

I. A. Young, E. Mohammed, J. T. S. Liao, A. M. Kern, S. Palermo, B. A. Block, M. R. Reshotko, and P. L. D. Chang, “Optical I/O Technology for Tera-Scale Computing,” IEEE J. Solid-State Circuits 45(1), 235–248 (2010).
[CrossRef]

M. Hochberg and T. Baehr-Jones, “Towards fabless silicon photonics,” Nat. Photonics 4(8), 492–494 (2010).
[CrossRef]

J. S. Orcutt and R. J. Ram, “Photonic device layout within the foundry CMOS design environment,” IEEE Photon. Technol. Lett. 22(8), 544–548 (2010).
[CrossRef]

S. Sridaran and S. A. Bhave, “Nanophotonic devices on thin buried oxide Silicon-On-Insulator substrates,” Opt. Express 18(4), 3850–3857 (2010), http://www.opticsinfobase.org/abstract.cfm?URI=oe-18-4-3850 .
[CrossRef] [PubMed]

X. Zheng, I. Shubin, G. Li, T. Pinguet, A. Mekis, J. Yao, H. Thacker, Y. Luo, J. Costa, K. Raj, J. E. Cunningham, and A. V. Krishnamoorthy, “A tunable 1x4 silicon CMOS photonic wavelength multiplexer/demultiplexer for dense optical interconnects,” Opt. Express 18(5), 5151–5160 (2010), http://www.opticsinfobase.org/abstract.cfm?URI=oe-18-5-5151 .
[CrossRef] [PubMed]

P. Dong, W. Qian, H. Liang, R. Shafiiha, N.-N. Feng, D. Feng, X. Zheng, A. V. Krishnamoorthy, and M. Asghari, “Low power and compact reconfigurable multiplexing devices based on silicon microring resonators,” Opt. Express 18(10), 9852–9858 (2010), http://www.opticsinfobase.org/abstract.cfm?URI=oe-18-10-9852 .
[CrossRef] [PubMed]

2009 (9)

B. Stackhouse, S. Bhimji, C. Bostak, D. Bradley, B. Cherkauer, J. Desai, E. Francom, M. Gowan, P. Gronowski, D. Krueger, C. Morganti, and S. Troyer, “A 65 nm 2-billion transistor quad-core Itanium processor,” IEEE J. Solid-State Circuits 44(1), 18–31 (2009).
[CrossRef]

B. Schmid, A. Petrov, and M. Eich, “Optimized grating coupler with fully etched slots,” Opt. Express 17(13), 11066–11076 (2009), http://www.opticsinfobase.org/abstract.cfm?URI=oe-17-13-11066 .
[PubMed]

S. K. Selvaraja, P. Jaenen, W. Bogaerts, D. V. Thourhout, P. Dumon, and R. Baets, “Fabrication of Photonic Wire and Crystal Circuits in Silicon-on-Insulator Using 193-nm Optical Lithography,” IEEE J. Lightwave Technol. 27(18), 4076–4083 (2009).
[CrossRef]

K. Preston, S. Manipatruni, A. Gondarenko, C. B. Poitras, and M. Lipson, “Deposited silicon high-speed integrated electro-optic modulator,” Opt. Express 17(7), 5118–5124 (2009), http://www.opticsinfobase.org/abstract.cfm?URI=oe-17-7-5118 .
[CrossRef] [PubMed]

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building many-core processor-to-DRAM networks with monolithic CMOS silicon photonics,” IEEE Micro 29(4), 8–21 (2009).
[CrossRef]

M. Petracca, B. G. Lee, K. Bergman, and L. P. Carloni, “Photonic NoCs: system-level design exploration,” IEEE Micro 29(4), 74–85 (2009).
[CrossRef]

J. Ahn, M. Fiorentino, R. G. Beausoleil, N. Binkert, A. Davis, D. Fattal, N. P. Jouppi, M. McLaren, C. M. Santori, R. S. Schreiber, S. M. Spillane, D. Vantrease, and Q. Xu, “Devices and architectures for photonic chip-scale integration,” Appl. Phys. A 95(4), 989–997 (2009).
[CrossRef]

D. A. B. Miller, “Device requirements for optical interconnects to silicon chips,” Proc. IEEE 97, 1166–1185 (2009).
[CrossRef]

P. Dumon, W. Bogaerts, R. Baets, J.-M. Fedeli, and L. Fulbert, “Towards foundry approach for silicon photonics: silicon photonics platform ePIXfab,” Electron. Lett. 45(12), 581–582 (2009).
[CrossRef]

2008 (3)

Y. Vlasov, W. M. J. Green, and F. Xia, “High-throughput silicon nanophotonic wavelength-insensitive switch for on-chip optical networks,” Nat. Photonics 2(4), 242–246 (2008).
[CrossRef]

B. A. Block, T. R. Younkin, P. S. Davids, M. R. Reshotko, P. Chang, B. M. Polishak, S. Huang, J. Luo, and A. K. Y. Jen, “Electro-optic polymer cladding ring resonator modulators,” Opt. Express 16(22), 18326–18333 (2008), http://www.opticsinfobase.org/abstract.cfm?URI=oe-16-22-18326 .
[CrossRef] [PubMed]

J. Sun, C. W. Holzwarth, M. Dahlem, J. T. Hastings, and H. I. Smith, “Accurate frequency alignment in fabrication of high-order microring-resonator filters,” Opt. Express 16(20), 15958–15963 (2008), http://www.opticsinfobase.org/abstract.cfm?URI=oe-16-20-15958 .
[CrossRef] [PubMed]

2007 (1)

D. Van Thourhout, J. Van Campenhout, P. Rojo-Romeo, P. Regreny, C. Seassal, P. Binetti, X. J. M. Leijtens, R. Notzel, M. K. Smit, L. Di Cioccio, C. Lagahe, J.-M. Fedeli, and R. Baets, “A photonic interconnect layer on CMOS,” IET Digest 2007, 631 (2007).

2006 (8)

C. Gunn, “CMOS photonics for high-speed interconnects,” IEEE Micro 26(2), 58–66 (2006).
[CrossRef]

T. Barwicz, M. A. Popovic, M. R. Watts, P. T. Rakich, E. P. Ippen, and H. I. Smith, “Fabrication of add-drop filters based on frequency-matched microring resonators,” IEEE J. Lightwave Technol. 24(5), 2207–2218 (2006).
[CrossRef]

C. W. Holzwarth, T. Barwicz, M. A. Popovic, P. T. Rakich, E. P. Ippen, F. X. Kartner, and H. I. Smith, “Accurate resonant frequency spacing of microring filters without postfabrication trimming,” J. Vac. Sci. Technol. B 24(6), 3244–3247 (2006).
[CrossRef]

A. Roger, “Breaking a new sound barrier: it’s a mic-on-a-chip,” Electronic Design 54, 36 (2006).

W. Bogaerts, P. Dumon, D. V. Thourhout, D. Taillaert, P. Jaenen, J. Wouters, S. Beckx, V. Wiaux, and R. Baets, “Compact wavelength-selective functions in Silicon-on-Insulator photonic wires,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1394–1401 (2006).
[CrossRef]

M. A. Popovíc, T. Barwicz, M. R. Watts, P. T. Rakich, L. Socci, E. P. Ippen, F. X. Kärtner, and H. I. Smith, “Multistage high-order microring-resonator add-drop filters,” Opt. Lett. 31(17), 2571–2573 (2006), http://www.opticsinfobase.org/abstract.cfm?URI=ol-31-17-2571 .
[CrossRef] [PubMed]

P. R. Chidambaram, C. Bowen, S. Chakravarthi, C. Machala, and R. Wise, “Fundamentals of silicon material properties for successful exploitation of strain engineering in modern CMOS manufacturing,” IEEE Trans. Electron. Dev. 53(5), 944–964 (2006).
[CrossRef]

L. Vivien, D. Pascal, S. Lardenois, D. Marris-Morini, E. Cassan, F. Grillot, S. Laval, and J. M. Fedeli, “Light injection in SOI microwaveguides using high-efficiency grating couplers,” IEEE J. Lightwave Technol. 24(10), 3810–3815 (2006).
[CrossRef]

2005 (3)

N. Bresson, S. Cristoloveanu, C. Mazuré, F. Letertre, and H. Iwai, “Integration of buried insulators with high thermal conductivity in SOI MOSFETs: Thermal properties and short channel effects,” Solid-State Electron. 49(9), 1522–1528 (2005).
[CrossRef]

T. Barwicz and H. A. Haus, “Three-dimensional analysis of scattering losses due to sidewall roughness in microphotonic waveguides,” IEEE J. Lightwave Technol. 23(9), 2719–2732 (2005).
[CrossRef]

Q. Xu, B. Schmidt, S. Pradhan, and M. Lipson, “Micrometre-scale silicon electro-optic modulator,” Nature 435(7040), 325–327 (2005).
[CrossRef] [PubMed]

2004 (3)

P. Dumon, W. Bogaerts, V. Wiaux, J. Wouters, S. Beckx, J. V. Campenhout, D. Taillaert, B. Luyssaert, P. Bienstman, D. V. Thourhout, and R. Baets, “Low-loss SOI photonic wires and ring resonators fabricated with deep UV lithography,” IEEE Photon. Technol. Lett. 16(5), 1328–1330 (2004).
[CrossRef]

P. Dumon, W. Bogaerts, V. Wiaux, J. Wouters, S. Beckx, J. V. Campenhout, D. Taillaert, B. Luyssaert, P. Bienstman, D. V. Thourhout, and R. Baets, “Low-loss SOI photonic wires and ring resonators fabricated with deep UV lithography,” IEEE Photon. Technol. Lett. 16(5), 1328–1330 (2004).
[CrossRef]

T. Barwicz, M. A. Popović, P. T. Rakich, M. R. Watts, H. A. Haus, E. P. Ippen, and H. I. Smith, “Microring-resonator-based add-drop filters in SiN: fabrication and analysis,” Opt. Express 12(7), 1437–1442 (2004), http://www.opticsinfobase.org/abstract.cfm?URI=oe-12-7-1437 .
[CrossRef] [PubMed]

2003 (2)

D. Taillaert, H. Chong, P. I. Borel, L. H. Frandsen, R. M. de la Rue, and R. Baets, “A compact two-dimensional grating coupler used as a polarization splitter,” IEEE Photon. Technol. Lett. 15(9), 1249–1251 (2003).
[CrossRef]

G. Masini, L. Colace, and G. Assanto, “2.5 Gbit/s polycrystalline germanium-on-silicon photodetector operating from 1.3 to 1.55 mu m,” Appl. Phys. Lett. 82(15), 2524–2526 (2003).
[CrossRef]

2002 (2)

T. Ernst, C. Tinella, C. Raynoud, and S. Cristoloveanu, “Fringing fields in sub-0.1 μm fully depleted SOI MOSFETs: optimization of the device architecture,” Solid-State Electron. 46(3), 373–378 (2002).
[CrossRef]

D. Taillaert, W. Bogaerts, P. Bienstman, T. F. Krauss, P. Van Daele, I. Moerman, S. Verstuyft, K. De Mesel, and R. Baets, “An out-of-plane grating coupler for efficient butt-coupling between compact planar waveguides and single-mode fibers,” IEEE J. Quantum Electron. 38(7), 949–955 (2002).
[CrossRef]

2000 (2)

L. Liao, D. R. Lim, A. M. Agarwal, X. Duan, K. K. Lee, and L. C. Kimerling, “Optical transmission losses in polycrystalline silicon strip waveguides: effects of waveguide dimensions, thermal treatment, hydrogen passivation, and wavelength,” J. Electron. Mater. 29(12), 1380–1386 (2000).
[CrossRef]

J. V. Hryniewicz, P. P. Absil, B. E. Little, R. A. Wilson, and P. T. Ho, “Higher order filter response in coupled microring resonators,” IEEE Photon. Technol. Lett. 12(3), 320–322 (2000).
[CrossRef]

1999 (1)

R. Koh, “Buried layer engineering to reduce the drain-induced barrier lowering of sub-0.05 µm SOI-MOSFET,” Jpn. J. Appl. Phys. 38(Part 1, No. 4B), 2294–2299 (1999).
[CrossRef]

1997 (1)

N. H. Tea, V. Milanović, C. A. Zincke, J. S. Suehle, M. Gaitan, M. E. Zaghloul, and J. Geist, “Hybrid postprocessing etching for CMOS-compatible MEMS,” J. Mircroelectromech. Syst. 6(4), 363–372 (1997).
[CrossRef]

1996 (3)

J. S. Foresi, M. R. Black, A. M. Agarwal, and L. C. Kimerling, “Losses in polycrystalline silicon waveguides,” Appl. Phys. Lett. 68(15), 2052–2054 (1996).
[CrossRef]

A. M. Agarwal, L. Liao, J. S. Foresi, M. R. Black, X. Duan, and L. C. Kimerling, “Low-loss polycrystalline silicon waveguides for silicon photonics,” J. Appl. Phys. 80(11), 6120–6123 (1996).
[CrossRef]

S. Kalluri, M. Ziari, A. Chen, V. Chuyanov, W. H. Steier, D. Chen, B. Jalali, H. Fetterman, and L. R. Dalton, “Monolithic integration of waveguide polymer electrooptic modulators on VLSI circuitry,” IEEE Photon. Technol. Lett. 8(5), 644–646 (1996).
[CrossRef]

Absil, P. P.

J. V. Hryniewicz, P. P. Absil, B. E. Little, R. A. Wilson, and P. T. Ho, “Higher order filter response in coupled microring resonators,” IEEE Photon. Technol. Lett. 12(3), 320–322 (2000).
[CrossRef]

Agarwal, A. M.

L. Liao, D. R. Lim, A. M. Agarwal, X. Duan, K. K. Lee, and L. C. Kimerling, “Optical transmission losses in polycrystalline silicon strip waveguides: effects of waveguide dimensions, thermal treatment, hydrogen passivation, and wavelength,” J. Electron. Mater. 29(12), 1380–1386 (2000).
[CrossRef]

A. M. Agarwal, L. Liao, J. S. Foresi, M. R. Black, X. Duan, and L. C. Kimerling, “Low-loss polycrystalline silicon waveguides for silicon photonics,” J. Appl. Phys. 80(11), 6120–6123 (1996).
[CrossRef]

J. S. Foresi, M. R. Black, A. M. Agarwal, and L. C. Kimerling, “Losses in polycrystalline silicon waveguides,” Appl. Phys. Lett. 68(15), 2052–2054 (1996).
[CrossRef]

Ahn, J.

J. Ahn, M. Fiorentino, R. G. Beausoleil, N. Binkert, A. Davis, D. Fattal, N. P. Jouppi, M. McLaren, C. M. Santori, R. S. Schreiber, S. M. Spillane, D. Vantrease, and Q. Xu, “Devices and architectures for photonic chip-scale integration,” Appl. Phys. A 95(4), 989–997 (2009).
[CrossRef]

Amberg, P.

X. Zheng, J. Lexau, Y. Luo, H. Thacker, T. Pinguet, A. Mekis, G. Li, J. Shi, P. Amberg, N. Pinckney, K. Raj, R. Ho, J. E. Cunningham, and A. V. Krishnamoorthy, “Ultra-low-energy all-CMOS modulator integrated with driver,” Opt. Express 18(3), 3059–3070 (2010), http://www.opticsinfobase.org/oe/abstract.cfm?URI=oe-18-3-3059 .
[CrossRef] [PubMed]

Ang, K.-W.

T.-Y. Liow, K.-W. Ang, Q. Fang, J. Song, Y. Xiong, M.-B. Yu, G.-Q. Lo, and D.-L. Kwong, “Silicon modulators and germanium photodetectors on SOI: monolithic integration, compatibility and performance optimization,” IEEE J. Sel. Top. Quantum Electron. 16(1), 307–315 (2010).
[CrossRef]

Asanovic, K.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building many-core processor-to-DRAM networks with monolithic CMOS silicon photonics,” IEEE Micro 29(4), 8–21 (2009).
[CrossRef]

Asghari, M.

P. Dong, W. Qian, H. Liang, R. Shafiiha, N.-N. Feng, D. Feng, X. Zheng, A. V. Krishnamoorthy, and M. Asghari, “Low power and compact reconfigurable multiplexing devices based on silicon microring resonators,” Opt. Express 18(10), 9852–9858 (2010), http://www.opticsinfobase.org/abstract.cfm?URI=oe-18-10-9852 .
[CrossRef] [PubMed]

Assanto, G.

G. Masini, L. Colace, and G. Assanto, “2.5 Gbit/s polycrystalline germanium-on-silicon photodetector operating from 1.3 to 1.55 mu m,” Appl. Phys. Lett. 82(15), 2524–2526 (2003).
[CrossRef]

Baehr-Jones, T.

M. Hochberg and T. Baehr-Jones, “Towards fabless silicon photonics,” Nat. Photonics 4(8), 492–494 (2010).
[CrossRef]

Baets, R.

P. Dumon, W. Bogaerts, R. Baets, J.-M. Fedeli, and L. Fulbert, “Towards foundry approach for silicon photonics: silicon photonics platform ePIXfab,” Electron. Lett. 45(12), 581–582 (2009).
[CrossRef]

S. K. Selvaraja, P. Jaenen, W. Bogaerts, D. V. Thourhout, P. Dumon, and R. Baets, “Fabrication of Photonic Wire and Crystal Circuits in Silicon-on-Insulator Using 193-nm Optical Lithography,” IEEE J. Lightwave Technol. 27(18), 4076–4083 (2009).
[CrossRef]

D. Van Thourhout, J. Van Campenhout, P. Rojo-Romeo, P. Regreny, C. Seassal, P. Binetti, X. J. M. Leijtens, R. Notzel, M. K. Smit, L. Di Cioccio, C. Lagahe, J.-M. Fedeli, and R. Baets, “A photonic interconnect layer on CMOS,” IET Digest 2007, 631 (2007).

W. Bogaerts, P. Dumon, D. V. Thourhout, D. Taillaert, P. Jaenen, J. Wouters, S. Beckx, V. Wiaux, and R. Baets, “Compact wavelength-selective functions in Silicon-on-Insulator photonic wires,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1394–1401 (2006).
[CrossRef]

P. Dumon, W. Bogaerts, V. Wiaux, J. Wouters, S. Beckx, J. V. Campenhout, D. Taillaert, B. Luyssaert, P. Bienstman, D. V. Thourhout, and R. Baets, “Low-loss SOI photonic wires and ring resonators fabricated with deep UV lithography,” IEEE Photon. Technol. Lett. 16(5), 1328–1330 (2004).
[CrossRef]

P. Dumon, W. Bogaerts, V. Wiaux, J. Wouters, S. Beckx, J. V. Campenhout, D. Taillaert, B. Luyssaert, P. Bienstman, D. V. Thourhout, and R. Baets, “Low-loss SOI photonic wires and ring resonators fabricated with deep UV lithography,” IEEE Photon. Technol. Lett. 16(5), 1328–1330 (2004).
[CrossRef]

D. Taillaert, H. Chong, P. I. Borel, L. H. Frandsen, R. M. de la Rue, and R. Baets, “A compact two-dimensional grating coupler used as a polarization splitter,” IEEE Photon. Technol. Lett. 15(9), 1249–1251 (2003).
[CrossRef]

D. Taillaert, W. Bogaerts, P. Bienstman, T. F. Krauss, P. Van Daele, I. Moerman, S. Verstuyft, K. De Mesel, and R. Baets, “An out-of-plane grating coupler for efficient butt-coupling between compact planar waveguides and single-mode fibers,” IEEE J. Quantum Electron. 38(7), 949–955 (2002).
[CrossRef]

Barwicz, T.

M. A. Popovíc, T. Barwicz, M. R. Watts, P. T. Rakich, L. Socci, E. P. Ippen, F. X. Kärtner, and H. I. Smith, “Multistage high-order microring-resonator add-drop filters,” Opt. Lett. 31(17), 2571–2573 (2006), http://www.opticsinfobase.org/abstract.cfm?URI=ol-31-17-2571 .
[CrossRef] [PubMed]

T. Barwicz, M. A. Popovic, M. R. Watts, P. T. Rakich, E. P. Ippen, and H. I. Smith, “Fabrication of add-drop filters based on frequency-matched microring resonators,” IEEE J. Lightwave Technol. 24(5), 2207–2218 (2006).
[CrossRef]

C. W. Holzwarth, T. Barwicz, M. A. Popovic, P. T. Rakich, E. P. Ippen, F. X. Kartner, and H. I. Smith, “Accurate resonant frequency spacing of microring filters without postfabrication trimming,” J. Vac. Sci. Technol. B 24(6), 3244–3247 (2006).
[CrossRef]

T. Barwicz and H. A. Haus, “Three-dimensional analysis of scattering losses due to sidewall roughness in microphotonic waveguides,” IEEE J. Lightwave Technol. 23(9), 2719–2732 (2005).
[CrossRef]

T. Barwicz, M. A. Popović, P. T. Rakich, M. R. Watts, H. A. Haus, E. P. Ippen, and H. I. Smith, “Microring-resonator-based add-drop filters in SiN: fabrication and analysis,” Opt. Express 12(7), 1437–1442 (2004), http://www.opticsinfobase.org/abstract.cfm?URI=oe-12-7-1437 .
[CrossRef] [PubMed]

Batten, C.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building many-core processor-to-DRAM networks with monolithic CMOS silicon photonics,” IEEE Micro 29(4), 8–21 (2009).
[CrossRef]

Beausoleil, R. G.

J. Ahn, M. Fiorentino, R. G. Beausoleil, N. Binkert, A. Davis, D. Fattal, N. P. Jouppi, M. McLaren, C. M. Santori, R. S. Schreiber, S. M. Spillane, D. Vantrease, and Q. Xu, “Devices and architectures for photonic chip-scale integration,” Appl. Phys. A 95(4), 989–997 (2009).
[CrossRef]

Beckx, S.

W. Bogaerts, P. Dumon, D. V. Thourhout, D. Taillaert, P. Jaenen, J. Wouters, S. Beckx, V. Wiaux, and R. Baets, “Compact wavelength-selective functions in Silicon-on-Insulator photonic wires,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1394–1401 (2006).
[CrossRef]

P. Dumon, W. Bogaerts, V. Wiaux, J. Wouters, S. Beckx, J. V. Campenhout, D. Taillaert, B. Luyssaert, P. Bienstman, D. V. Thourhout, and R. Baets, “Low-loss SOI photonic wires and ring resonators fabricated with deep UV lithography,” IEEE Photon. Technol. Lett. 16(5), 1328–1330 (2004).
[CrossRef]

P. Dumon, W. Bogaerts, V. Wiaux, J. Wouters, S. Beckx, J. V. Campenhout, D. Taillaert, B. Luyssaert, P. Bienstman, D. V. Thourhout, and R. Baets, “Low-loss SOI photonic wires and ring resonators fabricated with deep UV lithography,” IEEE Photon. Technol. Lett. 16(5), 1328–1330 (2004).
[CrossRef]

Bergman, K.

M. Petracca, B. G. Lee, K. Bergman, and L. P. Carloni, “Photonic NoCs: system-level design exploration,” IEEE Micro 29(4), 74–85 (2009).
[CrossRef]

Bhave, S. A.

S. Sridaran and S. A. Bhave, “Nanophotonic devices on thin buried oxide Silicon-On-Insulator substrates,” Opt. Express 18(4), 3850–3857 (2010), http://www.opticsinfobase.org/abstract.cfm?URI=oe-18-4-3850 .
[CrossRef] [PubMed]

Bhimji, S.

B. Stackhouse, S. Bhimji, C. Bostak, D. Bradley, B. Cherkauer, J. Desai, E. Francom, M. Gowan, P. Gronowski, D. Krueger, C. Morganti, and S. Troyer, “A 65 nm 2-billion transistor quad-core Itanium processor,” IEEE J. Solid-State Circuits 44(1), 18–31 (2009).
[CrossRef]

Bienstman, P.

P. Dumon, W. Bogaerts, V. Wiaux, J. Wouters, S. Beckx, J. V. Campenhout, D. Taillaert, B. Luyssaert, P. Bienstman, D. V. Thourhout, and R. Baets, “Low-loss SOI photonic wires and ring resonators fabricated with deep UV lithography,” IEEE Photon. Technol. Lett. 16(5), 1328–1330 (2004).
[CrossRef]

P. Dumon, W. Bogaerts, V. Wiaux, J. Wouters, S. Beckx, J. V. Campenhout, D. Taillaert, B. Luyssaert, P. Bienstman, D. V. Thourhout, and R. Baets, “Low-loss SOI photonic wires and ring resonators fabricated with deep UV lithography,” IEEE Photon. Technol. Lett. 16(5), 1328–1330 (2004).
[CrossRef]

D. Taillaert, W. Bogaerts, P. Bienstman, T. F. Krauss, P. Van Daele, I. Moerman, S. Verstuyft, K. De Mesel, and R. Baets, “An out-of-plane grating coupler for efficient butt-coupling between compact planar waveguides and single-mode fibers,” IEEE J. Quantum Electron. 38(7), 949–955 (2002).
[CrossRef]

Binetti, P.

D. Van Thourhout, J. Van Campenhout, P. Rojo-Romeo, P. Regreny, C. Seassal, P. Binetti, X. J. M. Leijtens, R. Notzel, M. K. Smit, L. Di Cioccio, C. Lagahe, J.-M. Fedeli, and R. Baets, “A photonic interconnect layer on CMOS,” IET Digest 2007, 631 (2007).

Binkert, N.

J. Ahn, M. Fiorentino, R. G. Beausoleil, N. Binkert, A. Davis, D. Fattal, N. P. Jouppi, M. McLaren, C. M. Santori, R. S. Schreiber, S. M. Spillane, D. Vantrease, and Q. Xu, “Devices and architectures for photonic chip-scale integration,” Appl. Phys. A 95(4), 989–997 (2009).
[CrossRef]

Black, M. R.

J. S. Foresi, M. R. Black, A. M. Agarwal, and L. C. Kimerling, “Losses in polycrystalline silicon waveguides,” Appl. Phys. Lett. 68(15), 2052–2054 (1996).
[CrossRef]

A. M. Agarwal, L. Liao, J. S. Foresi, M. R. Black, X. Duan, and L. C. Kimerling, “Low-loss polycrystalline silicon waveguides for silicon photonics,” J. Appl. Phys. 80(11), 6120–6123 (1996).
[CrossRef]

Block, B. A.

I. A. Young, E. Mohammed, J. T. S. Liao, A. M. Kern, S. Palermo, B. A. Block, M. R. Reshotko, and P. L. D. Chang, “Optical I/O Technology for Tera-Scale Computing,” IEEE J. Solid-State Circuits 45(1), 235–248 (2010).
[CrossRef]

B. A. Block, T. R. Younkin, P. S. Davids, M. R. Reshotko, P. Chang, B. M. Polishak, S. Huang, J. Luo, and A. K. Y. Jen, “Electro-optic polymer cladding ring resonator modulators,” Opt. Express 16(22), 18326–18333 (2008), http://www.opticsinfobase.org/abstract.cfm?URI=oe-16-22-18326 .
[CrossRef] [PubMed]

Bogaerts, W.

P. Dumon, W. Bogaerts, R. Baets, J.-M. Fedeli, and L. Fulbert, “Towards foundry approach for silicon photonics: silicon photonics platform ePIXfab,” Electron. Lett. 45(12), 581–582 (2009).
[CrossRef]

S. K. Selvaraja, P. Jaenen, W. Bogaerts, D. V. Thourhout, P. Dumon, and R. Baets, “Fabrication of Photonic Wire and Crystal Circuits in Silicon-on-Insulator Using 193-nm Optical Lithography,” IEEE J. Lightwave Technol. 27(18), 4076–4083 (2009).
[CrossRef]

W. Bogaerts, P. Dumon, D. V. Thourhout, D. Taillaert, P. Jaenen, J. Wouters, S. Beckx, V. Wiaux, and R. Baets, “Compact wavelength-selective functions in Silicon-on-Insulator photonic wires,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1394–1401 (2006).
[CrossRef]

P. Dumon, W. Bogaerts, V. Wiaux, J. Wouters, S. Beckx, J. V. Campenhout, D. Taillaert, B. Luyssaert, P. Bienstman, D. V. Thourhout, and R. Baets, “Low-loss SOI photonic wires and ring resonators fabricated with deep UV lithography,” IEEE Photon. Technol. Lett. 16(5), 1328–1330 (2004).
[CrossRef]

P. Dumon, W. Bogaerts, V. Wiaux, J. Wouters, S. Beckx, J. V. Campenhout, D. Taillaert, B. Luyssaert, P. Bienstman, D. V. Thourhout, and R. Baets, “Low-loss SOI photonic wires and ring resonators fabricated with deep UV lithography,” IEEE Photon. Technol. Lett. 16(5), 1328–1330 (2004).
[CrossRef]

D. Taillaert, W. Bogaerts, P. Bienstman, T. F. Krauss, P. Van Daele, I. Moerman, S. Verstuyft, K. De Mesel, and R. Baets, “An out-of-plane grating coupler for efficient butt-coupling between compact planar waveguides and single-mode fibers,” IEEE J. Quantum Electron. 38(7), 949–955 (2002).
[CrossRef]

Borel, P. I.

D. Taillaert, H. Chong, P. I. Borel, L. H. Frandsen, R. M. de la Rue, and R. Baets, “A compact two-dimensional grating coupler used as a polarization splitter,” IEEE Photon. Technol. Lett. 15(9), 1249–1251 (2003).
[CrossRef]

Bostak, C.

B. Stackhouse, S. Bhimji, C. Bostak, D. Bradley, B. Cherkauer, J. Desai, E. Francom, M. Gowan, P. Gronowski, D. Krueger, C. Morganti, and S. Troyer, “A 65 nm 2-billion transistor quad-core Itanium processor,” IEEE J. Solid-State Circuits 44(1), 18–31 (2009).
[CrossRef]

Bowen, C.

P. R. Chidambaram, C. Bowen, S. Chakravarthi, C. Machala, and R. Wise, “Fundamentals of silicon material properties for successful exploitation of strain engineering in modern CMOS manufacturing,” IEEE Trans. Electron. Dev. 53(5), 944–964 (2006).
[CrossRef]

Bradley, D.

B. Stackhouse, S. Bhimji, C. Bostak, D. Bradley, B. Cherkauer, J. Desai, E. Francom, M. Gowan, P. Gronowski, D. Krueger, C. Morganti, and S. Troyer, “A 65 nm 2-billion transistor quad-core Itanium processor,” IEEE J. Solid-State Circuits 44(1), 18–31 (2009).
[CrossRef]

Bresson, N.

N. Bresson, S. Cristoloveanu, C. Mazuré, F. Letertre, and H. Iwai, “Integration of buried insulators with high thermal conductivity in SOI MOSFETs: Thermal properties and short channel effects,” Solid-State Electron. 49(9), 1522–1528 (2005).
[CrossRef]

Campenhout, J. V.

P. Dumon, W. Bogaerts, V. Wiaux, J. Wouters, S. Beckx, J. V. Campenhout, D. Taillaert, B. Luyssaert, P. Bienstman, D. V. Thourhout, and R. Baets, “Low-loss SOI photonic wires and ring resonators fabricated with deep UV lithography,” IEEE Photon. Technol. Lett. 16(5), 1328–1330 (2004).
[CrossRef]

P. Dumon, W. Bogaerts, V. Wiaux, J. Wouters, S. Beckx, J. V. Campenhout, D. Taillaert, B. Luyssaert, P. Bienstman, D. V. Thourhout, and R. Baets, “Low-loss SOI photonic wires and ring resonators fabricated with deep UV lithography,” IEEE Photon. Technol. Lett. 16(5), 1328–1330 (2004).
[CrossRef]

Carloni, L. P.

M. Petracca, B. G. Lee, K. Bergman, and L. P. Carloni, “Photonic NoCs: system-level design exploration,” IEEE Micro 29(4), 74–85 (2009).
[CrossRef]

Cassan, E.

L. Vivien, D. Pascal, S. Lardenois, D. Marris-Morini, E. Cassan, F. Grillot, S. Laval, and J. M. Fedeli, “Light injection in SOI microwaveguides using high-efficiency grating couplers,” IEEE J. Lightwave Technol. 24(10), 3810–3815 (2006).
[CrossRef]

Chakravarthi, S.

P. R. Chidambaram, C. Bowen, S. Chakravarthi, C. Machala, and R. Wise, “Fundamentals of silicon material properties for successful exploitation of strain engineering in modern CMOS manufacturing,” IEEE Trans. Electron. Dev. 53(5), 944–964 (2006).
[CrossRef]

Chang, P.

B. A. Block, T. R. Younkin, P. S. Davids, M. R. Reshotko, P. Chang, B. M. Polishak, S. Huang, J. Luo, and A. K. Y. Jen, “Electro-optic polymer cladding ring resonator modulators,” Opt. Express 16(22), 18326–18333 (2008), http://www.opticsinfobase.org/abstract.cfm?URI=oe-16-22-18326 .
[CrossRef] [PubMed]

Chang, P. L. D.

I. A. Young, E. Mohammed, J. T. S. Liao, A. M. Kern, S. Palermo, B. A. Block, M. R. Reshotko, and P. L. D. Chang, “Optical I/O Technology for Tera-Scale Computing,” IEEE J. Solid-State Circuits 45(1), 235–248 (2010).
[CrossRef]

Chen, A.

S. Kalluri, M. Ziari, A. Chen, V. Chuyanov, W. H. Steier, D. Chen, B. Jalali, H. Fetterman, and L. R. Dalton, “Monolithic integration of waveguide polymer electrooptic modulators on VLSI circuitry,” IEEE Photon. Technol. Lett. 8(5), 644–646 (1996).
[CrossRef]

Chen, D.

S. Kalluri, M. Ziari, A. Chen, V. Chuyanov, W. H. Steier, D. Chen, B. Jalali, H. Fetterman, and L. R. Dalton, “Monolithic integration of waveguide polymer electrooptic modulators on VLSI circuitry,” IEEE Photon. Technol. Lett. 8(5), 644–646 (1996).
[CrossRef]

Cherkauer, B.

B. Stackhouse, S. Bhimji, C. Bostak, D. Bradley, B. Cherkauer, J. Desai, E. Francom, M. Gowan, P. Gronowski, D. Krueger, C. Morganti, and S. Troyer, “A 65 nm 2-billion transistor quad-core Itanium processor,” IEEE J. Solid-State Circuits 44(1), 18–31 (2009).
[CrossRef]

Chidambaram, P. R.

P. R. Chidambaram, C. Bowen, S. Chakravarthi, C. Machala, and R. Wise, “Fundamentals of silicon material properties for successful exploitation of strain engineering in modern CMOS manufacturing,” IEEE Trans. Electron. Dev. 53(5), 944–964 (2006).
[CrossRef]

Chong, H.

D. Taillaert, H. Chong, P. I. Borel, L. H. Frandsen, R. M. de la Rue, and R. Baets, “A compact two-dimensional grating coupler used as a polarization splitter,” IEEE Photon. Technol. Lett. 15(9), 1249–1251 (2003).
[CrossRef]

Chuyanov, V.

S. Kalluri, M. Ziari, A. Chen, V. Chuyanov, W. H. Steier, D. Chen, B. Jalali, H. Fetterman, and L. R. Dalton, “Monolithic integration of waveguide polymer electrooptic modulators on VLSI circuitry,” IEEE Photon. Technol. Lett. 8(5), 644–646 (1996).
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P. Dumon, W. Bogaerts, R. Baets, J.-M. Fedeli, and L. Fulbert, “Towards foundry approach for silicon photonics: silicon photonics platform ePIXfab,” Electron. Lett. 45(12), 581–582 (2009).
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W. Bogaerts, P. Dumon, D. V. Thourhout, D. Taillaert, P. Jaenen, J. Wouters, S. Beckx, V. Wiaux, and R. Baets, “Compact wavelength-selective functions in Silicon-on-Insulator photonic wires,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1394–1401 (2006).
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L. Vivien, D. Pascal, S. Lardenois, D. Marris-Morini, E. Cassan, F. Grillot, S. Laval, and J. M. Fedeli, “Light injection in SOI microwaveguides using high-efficiency grating couplers,” IEEE J. Lightwave Technol. 24(10), 3810–3815 (2006).
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P. Dumon, W. Bogaerts, R. Baets, J.-M. Fedeli, and L. Fulbert, “Towards foundry approach for silicon photonics: silicon photonics platform ePIXfab,” Electron. Lett. 45(12), 581–582 (2009).
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Feng, D.

P. Dong, W. Qian, H. Liang, R. Shafiiha, N.-N. Feng, D. Feng, X. Zheng, A. V. Krishnamoorthy, and M. Asghari, “Low power and compact reconfigurable multiplexing devices based on silicon microring resonators,” Opt. Express 18(10), 9852–9858 (2010), http://www.opticsinfobase.org/abstract.cfm?URI=oe-18-10-9852 .
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S. Kalluri, M. Ziari, A. Chen, V. Chuyanov, W. H. Steier, D. Chen, B. Jalali, H. Fetterman, and L. R. Dalton, “Monolithic integration of waveguide polymer electrooptic modulators on VLSI circuitry,” IEEE Photon. Technol. Lett. 8(5), 644–646 (1996).
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J. Ahn, M. Fiorentino, R. G. Beausoleil, N. Binkert, A. Davis, D. Fattal, N. P. Jouppi, M. McLaren, C. M. Santori, R. S. Schreiber, S. M. Spillane, D. Vantrease, and Q. Xu, “Devices and architectures for photonic chip-scale integration,” Appl. Phys. A 95(4), 989–997 (2009).
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A. M. Agarwal, L. Liao, J. S. Foresi, M. R. Black, X. Duan, and L. C. Kimerling, “Low-loss polycrystalline silicon waveguides for silicon photonics,” J. Appl. Phys. 80(11), 6120–6123 (1996).
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D. Taillaert, H. Chong, P. I. Borel, L. H. Frandsen, R. M. de la Rue, and R. Baets, “A compact two-dimensional grating coupler used as a polarization splitter,” IEEE Photon. Technol. Lett. 15(9), 1249–1251 (2003).
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P. Dumon, W. Bogaerts, R. Baets, J.-M. Fedeli, and L. Fulbert, “Towards foundry approach for silicon photonics: silicon photonics platform ePIXfab,” Electron. Lett. 45(12), 581–582 (2009).
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L. Vivien, D. Pascal, S. Lardenois, D. Marris-Morini, E. Cassan, F. Grillot, S. Laval, and J. M. Fedeli, “Light injection in SOI microwaveguides using high-efficiency grating couplers,” IEEE J. Lightwave Technol. 24(10), 3810–3815 (2006).
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B. Stackhouse, S. Bhimji, C. Bostak, D. Bradley, B. Cherkauer, J. Desai, E. Francom, M. Gowan, P. Gronowski, D. Krueger, C. Morganti, and S. Troyer, “A 65 nm 2-billion transistor quad-core Itanium processor,” IEEE J. Solid-State Circuits 44(1), 18–31 (2009).
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J. Sun, C. W. Holzwarth, M. Dahlem, J. T. Hastings, and H. I. Smith, “Accurate frequency alignment in fabrication of high-order microring-resonator filters,” Opt. Express 16(20), 15958–15963 (2008), http://www.opticsinfobase.org/abstract.cfm?URI=oe-16-20-15958 .
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T. Barwicz, M. A. Popović, P. T. Rakich, M. R. Watts, H. A. Haus, E. P. Ippen, and H. I. Smith, “Microring-resonator-based add-drop filters in SiN: fabrication and analysis,” Opt. Express 12(7), 1437–1442 (2004), http://www.opticsinfobase.org/abstract.cfm?URI=oe-12-7-1437 .
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J. V. Hryniewicz, P. P. Absil, B. E. Little, R. A. Wilson, and P. T. Ho, “Higher order filter response in coupled microring resonators,” IEEE Photon. Technol. Lett. 12(3), 320–322 (2000).
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X. Zheng, J. Lexau, Y. Luo, H. Thacker, T. Pinguet, A. Mekis, G. Li, J. Shi, P. Amberg, N. Pinckney, K. Raj, R. Ho, J. E. Cunningham, and A. V. Krishnamoorthy, “Ultra-low-energy all-CMOS modulator integrated with driver,” Opt. Express 18(3), 3059–3070 (2010), http://www.opticsinfobase.org/oe/abstract.cfm?URI=oe-18-3-3059 .
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J. Sun, C. W. Holzwarth, M. Dahlem, J. T. Hastings, and H. I. Smith, “Accurate frequency alignment in fabrication of high-order microring-resonator filters,” Opt. Express 16(20), 15958–15963 (2008), http://www.opticsinfobase.org/abstract.cfm?URI=oe-16-20-15958 .
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C. W. Holzwarth, T. Barwicz, M. A. Popovic, P. T. Rakich, E. P. Ippen, F. X. Kartner, and H. I. Smith, “Accurate resonant frequency spacing of microring filters without postfabrication trimming,” J. Vac. Sci. Technol. B 24(6), 3244–3247 (2006).
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C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building many-core processor-to-DRAM networks with monolithic CMOS silicon photonics,” IEEE Micro 29(4), 8–21 (2009).
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J. V. Hryniewicz, P. P. Absil, B. E. Little, R. A. Wilson, and P. T. Ho, “Higher order filter response in coupled microring resonators,” IEEE Photon. Technol. Lett. 12(3), 320–322 (2000).
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Huang, S.

B. A. Block, T. R. Younkin, P. S. Davids, M. R. Reshotko, P. Chang, B. M. Polishak, S. Huang, J. Luo, and A. K. Y. Jen, “Electro-optic polymer cladding ring resonator modulators,” Opt. Express 16(22), 18326–18333 (2008), http://www.opticsinfobase.org/abstract.cfm?URI=oe-16-22-18326 .
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M. A. Popovíc, T. Barwicz, M. R. Watts, P. T. Rakich, L. Socci, E. P. Ippen, F. X. Kärtner, and H. I. Smith, “Multistage high-order microring-resonator add-drop filters,” Opt. Lett. 31(17), 2571–2573 (2006), http://www.opticsinfobase.org/abstract.cfm?URI=ol-31-17-2571 .
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C. W. Holzwarth, T. Barwicz, M. A. Popovic, P. T. Rakich, E. P. Ippen, F. X. Kartner, and H. I. Smith, “Accurate resonant frequency spacing of microring filters without postfabrication trimming,” J. Vac. Sci. Technol. B 24(6), 3244–3247 (2006).
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T. Barwicz, M. A. Popovic, M. R. Watts, P. T. Rakich, E. P. Ippen, and H. I. Smith, “Fabrication of add-drop filters based on frequency-matched microring resonators,” IEEE J. Lightwave Technol. 24(5), 2207–2218 (2006).
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T. Barwicz, M. A. Popović, P. T. Rakich, M. R. Watts, H. A. Haus, E. P. Ippen, and H. I. Smith, “Microring-resonator-based add-drop filters in SiN: fabrication and analysis,” Opt. Express 12(7), 1437–1442 (2004), http://www.opticsinfobase.org/abstract.cfm?URI=oe-12-7-1437 .
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Iwai, H.

N. Bresson, S. Cristoloveanu, C. Mazuré, F. Letertre, and H. Iwai, “Integration of buried insulators with high thermal conductivity in SOI MOSFETs: Thermal properties and short channel effects,” Solid-State Electron. 49(9), 1522–1528 (2005).
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Jaenen, P.

S. K. Selvaraja, P. Jaenen, W. Bogaerts, D. V. Thourhout, P. Dumon, and R. Baets, “Fabrication of Photonic Wire and Crystal Circuits in Silicon-on-Insulator Using 193-nm Optical Lithography,” IEEE J. Lightwave Technol. 27(18), 4076–4083 (2009).
[CrossRef]

W. Bogaerts, P. Dumon, D. V. Thourhout, D. Taillaert, P. Jaenen, J. Wouters, S. Beckx, V. Wiaux, and R. Baets, “Compact wavelength-selective functions in Silicon-on-Insulator photonic wires,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1394–1401 (2006).
[CrossRef]

Jalali, B.

S. Kalluri, M. Ziari, A. Chen, V. Chuyanov, W. H. Steier, D. Chen, B. Jalali, H. Fetterman, and L. R. Dalton, “Monolithic integration of waveguide polymer electrooptic modulators on VLSI circuitry,” IEEE Photon. Technol. Lett. 8(5), 644–646 (1996).
[CrossRef]

Jen, A. K. Y.

B. A. Block, T. R. Younkin, P. S. Davids, M. R. Reshotko, P. Chang, B. M. Polishak, S. Huang, J. Luo, and A. K. Y. Jen, “Electro-optic polymer cladding ring resonator modulators,” Opt. Express 16(22), 18326–18333 (2008), http://www.opticsinfobase.org/abstract.cfm?URI=oe-16-22-18326 .
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Joshi, A.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building many-core processor-to-DRAM networks with monolithic CMOS silicon photonics,” IEEE Micro 29(4), 8–21 (2009).
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J. Ahn, M. Fiorentino, R. G. Beausoleil, N. Binkert, A. Davis, D. Fattal, N. P. Jouppi, M. McLaren, C. M. Santori, R. S. Schreiber, S. M. Spillane, D. Vantrease, and Q. Xu, “Devices and architectures for photonic chip-scale integration,” Appl. Phys. A 95(4), 989–997 (2009).
[CrossRef]

Kalluri, S.

S. Kalluri, M. Ziari, A. Chen, V. Chuyanov, W. H. Steier, D. Chen, B. Jalali, H. Fetterman, and L. R. Dalton, “Monolithic integration of waveguide polymer electrooptic modulators on VLSI circuitry,” IEEE Photon. Technol. Lett. 8(5), 644–646 (1996).
[CrossRef]

Kartner, F. X.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building many-core processor-to-DRAM networks with monolithic CMOS silicon photonics,” IEEE Micro 29(4), 8–21 (2009).
[CrossRef]

C. W. Holzwarth, T. Barwicz, M. A. Popovic, P. T. Rakich, E. P. Ippen, F. X. Kartner, and H. I. Smith, “Accurate resonant frequency spacing of microring filters without postfabrication trimming,” J. Vac. Sci. Technol. B 24(6), 3244–3247 (2006).
[CrossRef]

Kärtner, F. X.

M. A. Popovíc, T. Barwicz, M. R. Watts, P. T. Rakich, L. Socci, E. P. Ippen, F. X. Kärtner, and H. I. Smith, “Multistage high-order microring-resonator add-drop filters,” Opt. Lett. 31(17), 2571–2573 (2006), http://www.opticsinfobase.org/abstract.cfm?URI=ol-31-17-2571 .
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Figures (6)

Fig. 1
Fig. 1

(a) Optical micrograph of 2.2×2.0 mm photonic die fabricated in a 28 nm bulk-CMOS process containing 384 optical test ports and over a million transistors. Integrated front-end photonic and electronic features are exposed by silicon substrate removal and back-side imaging. The photonic die shared a 26×33 mm reticle set with standard electronic projects shown in (b) and was fabricated using the standard process flow on a 300 mm wafer shown in (c).

Fig. 2
Fig. 2

(a) Optical micrograph showing relevant dielectric window openings for the dielectric etch as well as optical access. (b) Cross-sectional scanning electron micrograph (SEM) of die after localized substrate removal in the photonic region. To demonstrate the film planarity and stability, the undercut shown here is roughly five times wider than required. A die-saw was used to section the processed chip through the undercut region resulting in the rough CMOS layer stack edge.

Fig. 4
Fig. 4

Optical micrograph of a four-channel second-order filterbank. Filter bank layout minimizes required undercut distance from the etch vias indicated at the bottom of the figure. Heaters integrated in the center of the rings allow for thermal tuning by external circuits. Design: 10 μm ring radius (incremented by 10 nm per channel), 670 nm waveguide width, 80 nm polysilicon thickness, 7.63% bus-ring power coupling, 0.3% ring-ring power coupling.

Fig. 3
Fig. 3

(a) Measured insertion loss of the vertical grating couplers (inset: SEM of coupler). Waveguide propagation loss (b) calculated by the diffential loss through two waveguide structures (inset: TEM of waveguide cross-section for 670 x 80 nm polysilicon core, clad with a conformal 50 nm silicon nitride liner and surrounded by oxide) with a straight section length difference of 2.72 mm and identical bends. Error bars calculated as the standard deviation for 4 samples. (c) Transmission through the drop port of a weakly coupled 670 nm width, 20 μm radius ring resonator. SEM of resonator containing fill shapes in center for process compliance shown in inset. The measured quality factor was 7960. Measured data (blue dots) is most closely fit with a simulated ring resonator transmission response with a 55 dB/cm waveguide loss. The sensitivity of this technique is illustrated by the divergence of the 50 dB/cm and 60 dB/cm simulated responses.

Fig. 5
Fig. 5

(a) Measured transmission normalized to off-resonance through port transmission for a four-channel second-order filterbank. No thermal tuning or post-fabrication trimming was performed for these measurements. Port line colors and naming convention correspond to labels in Fig. 4. To extract the resonant frequency mismatch for the two rings in the second-order filters, measured through and drop transmission functions were fit to ideal filter model with the following free parameters: bus-ring coupling coefficients, ring-ring coupling coefficients, ring round-trip loss, and separate resonant frequencies for each ring. (b,c) Resulting model fit (dotted black) lines for through and drop responses overlayed with measured transmission (solid red) lines for two example filters. Extracted bus-ring coupling coefficients of 10.2% ± 1% and ring-ring coupling coefficients of 0.63% ± 0.08% differ from design values due to thinner polysilicon and thicker nitride layers in fabricated filters as compared to simulated couplers. (d) Histogram of resonant frequency mismatch between the two rings in the second-order filters from four die from different wafer locations.

Fig. 6
Fig. 6

(a) Transmission of a single ring filter on temperature controlled stage stepped in 1 °C increments between 25 °C and 30 °C. A thermal tuning coefficient of 7.9 GHz/°C is extracted from measurments. (b) Heater temperature plotted as a function of heater power in the photonic region before and after the localized substrate removal process. The thermal impedences are the slopes of the linear fits. A thermal impedence increase of 24-fold, 1.8 mK/μW to 44 mK/μW, is observed, which yields a proportional reduction in thermal tuning power.

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