J. Huang, S. Zhou, and P. Willett, “Nonbinary LDPC coding for multicarrier underwater acoustic communication,” IEEE J. Sel. Areas Comm. 26(9), 1684–1696 (2008).

[CrossRef]

I. B. Djordjevic, M. Cvijetic, L. Xu, and T. Wang, “Using LDPC-coded modulation and coherent detection for ultra high-speed optical transmission,” J. Lightwave Technol. 25(11), 3619–3625 (2007).

[CrossRef]

L. Lan, L. Zeng, Y. Y. Tai, L. Chen, S. Lin, and K. Abdel-Ghaffar, “Construction of quasi-cyclic LDPC codes for AWGN and binary erasure channels: A finite field approach,” IEEE Trans. Inf. Theory 53(7), 2429–2458 (2007).

[CrossRef]

Z.-W. Li, L. Chen, L.-Q. Zeng, S. Lin, and W. Fong, “Efficient encoding of quasi-cyclic low-density parity-check codes,” IEEE Trans. Commun. 54(1), 71–81 (2006).

[CrossRef]

M. M. Mansour, N. R. Shanbhag, M. M. Mansour, and N. R. Shanbhag, “A 640-Mb/s 2048-bit programmable LDPC decoder chip,” IEEE J. Solid-state Circuits 41(3), 684–698 (2006).

[CrossRef]

I. B. Djordjevic and B. Vasic, “Multilevel coding in M-ary DPSK/differential QAM high-speed optical transmission with direct detection,” J. Lightwave Technol. 24(1), 420–428 (2006).

[CrossRef]

L. Yang, H. Lui, and C.-J. R. Shi, “Code construction and FPGA implementation of a low-error-floor multi-rate low-density parity-check code decoder,” IEEE Trans. Circ. Syst. 53–4, 892–904 (2006).

H. Zhong and T. Zhang, “Block-LDPC: a practical LDPC coding system design approach,” IEEE Trans. Circuits Syst. I 52(4), 766–775 (2005).

[CrossRef]

J. Hou, P. H. Siegel, and L. B. Milstein, “Design of multi-input multi-output systems based on low-density parity-check codes,” IEEE Trans. Commun. 53(4), 601–611 (2005).

[CrossRef]

J. Chen, A. Dholakia, E. Eleftheriou, M. Fossorier, and X.-Y. Hu, “Reduced-complexity decoding of LDPC codes,” IEEE Trans. Commun. 53(8), 1288–1299 (2005).

[CrossRef]

E. Yeo, B. Nikolic, and V. Anantharam, “Iterative decoder architectures,” IEEE Commun. Mag. 41(8), 132–140 (2003).

[CrossRef]

C. L. Chen, W. W. Peterson, and E. J. Weldon., “Some results on quasi-cyclic codes,” Inf. Control 15(5), 407–423 (1969).

[CrossRef]

R. G. Gallager, “Low density parity check codes,” IRE Trans. Inf. Theory 8(1), 21–28 (1962).

[CrossRef]

L. Lan, L. Zeng, Y. Y. Tai, L. Chen, S. Lin, and K. Abdel-Ghaffar, “Construction of quasi-cyclic LDPC codes for AWGN and binary erasure channels: A finite field approach,” IEEE Trans. Inf. Theory 53(7), 2429–2458 (2007).

[CrossRef]

E. Yeo, B. Nikolic, and V. Anantharam, “Iterative decoder architectures,” IEEE Commun. Mag. 41(8), 132–140 (2003).

[CrossRef]

C. L. Chen, W. W. Peterson, and E. J. Weldon., “Some results on quasi-cyclic codes,” Inf. Control 15(5), 407–423 (1969).

[CrossRef]

J. Chen, A. Dholakia, E. Eleftheriou, M. Fossorier, and X.-Y. Hu, “Reduced-complexity decoding of LDPC codes,” IEEE Trans. Commun. 53(8), 1288–1299 (2005).

[CrossRef]

L. Lan, L. Zeng, Y. Y. Tai, L. Chen, S. Lin, and K. Abdel-Ghaffar, “Construction of quasi-cyclic LDPC codes for AWGN and binary erasure channels: A finite field approach,” IEEE Trans. Inf. Theory 53(7), 2429–2458 (2007).

[CrossRef]

Z.-W. Li, L. Chen, L.-Q. Zeng, S. Lin, and W. Fong, “Efficient encoding of quasi-cyclic low-density parity-check codes,” IEEE Trans. Commun. 54(1), 71–81 (2006).

[CrossRef]

I. B. Djordjevic, M. Cvijetic, L. Xu, and T. Wang, “Using LDPC-coded modulation and coherent detection for ultra high-speed optical transmission,” J. Lightwave Technol. 25(11), 3619–3625 (2007).

[CrossRef]

J. Chen, A. Dholakia, E. Eleftheriou, M. Fossorier, and X.-Y. Hu, “Reduced-complexity decoding of LDPC codes,” IEEE Trans. Commun. 53(8), 1288–1299 (2005).

[CrossRef]

I. B. Djordjevic, M. Cvijetic, L. Xu, and T. Wang, “Using LDPC-coded modulation and coherent detection for ultra high-speed optical transmission,” J. Lightwave Technol. 25(11), 3619–3625 (2007).

[CrossRef]

I. B. Djordjevic and B. Vasic, “Multilevel coding in M-ary DPSK/differential QAM high-speed optical transmission with direct detection,” J. Lightwave Technol. 24(1), 420–428 (2006).

[CrossRef]

J. Chen, A. Dholakia, E. Eleftheriou, M. Fossorier, and X.-Y. Hu, “Reduced-complexity decoding of LDPC codes,” IEEE Trans. Commun. 53(8), 1288–1299 (2005).

[CrossRef]

Z.-W. Li, L. Chen, L.-Q. Zeng, S. Lin, and W. Fong, “Efficient encoding of quasi-cyclic low-density parity-check codes,” IEEE Trans. Commun. 54(1), 71–81 (2006).

[CrossRef]

J. Chen, A. Dholakia, E. Eleftheriou, M. Fossorier, and X.-Y. Hu, “Reduced-complexity decoding of LDPC codes,” IEEE Trans. Commun. 53(8), 1288–1299 (2005).

[CrossRef]

R. G. Gallager, “Low density parity check codes,” IRE Trans. Inf. Theory 8(1), 21–28 (1962).

[CrossRef]

J. Hou, P. H. Siegel, and L. B. Milstein, “Design of multi-input multi-output systems based on low-density parity-check codes,” IEEE Trans. Commun. 53(4), 601–611 (2005).

[CrossRef]

J. Chen, A. Dholakia, E. Eleftheriou, M. Fossorier, and X.-Y. Hu, “Reduced-complexity decoding of LDPC codes,” IEEE Trans. Commun. 53(8), 1288–1299 (2005).

[CrossRef]

J. Huang, S. Zhou, and P. Willett, “Nonbinary LDPC coding for multicarrier underwater acoustic communication,” IEEE J. Sel. Areas Comm. 26(9), 1684–1696 (2008).

[CrossRef]

L. Lan, L. Zeng, Y. Y. Tai, L. Chen, S. Lin, and K. Abdel-Ghaffar, “Construction of quasi-cyclic LDPC codes for AWGN and binary erasure channels: A finite field approach,” IEEE Trans. Inf. Theory 53(7), 2429–2458 (2007).

[CrossRef]

Z.-W. Li, L. Chen, L.-Q. Zeng, S. Lin, and W. Fong, “Efficient encoding of quasi-cyclic low-density parity-check codes,” IEEE Trans. Commun. 54(1), 71–81 (2006).

[CrossRef]

L. Lan, L. Zeng, Y. Y. Tai, L. Chen, S. Lin, and K. Abdel-Ghaffar, “Construction of quasi-cyclic LDPC codes for AWGN and binary erasure channels: A finite field approach,” IEEE Trans. Inf. Theory 53(7), 2429–2458 (2007).

[CrossRef]

Z.-W. Li, L. Chen, L.-Q. Zeng, S. Lin, and W. Fong, “Efficient encoding of quasi-cyclic low-density parity-check codes,” IEEE Trans. Commun. 54(1), 71–81 (2006).

[CrossRef]

L. Yang, H. Lui, and C.-J. R. Shi, “Code construction and FPGA implementation of a low-error-floor multi-rate low-density parity-check code decoder,” IEEE Trans. Circ. Syst. 53–4, 892–904 (2006).

M. M. Mansour, N. R. Shanbhag, M. M. Mansour, and N. R. Shanbhag, “A 640-Mb/s 2048-bit programmable LDPC decoder chip,” IEEE J. Solid-state Circuits 41(3), 684–698 (2006).

[CrossRef]

M. M. Mansour, N. R. Shanbhag, M. M. Mansour, and N. R. Shanbhag, “A 640-Mb/s 2048-bit programmable LDPC decoder chip,” IEEE J. Solid-state Circuits 41(3), 684–698 (2006).

[CrossRef]

J. Hou, P. H. Siegel, and L. B. Milstein, “Design of multi-input multi-output systems based on low-density parity-check codes,” IEEE Trans. Commun. 53(4), 601–611 (2005).

[CrossRef]

E. Yeo, B. Nikolic, and V. Anantharam, “Iterative decoder architectures,” IEEE Commun. Mag. 41(8), 132–140 (2003).

[CrossRef]

C. L. Chen, W. W. Peterson, and E. J. Weldon., “Some results on quasi-cyclic codes,” Inf. Control 15(5), 407–423 (1969).

[CrossRef]

M. M. Mansour, N. R. Shanbhag, M. M. Mansour, and N. R. Shanbhag, “A 640-Mb/s 2048-bit programmable LDPC decoder chip,” IEEE J. Solid-state Circuits 41(3), 684–698 (2006).

[CrossRef]

M. M. Mansour, N. R. Shanbhag, M. M. Mansour, and N. R. Shanbhag, “A 640-Mb/s 2048-bit programmable LDPC decoder chip,” IEEE J. Solid-state Circuits 41(3), 684–698 (2006).

[CrossRef]

L. Yang, H. Lui, and C.-J. R. Shi, “Code construction and FPGA implementation of a low-error-floor multi-rate low-density parity-check code decoder,” IEEE Trans. Circ. Syst. 53–4, 892–904 (2006).

J. Hou, P. H. Siegel, and L. B. Milstein, “Design of multi-input multi-output systems based on low-density parity-check codes,” IEEE Trans. Commun. 53(4), 601–611 (2005).

[CrossRef]

L. Lan, L. Zeng, Y. Y. Tai, L. Chen, S. Lin, and K. Abdel-Ghaffar, “Construction of quasi-cyclic LDPC codes for AWGN and binary erasure channels: A finite field approach,” IEEE Trans. Inf. Theory 53(7), 2429–2458 (2007).

[CrossRef]

I. B. Djordjevic and B. Vasic, “Multilevel coding in M-ary DPSK/differential QAM high-speed optical transmission with direct detection,” J. Lightwave Technol. 24(1), 420–428 (2006).

[CrossRef]

I. B. Djordjevic, M. Cvijetic, L. Xu, and T. Wang, “Using LDPC-coded modulation and coherent detection for ultra high-speed optical transmission,” J. Lightwave Technol. 25(11), 3619–3625 (2007).

[CrossRef]

C. L. Chen, W. W. Peterson, and E. J. Weldon., “Some results on quasi-cyclic codes,” Inf. Control 15(5), 407–423 (1969).

[CrossRef]

J. Huang, S. Zhou, and P. Willett, “Nonbinary LDPC coding for multicarrier underwater acoustic communication,” IEEE J. Sel. Areas Comm. 26(9), 1684–1696 (2008).

[CrossRef]

I. B. Djordjevic, M. Cvijetic, L. Xu, and T. Wang, “Using LDPC-coded modulation and coherent detection for ultra high-speed optical transmission,” J. Lightwave Technol. 25(11), 3619–3625 (2007).

[CrossRef]

L. Yang, H. Lui, and C.-J. R. Shi, “Code construction and FPGA implementation of a low-error-floor multi-rate low-density parity-check code decoder,” IEEE Trans. Circ. Syst. 53–4, 892–904 (2006).

E. Yeo, B. Nikolic, and V. Anantharam, “Iterative decoder architectures,” IEEE Commun. Mag. 41(8), 132–140 (2003).

[CrossRef]

L. Lan, L. Zeng, Y. Y. Tai, L. Chen, S. Lin, and K. Abdel-Ghaffar, “Construction of quasi-cyclic LDPC codes for AWGN and binary erasure channels: A finite field approach,” IEEE Trans. Inf. Theory 53(7), 2429–2458 (2007).

[CrossRef]

Z.-W. Li, L. Chen, L.-Q. Zeng, S. Lin, and W. Fong, “Efficient encoding of quasi-cyclic low-density parity-check codes,” IEEE Trans. Commun. 54(1), 71–81 (2006).

[CrossRef]

H. Zhong and T. Zhang, “Block-LDPC: a practical LDPC coding system design approach,” IEEE Trans. Circuits Syst. I 52(4), 766–775 (2005).

[CrossRef]

H. Zhong and T. Zhang, “Block-LDPC: a practical LDPC coding system design approach,” IEEE Trans. Circuits Syst. I 52(4), 766–775 (2005).

[CrossRef]

J. Huang, S. Zhou, and P. Willett, “Nonbinary LDPC coding for multicarrier underwater acoustic communication,” IEEE J. Sel. Areas Comm. 26(9), 1684–1696 (2008).

[CrossRef]

E. Yeo, B. Nikolic, and V. Anantharam, “Iterative decoder architectures,” IEEE Commun. Mag. 41(8), 132–140 (2003).

[CrossRef]

J. Huang, S. Zhou, and P. Willett, “Nonbinary LDPC coding for multicarrier underwater acoustic communication,” IEEE J. Sel. Areas Comm. 26(9), 1684–1696 (2008).

[CrossRef]

M. M. Mansour, N. R. Shanbhag, M. M. Mansour, and N. R. Shanbhag, “A 640-Mb/s 2048-bit programmable LDPC decoder chip,” IEEE J. Solid-state Circuits 41(3), 684–698 (2006).

[CrossRef]

L. Yang, H. Lui, and C.-J. R. Shi, “Code construction and FPGA implementation of a low-error-floor multi-rate low-density parity-check code decoder,” IEEE Trans. Circ. Syst. 53–4, 892–904 (2006).

H. Zhong and T. Zhang, “Block-LDPC: a practical LDPC coding system design approach,” IEEE Trans. Circuits Syst. I 52(4), 766–775 (2005).

[CrossRef]

J. Chen, A. Dholakia, E. Eleftheriou, M. Fossorier, and X.-Y. Hu, “Reduced-complexity decoding of LDPC codes,” IEEE Trans. Commun. 53(8), 1288–1299 (2005).

[CrossRef]

J. Hou, P. H. Siegel, and L. B. Milstein, “Design of multi-input multi-output systems based on low-density parity-check codes,” IEEE Trans. Commun. 53(4), 601–611 (2005).

[CrossRef]

Z.-W. Li, L. Chen, L.-Q. Zeng, S. Lin, and W. Fong, “Efficient encoding of quasi-cyclic low-density parity-check codes,” IEEE Trans. Commun. 54(1), 71–81 (2006).

[CrossRef]

L. Lan, L. Zeng, Y. Y. Tai, L. Chen, S. Lin, and K. Abdel-Ghaffar, “Construction of quasi-cyclic LDPC codes for AWGN and binary erasure channels: A finite field approach,” IEEE Trans. Inf. Theory 53(7), 2429–2458 (2007).

[CrossRef]

C. L. Chen, W. W. Peterson, and E. J. Weldon., “Some results on quasi-cyclic codes,” Inf. Control 15(5), 407–423 (1969).

[CrossRef]

R. G. Gallager, “Low density parity check codes,” IRE Trans. Inf. Theory 8(1), 21–28 (1962).

[CrossRef]

I. B. Djordjevic and B. Vasic, “Multilevel coding in M-ary DPSK/differential QAM high-speed optical transmission with direct detection,” J. Lightwave Technol. 24(1), 420–428 (2006).

[CrossRef]

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