Abstract

We present a broadband 2x2 electro-optic silicon switch with an ultralow switching power and fast switching time based on a Mach-Zehnder interferometer (MZI). Forward-biased p-i-n junctions are employed to tune the phase of silicon waveguides in the MZI, to achieve a π-phase switching power of 0.6 mW with a drive voltage 0.83 V with a MZI arm length of 4 mm. The 10%-90% switching time is demonstrated to be 6 ns. Optical crosstalk levels lower than −17 dB are obtained for an optical bandwidth of 60 nm. The free carrier induced silicon refractive index change is extracted from the experimental results for the concentration range from 1016 to 1017 cm−3. We find that at the concentration of 1016 cm−3, the index change is about twice that calculated by the commonly used index change equation.

© 2010 OSA

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    [CrossRef]
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    [CrossRef]
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2010 (2)

2009 (6)

J. Van Campenhout, W. M. Green, S. Assefa, and Y. A. Vlasov, “Low-power, 2 x 2 silicon electro-optic switch with 110-nm bandwidth for broadband reconfigurable optical networks,” Opt. Express 17(26), 24020–24029 (2009).
[CrossRef]

P. Dong, S. Liao, D. Feng, H. Liang, D. Zheng, R. Shafiiha, C.-C. Kung, W. Qian, G. Li, X. Zheng, A. V. Krishnamoorthy, and M. Asghari, “Low Vpp, ultralow-energy, compact, high-speed silicon electro-optic modulator,” Opt. Express 17(25), 22484–22490 (2009).
[CrossRef]

D. A. B. Miller, “Device requirements for optical interconnects to silicon chips,” Proc. IEEE 97, 1166–1185 (2009).
[CrossRef]

A. V. Krishnamoorthy, R. Ho, X. Zheng, H. Schwetman, J. Lexau, P. Koka, G. Li, I. Shubin, and J. E. Cunningham, “Computer systems based on silicon photonic interconnects,” Proc. IEEE 97, 1337–1361 (2009).
[CrossRef]

J. Ahn, M. Fiorentino, R. G. Beausoleil, N. Binkert, A. Davis, D. Fattal, N. P. Jouppi, M. McLaren, C. M. Santori, R. S. Schreiber, S. M. Spillane, D. Vantrease, and Q. Xu, “Devices and architectures for photonic chip-scale integration,” Appl. Phys., A Mater. Sci. Process. 95(4), 989–997 (2009).
[CrossRef]

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building Many-Core Processor-to-DRAM Networks with Monolithic CMOS Silicon Photonics,” IEEE Micro 29(4), 8–21 (2009).
[CrossRef]

2008 (3)

B. G. Lee, A. Biberman, P. Dong, M. Lipson, and K. Bergman, “All-optical comb switch for multiwavelength message routing in silicon photonic networks,” IEEE Photon. Technol. Lett. 20(10), 767–769 (2008).
[CrossRef]

Y. Vlasov, W. M. J. Green, and F. Xia, “High-throughput silicon nanophotonic wavelength-insensitive switch for on-chip optical networks,” Nat. Photonics 2(4), 242–246 (2008).
[CrossRef]

A. Shacham, K. Bergman, and L. P. Carloni, “Photonic networks-on-chip for future generations of chip multiprocessors,” IEEE Trans. Comput. 57(9), 1246–1260 (2008).
[CrossRef]

2007 (1)

2006 (3)

R. A. Soref, “The past, present and future of silicon photonics,” IEEE J. Sel. Top. Quant. Electron. 12(6), 1678–1687 (2006).
[CrossRef]

L. C. Kimerling and ., “Electronic–photonic integrated circuits on the CMOS platform,” Proc. SPIE 6125, 6–15 (2006).

B. Jalali, M. Paniccia, and G. Reed, “Silicon photonics,” IEEE Microw. Mag. 7(3), 58–68 (2006).
[CrossRef]

1996 (1)

L. S. Yu, Q. Z. Liu, Z. F. Guan, and S. S. Lau, “Direct measurement of the refractive index change of silicon with optically injected carriers,” Appl. Phys. Lett. 68(11), 1546 (1996).
[CrossRef]

1987 (1)

R. A. Soref and B. R. Bennett, “Electrooptical effects in silicon,” IEEE J. Quantum Electron. 23(1), 123–129 (1987).
[CrossRef]

Ahn, J.

J. Ahn, M. Fiorentino, R. G. Beausoleil, N. Binkert, A. Davis, D. Fattal, N. P. Jouppi, M. McLaren, C. M. Santori, R. S. Schreiber, S. M. Spillane, D. Vantrease, and Q. Xu, “Devices and architectures for photonic chip-scale integration,” Appl. Phys., A Mater. Sci. Process. 95(4), 989–997 (2009).
[CrossRef]

Asanovic, K.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building Many-Core Processor-to-DRAM Networks with Monolithic CMOS Silicon Photonics,” IEEE Micro 29(4), 8–21 (2009).
[CrossRef]

Asghari, M.

Assefa, S.

Batten, C.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building Many-Core Processor-to-DRAM Networks with Monolithic CMOS Silicon Photonics,” IEEE Micro 29(4), 8–21 (2009).
[CrossRef]

Beausoleil, R. G.

J. Ahn, M. Fiorentino, R. G. Beausoleil, N. Binkert, A. Davis, D. Fattal, N. P. Jouppi, M. McLaren, C. M. Santori, R. S. Schreiber, S. M. Spillane, D. Vantrease, and Q. Xu, “Devices and architectures for photonic chip-scale integration,” Appl. Phys., A Mater. Sci. Process. 95(4), 989–997 (2009).
[CrossRef]

Bennett, B. R.

R. A. Soref and B. R. Bennett, “Electrooptical effects in silicon,” IEEE J. Quantum Electron. 23(1), 123–129 (1987).
[CrossRef]

Bergman, K.

A. Shacham, K. Bergman, and L. P. Carloni, “Photonic networks-on-chip for future generations of chip multiprocessors,” IEEE Trans. Comput. 57(9), 1246–1260 (2008).
[CrossRef]

B. G. Lee, A. Biberman, P. Dong, M. Lipson, and K. Bergman, “All-optical comb switch for multiwavelength message routing in silicon photonic networks,” IEEE Photon. Technol. Lett. 20(10), 767–769 (2008).
[CrossRef]

Biberman, A.

B. G. Lee, A. Biberman, P. Dong, M. Lipson, and K. Bergman, “All-optical comb switch for multiwavelength message routing in silicon photonic networks,” IEEE Photon. Technol. Lett. 20(10), 767–769 (2008).
[CrossRef]

Binkert, N.

J. Ahn, M. Fiorentino, R. G. Beausoleil, N. Binkert, A. Davis, D. Fattal, N. P. Jouppi, M. McLaren, C. M. Santori, R. S. Schreiber, S. M. Spillane, D. Vantrease, and Q. Xu, “Devices and architectures for photonic chip-scale integration,” Appl. Phys., A Mater. Sci. Process. 95(4), 989–997 (2009).
[CrossRef]

Carloni, L. P.

A. Shacham, K. Bergman, and L. P. Carloni, “Photonic networks-on-chip for future generations of chip multiprocessors,” IEEE Trans. Comput. 57(9), 1246–1260 (2008).
[CrossRef]

Cunningham, J. E.

A. V. Krishnamoorthy, R. Ho, X. Zheng, H. Schwetman, J. Lexau, P. Koka, G. Li, I. Shubin, and J. E. Cunningham, “Computer systems based on silicon photonic interconnects,” Proc. IEEE 97, 1337–1361 (2009).
[CrossRef]

Davis, A.

J. Ahn, M. Fiorentino, R. G. Beausoleil, N. Binkert, A. Davis, D. Fattal, N. P. Jouppi, M. McLaren, C. M. Santori, R. S. Schreiber, S. M. Spillane, D. Vantrease, and Q. Xu, “Devices and architectures for photonic chip-scale integration,” Appl. Phys., A Mater. Sci. Process. 95(4), 989–997 (2009).
[CrossRef]

Dong, P.

Fattal, D.

J. Ahn, M. Fiorentino, R. G. Beausoleil, N. Binkert, A. Davis, D. Fattal, N. P. Jouppi, M. McLaren, C. M. Santori, R. S. Schreiber, S. M. Spillane, D. Vantrease, and Q. Xu, “Devices and architectures for photonic chip-scale integration,” Appl. Phys., A Mater. Sci. Process. 95(4), 989–997 (2009).
[CrossRef]

Feng, D.

Fiorentino, M.

J. Ahn, M. Fiorentino, R. G. Beausoleil, N. Binkert, A. Davis, D. Fattal, N. P. Jouppi, M. McLaren, C. M. Santori, R. S. Schreiber, S. M. Spillane, D. Vantrease, and Q. Xu, “Devices and architectures for photonic chip-scale integration,” Appl. Phys., A Mater. Sci. Process. 95(4), 989–997 (2009).
[CrossRef]

Green, W. M.

Green, W. M. J.

Y. Vlasov, W. M. J. Green, and F. Xia, “High-throughput silicon nanophotonic wavelength-insensitive switch for on-chip optical networks,” Nat. Photonics 2(4), 242–246 (2008).
[CrossRef]

Guan, Z. F.

L. S. Yu, Q. Z. Liu, Z. F. Guan, and S. S. Lau, “Direct measurement of the refractive index change of silicon with optically injected carriers,” Appl. Phys. Lett. 68(11), 1546 (1996).
[CrossRef]

Hasama, T.

Ho, R.

A. V. Krishnamoorthy, R. Ho, X. Zheng, H. Schwetman, J. Lexau, P. Koka, G. Li, I. Shubin, and J. E. Cunningham, “Computer systems based on silicon photonic interconnects,” Proc. IEEE 97, 1337–1361 (2009).
[CrossRef]

Holzwarth, C. W.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building Many-Core Processor-to-DRAM Networks with Monolithic CMOS Silicon Photonics,” IEEE Micro 29(4), 8–21 (2009).
[CrossRef]

Hoyt, J. L.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building Many-Core Processor-to-DRAM Networks with Monolithic CMOS Silicon Photonics,” IEEE Micro 29(4), 8–21 (2009).
[CrossRef]

Ishikawa, H.

Jalali, B.

B. Jalali, M. Paniccia, and G. Reed, “Silicon photonics,” IEEE Microw. Mag. 7(3), 58–68 (2006).
[CrossRef]

Joshi, A.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building Many-Core Processor-to-DRAM Networks with Monolithic CMOS Silicon Photonics,” IEEE Micro 29(4), 8–21 (2009).
[CrossRef]

Jouppi, N. P.

J. Ahn, M. Fiorentino, R. G. Beausoleil, N. Binkert, A. Davis, D. Fattal, N. P. Jouppi, M. McLaren, C. M. Santori, R. S. Schreiber, S. M. Spillane, D. Vantrease, and Q. Xu, “Devices and architectures for photonic chip-scale integration,” Appl. Phys., A Mater. Sci. Process. 95(4), 989–997 (2009).
[CrossRef]

Kartner, F. X.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building Many-Core Processor-to-DRAM Networks with Monolithic CMOS Silicon Photonics,” IEEE Micro 29(4), 8–21 (2009).
[CrossRef]

Kawashima, H.

Khilo, A.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building Many-Core Processor-to-DRAM Networks with Monolithic CMOS Silicon Photonics,” IEEE Micro 29(4), 8–21 (2009).
[CrossRef]

Kimerling, L. C.

L. C. Kimerling and ., “Electronic–photonic integrated circuits on the CMOS platform,” Proc. SPIE 6125, 6–15 (2006).

Kintaka, K.

Koka, P.

A. V. Krishnamoorthy, R. Ho, X. Zheng, H. Schwetman, J. Lexau, P. Koka, G. Li, I. Shubin, and J. E. Cunningham, “Computer systems based on silicon photonic interconnects,” Proc. IEEE 97, 1337–1361 (2009).
[CrossRef]

Krishnamoorthy, A. V.

A. V. Krishnamoorthy, R. Ho, X. Zheng, H. Schwetman, J. Lexau, P. Koka, G. Li, I. Shubin, and J. E. Cunningham, “Computer systems based on silicon photonic interconnects,” Proc. IEEE 97, 1337–1361 (2009).
[CrossRef]

P. Dong, S. Liao, D. Feng, H. Liang, D. Zheng, R. Shafiiha, C.-C. Kung, W. Qian, G. Li, X. Zheng, A. V. Krishnamoorthy, and M. Asghari, “Low Vpp, ultralow-energy, compact, high-speed silicon electro-optic modulator,” Opt. Express 17(25), 22484–22490 (2009).
[CrossRef]

Kung, C.-C.

Lau, S. S.

L. S. Yu, Q. Z. Liu, Z. F. Guan, and S. S. Lau, “Direct measurement of the refractive index change of silicon with optically injected carriers,” Appl. Phys. Lett. 68(11), 1546 (1996).
[CrossRef]

Lee, B. G.

B. G. Lee, A. Biberman, P. Dong, M. Lipson, and K. Bergman, “All-optical comb switch for multiwavelength message routing in silicon photonic networks,” IEEE Photon. Technol. Lett. 20(10), 767–769 (2008).
[CrossRef]

Lexau, J.

A. V. Krishnamoorthy, R. Ho, X. Zheng, H. Schwetman, J. Lexau, P. Koka, G. Li, I. Shubin, and J. E. Cunningham, “Computer systems based on silicon photonic interconnects,” Proc. IEEE 97, 1337–1361 (2009).
[CrossRef]

Li, G.

A. V. Krishnamoorthy, R. Ho, X. Zheng, H. Schwetman, J. Lexau, P. Koka, G. Li, I. Shubin, and J. E. Cunningham, “Computer systems based on silicon photonic interconnects,” Proc. IEEE 97, 1337–1361 (2009).
[CrossRef]

P. Dong, S. Liao, D. Feng, H. Liang, D. Zheng, R. Shafiiha, C.-C. Kung, W. Qian, G. Li, X. Zheng, A. V. Krishnamoorthy, and M. Asghari, “Low Vpp, ultralow-energy, compact, high-speed silicon electro-optic modulator,” Opt. Express 17(25), 22484–22490 (2009).
[CrossRef]

Li, H.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building Many-Core Processor-to-DRAM Networks with Monolithic CMOS Silicon Photonics,” IEEE Micro 29(4), 8–21 (2009).
[CrossRef]

Liang, H.

Liao, S.

Lipson, M.

B. G. Lee, A. Biberman, P. Dong, M. Lipson, and K. Bergman, “All-optical comb switch for multiwavelength message routing in silicon photonic networks,” IEEE Photon. Technol. Lett. 20(10), 767–769 (2008).
[CrossRef]

P. Dong, S. F. Preble, and M. Lipson, “All-optical compact silicon comb switch,” Opt. Express 15(15), 9600–9605 (2007).
[CrossRef] [PubMed]

Liu, Q. Z.

L. S. Yu, Q. Z. Liu, Z. F. Guan, and S. S. Lau, “Direct measurement of the refractive index change of silicon with optically injected carriers,” Appl. Phys. Lett. 68(11), 1546 (1996).
[CrossRef]

McLaren, M.

J. Ahn, M. Fiorentino, R. G. Beausoleil, N. Binkert, A. Davis, D. Fattal, N. P. Jouppi, M. McLaren, C. M. Santori, R. S. Schreiber, S. M. Spillane, D. Vantrease, and Q. Xu, “Devices and architectures for photonic chip-scale integration,” Appl. Phys., A Mater. Sci. Process. 95(4), 989–997 (2009).
[CrossRef]

Miller, D. A. B.

D. A. B. Miller, “Device requirements for optical interconnects to silicon chips,” Proc. IEEE 97, 1166–1185 (2009).
[CrossRef]

Moss, B.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building Many-Core Processor-to-DRAM Networks with Monolithic CMOS Silicon Photonics,” IEEE Micro 29(4), 8–21 (2009).
[CrossRef]

Orcutt, J.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building Many-Core Processor-to-DRAM Networks with Monolithic CMOS Silicon Photonics,” IEEE Micro 29(4), 8–21 (2009).
[CrossRef]

Paniccia, M.

B. Jalali, M. Paniccia, and G. Reed, “Silicon photonics,” IEEE Microw. Mag. 7(3), 58–68 (2006).
[CrossRef]

Popovic, M. A.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building Many-Core Processor-to-DRAM Networks with Monolithic CMOS Silicon Photonics,” IEEE Micro 29(4), 8–21 (2009).
[CrossRef]

Preble, S. F.

Qian, W.

Ram, R. J.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building Many-Core Processor-to-DRAM Networks with Monolithic CMOS Silicon Photonics,” IEEE Micro 29(4), 8–21 (2009).
[CrossRef]

Reano, R. M.

Reed, G.

B. Jalali, M. Paniccia, and G. Reed, “Silicon photonics,” IEEE Microw. Mag. 7(3), 58–68 (2006).
[CrossRef]

Santori, C. M.

J. Ahn, M. Fiorentino, R. G. Beausoleil, N. Binkert, A. Davis, D. Fattal, N. P. Jouppi, M. McLaren, C. M. Santori, R. S. Schreiber, S. M. Spillane, D. Vantrease, and Q. Xu, “Devices and architectures for photonic chip-scale integration,” Appl. Phys., A Mater. Sci. Process. 95(4), 989–997 (2009).
[CrossRef]

Schreiber, R. S.

J. Ahn, M. Fiorentino, R. G. Beausoleil, N. Binkert, A. Davis, D. Fattal, N. P. Jouppi, M. McLaren, C. M. Santori, R. S. Schreiber, S. M. Spillane, D. Vantrease, and Q. Xu, “Devices and architectures for photonic chip-scale integration,” Appl. Phys., A Mater. Sci. Process. 95(4), 989–997 (2009).
[CrossRef]

Schwetman, H.

A. V. Krishnamoorthy, R. Ho, X. Zheng, H. Schwetman, J. Lexau, P. Koka, G. Li, I. Shubin, and J. E. Cunningham, “Computer systems based on silicon photonic interconnects,” Proc. IEEE 97, 1337–1361 (2009).
[CrossRef]

Shacham, A.

A. Shacham, K. Bergman, and L. P. Carloni, “Photonic networks-on-chip for future generations of chip multiprocessors,” IEEE Trans. Comput. 57(9), 1246–1260 (2008).
[CrossRef]

Shafiiha, R.

Shoji, Y.

Shubin, I.

A. V. Krishnamoorthy, R. Ho, X. Zheng, H. Schwetman, J. Lexau, P. Koka, G. Li, I. Shubin, and J. E. Cunningham, “Computer systems based on silicon photonic interconnects,” Proc. IEEE 97, 1337–1361 (2009).
[CrossRef]

Smith, H. I.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building Many-Core Processor-to-DRAM Networks with Monolithic CMOS Silicon Photonics,” IEEE Micro 29(4), 8–21 (2009).
[CrossRef]

Soref, R. A.

R. A. Soref, “The past, present and future of silicon photonics,” IEEE J. Sel. Top. Quant. Electron. 12(6), 1678–1687 (2006).
[CrossRef]

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[CrossRef]

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J. Ahn, M. Fiorentino, R. G. Beausoleil, N. Binkert, A. Davis, D. Fattal, N. P. Jouppi, M. McLaren, C. M. Santori, R. S. Schreiber, S. M. Spillane, D. Vantrease, and Q. Xu, “Devices and architectures for photonic chip-scale integration,” Appl. Phys., A Mater. Sci. Process. 95(4), 989–997 (2009).
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Appl. Phys., A Mater. Sci. Process. (1)

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[CrossRef]

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[CrossRef]

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[CrossRef]

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C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building Many-Core Processor-to-DRAM Networks with Monolithic CMOS Silicon Photonics,” IEEE Micro 29(4), 8–21 (2009).
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Figures (6)

Fig. 1
Fig. 1

(a) A typical 2x2 switch based on symmetric MZIs with two straight arms. (b) Cross section of the waveguide used for phase shifters. (c) and (d) A 2x2 switch with spiral shape arms. The arm length is 4 mm in this device and the minimal bending radius is 5 µm.

Fig. 2
Fig. 2

(a) Transmission power as a function of the applied voltage (a) and power (b).

Fig. 3
Fig. 3

Steady-state transmission spectra of the 2x2 switch.

Fig. 4
Fig. 4

Electrical drive signal (a) and optical switching response (b-d).

Fig. 5
Fig. 5

Average π-phase switching power and current for different MZI arm lengths.

Fig. 6
Fig. 6

Silicon index change as a function of free carrier concentration. Inset, index change ratio between our experiments and calculated by Eq. (1).

Equations (4)

Equations on this page are rendered with MathJax. Learn more.

Δ n = 8.8 × 10 22 ( Δ N e ) 8.5 × 10 18 ( Δ N h ) 0.8
Δ N e = Δ N h = I π τ e S L ,
Δ n S i = λ Δ ϕ / ( 2 π L n e f f n S i ) ,
Δ ϕ = ( 1 + P π P T ) π ,

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