Abstract

Feasibility of cascading and reconfiguring a pair of linear-nonlinear all-optical logic gate structures is experimentally demonstrated using RF photonics. Progress in highly integrated O/E/O repeaters over Si/InP hybrid platforms enables large-scale reconfigurable gate arrays.

© 2010 OSA

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References

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  1. D. A. B. Miller, “Are optical transistors the logical next step?” Nat. Photonics 4(1), 3–5 (2010).
    [CrossRef]
  2. M. Nazarathy, Z. Zalevsky, A. Rudnitsky, B. Larom, A. Nevet, M. Orenstein, and B. Fischer, “All-Optical Linear Reconfigurable Logic with Non-linear Phase Erasure,” in Special Issue Opt. Comp, J. Opt. Soc. Am. A 26, A21–A39 (2009).
    [CrossRef]
  3. Z. Li, Y. Liu, S. Zhang, H. Ju, H. de Waardt, G. D. Khoe, and D. Lenstra, “All-optical logic gates based on an SOA and an optical filter,” in 31st European Conference on Optical Communication 2005 (ECOC’05), Vol. 2, 229–230 (2005).
  4. D. M. Lai, C. H. Kwok, and K. K. Wong, “All-optical picoseconds logic gates based on a fiber optical parametric amplifier,” Opt. Express 16(22), 18362–18370 (2008).
    [CrossRef] [PubMed]
  5. K. Sun, J. Qiu, M. Rochette, and L. R. Chen, “All-optical logic gates (XOR, AND and OR) based on cross phase modulation in a highly nonlinear fiber,” in 35st European Conference on Optical Communication 2009 (ECOC’09), paper 3.3.7.
  6. M. Ziari, B. Little, M. Kato, P. Evans, S. Chu, W. Chen, J. Hryniewicz, F. Johnson, W. Chen, D. Gill, O. King, M. Fisher, V. Dominic, A. Nilsson, J. Rahn, S. Corzine, A. Dentai, M. Missey, D. Lambert, R. Muthiah, R. Salvatore, S. Murthy, J. Pleumeekers, R. Schneider, R. Nagarajan, C. Joyner, F. Kish, and D. Welch, “Large scale integration of photonic integrated circuits on InP and high-index-contrast Si platforms,” in 35st European Conference on Optical Communication 2009 (ECOC’09), paper 1.7.2.
  7. J. E. Bowers, H. W. Chen, D. Liang, D. C. Oakley, A. Napoleone, D. C. Chapman, D. L. Chen, and P. W. Juodawlkis, “Integration using the hybrid Silicon platform,” in 35st European Conference on Optical Communication 2009 (ECOC’09), paper 1.7.1.
  8. D. Van Thourhout, and G. Roelkens, “Heterogeneously integrated SOI compound semiconductor photonics,” in 35st European Conference on Optical Communication 2009 (ECOC’09), paper 4.2.1.
  9. M. K. Smit, R. Baets, and M. Wale, “InP-based photonic integration: learning from CMOS,” in 35st European Conference on Optical Communication 2009 (ECOC’09), paper 1.7.3.
  10. M. J. Wale, “Photonic integration challenges for next-generation networks,” in 35st European Conference on Optical Communication 2009 (ECOC’09), paper 1.7.4.
  11. I. M. Soganci, T. Tanemura, K. A. Williams, N. Calabretta, T. de Vries, E. Smalbrugge, M. K. Smit, H. J. S. Dorren, and Y. Nakano, “High-speed 1x16 optical switch monolithically integrated on InP,” in 35st European Conference on Optical Communication 2009 (ECOC’09), paper 1.2.1.
  12. D. Englund, A. Faraon, A. Majumdar, N. Stoltz, P. Petroff, and J. Vuckovic, “An optical modulator based on a single strongly coupled quantum dot - cavity system in a p-i-n junction,” Opt. Express 17(21), 18651–18658 (2009).
    [CrossRef]
  13. Y.-C. Chang and L. A. Coldren, “Optimization of VCSEL structure for high-speed operation,” in Proc. IEEE 21st ISLC, Sorrento, Italy, 159–160 (2008).
  14. D. Englund, H. Altug, B. Ellis, and J. Vuckovic, “Ultrafast photonic crystal lasers,” Laser Photon. Rev. 2(4), 264–274 (2008).
    [CrossRef]
  15. D. A. B. Miller, “Device Requirements for Optical Interconnects to Silicon Chips,” Proc. IEEE 97, 1166–1185 (2009).
    [CrossRef]
  16. T. Yoshimatsu, S. Kodama, K. Yoshino, and H. Ito, “100-gb/s error-free wavelength conversion with a monolithic optical gate integrating a photodiode and electroabsorption modulator,” Photon. Tech. Lett. 17(11), 2367–2369 (2005).
    [CrossRef]

2010 (1)

D. A. B. Miller, “Are optical transistors the logical next step?” Nat. Photonics 4(1), 3–5 (2010).
[CrossRef]

2009 (3)

2008 (2)

2005 (1)

T. Yoshimatsu, S. Kodama, K. Yoshino, and H. Ito, “100-gb/s error-free wavelength conversion with a monolithic optical gate integrating a photodiode and electroabsorption modulator,” Photon. Tech. Lett. 17(11), 2367–2369 (2005).
[CrossRef]

Altug, H.

D. Englund, H. Altug, B. Ellis, and J. Vuckovic, “Ultrafast photonic crystal lasers,” Laser Photon. Rev. 2(4), 264–274 (2008).
[CrossRef]

Ellis, B.

D. Englund, H. Altug, B. Ellis, and J. Vuckovic, “Ultrafast photonic crystal lasers,” Laser Photon. Rev. 2(4), 264–274 (2008).
[CrossRef]

Englund, D.

Faraon, A.

Fischer, B.

Ito, H.

T. Yoshimatsu, S. Kodama, K. Yoshino, and H. Ito, “100-gb/s error-free wavelength conversion with a monolithic optical gate integrating a photodiode and electroabsorption modulator,” Photon. Tech. Lett. 17(11), 2367–2369 (2005).
[CrossRef]

Kodama, S.

T. Yoshimatsu, S. Kodama, K. Yoshino, and H. Ito, “100-gb/s error-free wavelength conversion with a monolithic optical gate integrating a photodiode and electroabsorption modulator,” Photon. Tech. Lett. 17(11), 2367–2369 (2005).
[CrossRef]

Kwok, C. H.

Lai, D. M.

Larom, B.

Majumdar, A.

Miller, D. A. B.

D. A. B. Miller, “Are optical transistors the logical next step?” Nat. Photonics 4(1), 3–5 (2010).
[CrossRef]

D. A. B. Miller, “Device Requirements for Optical Interconnects to Silicon Chips,” Proc. IEEE 97, 1166–1185 (2009).
[CrossRef]

Nazarathy, M.

Nevet, A.

Orenstein, M.

Petroff, P.

Rudnitsky, A.

Stoltz, N.

Vuckovic, J.

Wong, K. K.

Yoshimatsu, T.

T. Yoshimatsu, S. Kodama, K. Yoshino, and H. Ito, “100-gb/s error-free wavelength conversion with a monolithic optical gate integrating a photodiode and electroabsorption modulator,” Photon. Tech. Lett. 17(11), 2367–2369 (2005).
[CrossRef]

Yoshino, K.

T. Yoshimatsu, S. Kodama, K. Yoshino, and H. Ito, “100-gb/s error-free wavelength conversion with a monolithic optical gate integrating a photodiode and electroabsorption modulator,” Photon. Tech. Lett. 17(11), 2367–2369 (2005).
[CrossRef]

Zalevsky, Z.

J. Opt. Soc. Am. A (1)

Laser Photon. Rev. (1)

D. Englund, H. Altug, B. Ellis, and J. Vuckovic, “Ultrafast photonic crystal lasers,” Laser Photon. Rev. 2(4), 264–274 (2008).
[CrossRef]

Nat. Photonics (1)

D. A. B. Miller, “Are optical transistors the logical next step?” Nat. Photonics 4(1), 3–5 (2010).
[CrossRef]

Opt. Express (2)

Photon. Tech. Lett. (1)

T. Yoshimatsu, S. Kodama, K. Yoshino, and H. Ito, “100-gb/s error-free wavelength conversion with a monolithic optical gate integrating a photodiode and electroabsorption modulator,” Photon. Tech. Lett. 17(11), 2367–2369 (2005).
[CrossRef]

Proc. IEEE (1)

D. A. B. Miller, “Device Requirements for Optical Interconnects to Silicon Chips,” Proc. IEEE 97, 1166–1185 (2009).
[CrossRef]

Other (9)

Z. Li, Y. Liu, S. Zhang, H. Ju, H. de Waardt, G. D. Khoe, and D. Lenstra, “All-optical logic gates based on an SOA and an optical filter,” in 31st European Conference on Optical Communication 2005 (ECOC’05), Vol. 2, 229–230 (2005).

Y.-C. Chang and L. A. Coldren, “Optimization of VCSEL structure for high-speed operation,” in Proc. IEEE 21st ISLC, Sorrento, Italy, 159–160 (2008).

K. Sun, J. Qiu, M. Rochette, and L. R. Chen, “All-optical logic gates (XOR, AND and OR) based on cross phase modulation in a highly nonlinear fiber,” in 35st European Conference on Optical Communication 2009 (ECOC’09), paper 3.3.7.

M. Ziari, B. Little, M. Kato, P. Evans, S. Chu, W. Chen, J. Hryniewicz, F. Johnson, W. Chen, D. Gill, O. King, M. Fisher, V. Dominic, A. Nilsson, J. Rahn, S. Corzine, A. Dentai, M. Missey, D. Lambert, R. Muthiah, R. Salvatore, S. Murthy, J. Pleumeekers, R. Schneider, R. Nagarajan, C. Joyner, F. Kish, and D. Welch, “Large scale integration of photonic integrated circuits on InP and high-index-contrast Si platforms,” in 35st European Conference on Optical Communication 2009 (ECOC’09), paper 1.7.2.

J. E. Bowers, H. W. Chen, D. Liang, D. C. Oakley, A. Napoleone, D. C. Chapman, D. L. Chen, and P. W. Juodawlkis, “Integration using the hybrid Silicon platform,” in 35st European Conference on Optical Communication 2009 (ECOC’09), paper 1.7.1.

D. Van Thourhout, and G. Roelkens, “Heterogeneously integrated SOI compound semiconductor photonics,” in 35st European Conference on Optical Communication 2009 (ECOC’09), paper 4.2.1.

M. K. Smit, R. Baets, and M. Wale, “InP-based photonic integration: learning from CMOS,” in 35st European Conference on Optical Communication 2009 (ECOC’09), paper 1.7.3.

M. J. Wale, “Photonic integration challenges for next-generation networks,” in 35st European Conference on Optical Communication 2009 (ECOC’09), paper 1.7.4.

I. M. Soganci, T. Tanemura, K. A. Williams, N. Calabretta, T. de Vries, E. Smalbrugge, M. K. Smit, H. J. S. Dorren, and Y. Nakano, “High-speed 1x16 optical switch monolithically integrated on InP,” in 35st European Conference on Optical Communication 2009 (ECOC’09), paper 1.2.1.

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Figures (5)

Fig. 1
Fig. 1

(a). OptSimTM simulation of optically coherent operation of a single NOR gate [1]. (b). Reconfigurable two-gate logic circuit realizing nine possible truth tables, as set by R 1,R 2, and its implementation using linear-nonlinear reconfigurable gate structures.

Fig. 2
Fig. 2

(a). Low-speed experimental demonstration of reconfigurable two-gate circuit using RF photonics. MZM denote Mach-Zehnder Modulators operated in a quasi-linear region around quadrature; Variable Optical Attenuators (VOA) are used to adjust the optical powers of the logic signals and the references to the correct mutual ratios. Suitable fiber delays are used to synchronize the RF carrier and logic waveform phases of the various signals. The RF subcarrier modulation frequency is 232kHz; the NRZ logic signals are clocked at 1.5 KHz. (b). Picture of the constructed experimental configuration including the setup itself in the center and the required characterization equipment such as EDFA, digital scopes and fibers at the lower right and upper left corner of the picture.

Fig. 3
Fig. 3

Test inputs to the logic circuit: (a). Successively delayed inputs. (b). Power addition in first gate. (c). Power addition in second gate.

Fig. 4
Fig. 4

Signal waveforms in the experiment of Fig. 3: I1 (green), U1 (blue), V1 (yellow) and U2 (purple) for all possible gate combinations (by manually changing the VOA settings), each for 6 of the 8 possible input triplets. (a) AND-AND, (b) AND-NOR, (c) AND-XNOR, (d) NOR-AND, (e) NOR-NOR, (f) NOR-XNOR, (g) XNOR-AND, (h) XNOR-NOR, (i) XNOR-XNOR. Comparing the measured Boolean signals with those predicted in Table 2, it is apparent that the two-gate opto-electronic logic circuit indeed functions as designed.

Fig. 5
Fig. 5

O/E/O reconfigurable gate – the recurring element in large-scale reconfigurable photonic logic arrays leveraging the PIC platform [5].

Tables (2)

Tables Icon

Table 1 The AO gate functions as either AND, NOR or XNOR, as selected by the value of R. Reversing the logic polarity yields the complementary logic functions NAND, OR, XOR.

Tables Icon

Table 2 Truth table for cascaded gates G1 and G2 and logic inputs {I1,I2,I3} (red = untested).

Equations (2)

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M I D ( u ) = { V L , ​ ​ ​ ​ ​ u u t h V H , ​ ​ ​ ​ ​ ​ u > u t h , M N O T ( u ) = { V L , ​ ​ ​ ​ ​ ​ u u t h V H , ​ ​ ​ ​ ​ ​ u < u t h ,
M ( | U H L | ) = M ( | U L L | ) = M ( | U L H | ) = V L

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