Abstract

Multimode interference (MMI) waveguide switches show promise for switch in optical packet switching (OPS). In this work, we fabricated 1 × 4 InGaAsP/InP MMI waveguide switch device which consists of a 1 × 4 MMI splitter, 4 equally spaced single-mode waveguides with phase shifters, and a 4 × 4 MMI combiner. Good crosstalk and extinction ratio of −14.47 dB and 23.39 dB, respectively, are obtained. In addition, we experimentally demonstrate dynamic switching, and the rise and fall time of 1.4 ns and 1.2 ns, respectively, are obtained.

© 2009 OSA

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    [Crossref] [PubMed]
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    [Crossref]
  3. A. Shinya, S. Matsuo, T. Yosia, T. Tanabe, E. Kuramochi, T. Sato, T. Kakitsuka, and M. Notomi, “All-optical on-chip bit memory based on ultra high Q InGaAsP photonic crystal,” Opt. Exp. 16(23), 19382–19387 (2008).
    [Crossref]
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    [Crossref]
  5. S. Tanaka, S.-H. Jeong, S. Yamazaki, S. Tomabechi, A. Uetake, M. Ekawa, and K. Morito, “Polarization-insensitive monolithically-integrated 8:1 SOA gate switch with large gain and high extinction ratio,” OFC 2008, OWE2 (2008).
  6. T. Tanemura, M. Takenaka, A. Abdullah, K. Takeda, T. Shioda, M. Sugiyama, and Y. Nakano, “Design and fabrication of integrated 1×5 optical phased array switch on InP,” LEOS 2007, 780–781 (2007).
  7. K. Shimomura and Y. Kawakita, “Wavelength selective switch using arrayed waveguides with linearly varying refractive index distribution,” IPAP Books 2, 341–354 (2005).
  8. T. Tanemura, K. Takeda, and Y. Nakano, “320-Gbps wavelength-multiplexed 1x5 optical packet switching using broadband InP phased-array switch,” OFC 2009, OMU3 (2009).
  9. S. Niwa, S. Matsuo, T. Kakitsuka, and K.-i. Kitayama, “Experimental demonstration of 1×4 InP/InGaAsP optical integrated multimode interference waveguide switch,” IPRM 2008, ThA1.7 (2008).
  10. Z. Jin and G. Peng, “Designing optical switches based on silica multimode interference devices,” PIER 2005, 58–61 (2005).
  11. R. M. Jenkins, J. M. Heaton, D. R. Wight, J. T. Parker, J. C. H. Birbeck, G. W. Smith, and K. P. Hilton, “Novel 1×N and N×N integrated optical switches using self-imaging multimode GaAs/AlGaAs waveguides,” Appl. Phys. Lett. 64(6), 684–686 (1994).
    [Crossref]
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    [Crossref] [PubMed]

2009 (1)

T. Tanemura, K. Takeda, and Y. Nakano, “320-Gbps wavelength-multiplexed 1x5 optical packet switching using broadband InP phased-array switch,” OFC 2009, OMU3 (2009).

2008 (2)

A. Shinya, S. Matsuo, T. Yosia, T. Tanabe, E. Kuramochi, T. Sato, T. Kakitsuka, and M. Notomi, “All-optical on-chip bit memory based on ultra high Q InGaAsP photonic crystal,” Opt. Exp. 16(23), 19382–19387 (2008).
[Crossref]

S. Tanaka, S.-H. Jeong, S. Yamazaki, S. Tomabechi, A. Uetake, M. Ekawa, and K. Morito, “Polarization-insensitive monolithically-integrated 8:1 SOA gate switch with large gain and high extinction ratio,” OFC 2008, OWE2 (2008).

2007 (1)

T. Tanemura, M. Takenaka, A. Abdullah, K. Takeda, T. Shioda, M. Sugiyama, and Y. Nakano, “Design and fabrication of integrated 1×5 optical phased array switch on InP,” LEOS 2007, 780–781 (2007).

2005 (2)

K. Shimomura and Y. Kawakita, “Wavelength selective switch using arrayed waveguides with linearly varying refractive index distribution,” IPAP Books 2, 341–354 (2005).

Z. Jin and G. Peng, “Designing optical switches based on silica multimode interference devices,” PIER 2005, 58–61 (2005).

2004 (1)

1995 (1)

1994 (1)

R. M. Jenkins, J. M. Heaton, D. R. Wight, J. T. Parker, J. C. H. Birbeck, G. W. Smith, and K. P. Hilton, “Novel 1×N and N×N integrated optical switches using self-imaging multimode GaAs/AlGaAs waveguides,” Appl. Phys. Lett. 64(6), 684–686 (1994).
[Crossref]

1990 (1)

1975 (1)

R. Ulrich and G. Ankele, “Self-imaging in homogeneous planar optical waveguides,” Appl. Phys. Lett. 27(6), 337–339 (1975).
[Crossref]

Abdullah, A.

T. Tanemura, M. Takenaka, A. Abdullah, K. Takeda, T. Shioda, M. Sugiyama, and Y. Nakano, “Design and fabrication of integrated 1×5 optical phased array switch on InP,” LEOS 2007, 780–781 (2007).

Ankele, G.

R. Ulrich and G. Ankele, “Self-imaging in homogeneous planar optical waveguides,” Appl. Phys. Lett. 27(6), 337–339 (1975).
[Crossref]

Bachmann, M.

Besse, P. A.

Birbeck, J. C. H.

R. M. Jenkins, J. M. Heaton, D. R. Wight, J. T. Parker, J. C. H. Birbeck, G. W. Smith, and K. P. Hilton, “Novel 1×N and N×N integrated optical switches using self-imaging multimode GaAs/AlGaAs waveguides,” Appl. Phys. Lett. 64(6), 684–686 (1994).
[Crossref]

Ekawa, M.

S. Tanaka, S.-H. Jeong, S. Yamazaki, S. Tomabechi, A. Uetake, M. Ekawa, and K. Morito, “Polarization-insensitive monolithically-integrated 8:1 SOA gate switch with large gain and high extinction ratio,” OFC 2008, OWE2 (2008).

Heaton, J. M.

R. M. Jenkins, J. M. Heaton, D. R. Wight, J. T. Parker, J. C. H. Birbeck, G. W. Smith, and K. P. Hilton, “Novel 1×N and N×N integrated optical switches using self-imaging multimode GaAs/AlGaAs waveguides,” Appl. Phys. Lett. 64(6), 684–686 (1994).
[Crossref]

Heuring, V. P.

Hilton, K. P.

R. M. Jenkins, J. M. Heaton, D. R. Wight, J. T. Parker, J. C. H. Birbeck, G. W. Smith, and K. P. Hilton, “Novel 1×N and N×N integrated optical switches using self-imaging multimode GaAs/AlGaAs waveguides,” Appl. Phys. Lett. 64(6), 684–686 (1994).
[Crossref]

Jenkins, R. M.

R. M. Jenkins, J. M. Heaton, D. R. Wight, J. T. Parker, J. C. H. Birbeck, G. W. Smith, and K. P. Hilton, “Novel 1×N and N×N integrated optical switches using self-imaging multimode GaAs/AlGaAs waveguides,” Appl. Phys. Lett. 64(6), 684–686 (1994).
[Crossref]

Jeong, S.-H.

S. Tanaka, S.-H. Jeong, S. Yamazaki, S. Tomabechi, A. Uetake, M. Ekawa, and K. Morito, “Polarization-insensitive monolithically-integrated 8:1 SOA gate switch with large gain and high extinction ratio,” OFC 2008, OWE2 (2008).

Jin, Z.

Z. Jin and G. Peng, “Designing optical switches based on silica multimode interference devices,” PIER 2005, 58–61 (2005).

Jordan, H. F.

Kakitsuka, T.

A. Shinya, S. Matsuo, T. Yosia, T. Tanabe, E. Kuramochi, T. Sato, T. Kakitsuka, and M. Notomi, “All-optical on-chip bit memory based on ultra high Q InGaAsP photonic crystal,” Opt. Exp. 16(23), 19382–19387 (2008).
[Crossref]

Kawakita, Y.

K. Shimomura and Y. Kawakita, “Wavelength selective switch using arrayed waveguides with linearly varying refractive index distribution,” IPAP Books 2, 341–354 (2005).

Kondo, N.

Kuramochi, E.

A. Shinya, S. Matsuo, T. Yosia, T. Tanabe, E. Kuramochi, T. Sato, T. Kakitsuka, and M. Notomi, “All-optical on-chip bit memory based on ultra high Q InGaAsP photonic crystal,” Opt. Exp. 16(23), 19382–19387 (2008).
[Crossref]

Matsuo, S.

A. Shinya, S. Matsuo, T. Yosia, T. Tanabe, E. Kuramochi, T. Sato, T. Kakitsuka, and M. Notomi, “All-optical on-chip bit memory based on ultra high Q InGaAsP photonic crystal,” Opt. Exp. 16(23), 19382–19387 (2008).
[Crossref]

Melchior, H.

Morito, K.

S. Tanaka, S.-H. Jeong, S. Yamazaki, S. Tomabechi, A. Uetake, M. Ekawa, and K. Morito, “Polarization-insensitive monolithically-integrated 8:1 SOA gate switch with large gain and high extinction ratio,” OFC 2008, OWE2 (2008).

Nakahara, T.

Nakano, Y.

T. Tanemura, K. Takeda, and Y. Nakano, “320-Gbps wavelength-multiplexed 1x5 optical packet switching using broadband InP phased-array switch,” OFC 2009, OMU3 (2009).

T. Tanemura, M. Takenaka, A. Abdullah, K. Takeda, T. Shioda, M. Sugiyama, and Y. Nakano, “Design and fabrication of integrated 1×5 optical phased array switch on InP,” LEOS 2007, 780–781 (2007).

Notomi, M.

A. Shinya, S. Matsuo, T. Yosia, T. Tanabe, E. Kuramochi, T. Sato, T. Kakitsuka, and M. Notomi, “All-optical on-chip bit memory based on ultra high Q InGaAsP photonic crystal,” Opt. Exp. 16(23), 19382–19387 (2008).
[Crossref]

Parker, J. T.

R. M. Jenkins, J. M. Heaton, D. R. Wight, J. T. Parker, J. C. H. Birbeck, G. W. Smith, and K. P. Hilton, “Novel 1×N and N×N integrated optical switches using self-imaging multimode GaAs/AlGaAs waveguides,” Appl. Phys. Lett. 64(6), 684–686 (1994).
[Crossref]

Peng, G.

Z. Jin and G. Peng, “Designing optical switches based on silica multimode interference devices,” PIER 2005, 58–61 (2005).

Sarrazin, D. B.

Sato, T.

A. Shinya, S. Matsuo, T. Yosia, T. Tanabe, E. Kuramochi, T. Sato, T. Kakitsuka, and M. Notomi, “All-optical on-chip bit memory based on ultra high Q InGaAsP photonic crystal,” Opt. Exp. 16(23), 19382–19387 (2008).
[Crossref]

Shimomura, K.

K. Shimomura and Y. Kawakita, “Wavelength selective switch using arrayed waveguides with linearly varying refractive index distribution,” IPAP Books 2, 341–354 (2005).

Shinya, A.

A. Shinya, S. Matsuo, T. Yosia, T. Tanabe, E. Kuramochi, T. Sato, T. Kakitsuka, and M. Notomi, “All-optical on-chip bit memory based on ultra high Q InGaAsP photonic crystal,” Opt. Exp. 16(23), 19382–19387 (2008).
[Crossref]

Shioda, T.

T. Tanemura, M. Takenaka, A. Abdullah, K. Takeda, T. Shioda, M. Sugiyama, and Y. Nakano, “Design and fabrication of integrated 1×5 optical phased array switch on InP,” LEOS 2007, 780–781 (2007).

Smith, G. W.

R. M. Jenkins, J. M. Heaton, D. R. Wight, J. T. Parker, J. C. H. Birbeck, G. W. Smith, and K. P. Hilton, “Novel 1×N and N×N integrated optical switches using self-imaging multimode GaAs/AlGaAs waveguides,” Appl. Phys. Lett. 64(6), 684–686 (1994).
[Crossref]

Sugiyama, M.

T. Tanemura, M. Takenaka, A. Abdullah, K. Takeda, T. Shioda, M. Sugiyama, and Y. Nakano, “Design and fabrication of integrated 1×5 optical phased array switch on InP,” LEOS 2007, 780–781 (2007).

Suzuki, H.

Takahashi, R.

Takahata, K.

Takeda, K.

T. Tanemura, K. Takeda, and Y. Nakano, “320-Gbps wavelength-multiplexed 1x5 optical packet switching using broadband InP phased-array switch,” OFC 2009, OMU3 (2009).

T. Tanemura, M. Takenaka, A. Abdullah, K. Takeda, T. Shioda, M. Sugiyama, and Y. Nakano, “Design and fabrication of integrated 1×5 optical phased array switch on InP,” LEOS 2007, 780–781 (2007).

Takenaka, M.

T. Tanemura, M. Takenaka, A. Abdullah, K. Takeda, T. Shioda, M. Sugiyama, and Y. Nakano, “Design and fabrication of integrated 1×5 optical phased array switch on InP,” LEOS 2007, 780–781 (2007).

Takenouchi, H.

Tanabe, T.

A. Shinya, S. Matsuo, T. Yosia, T. Tanabe, E. Kuramochi, T. Sato, T. Kakitsuka, and M. Notomi, “All-optical on-chip bit memory based on ultra high Q InGaAsP photonic crystal,” Opt. Exp. 16(23), 19382–19387 (2008).
[Crossref]

Tanaka, S.

S. Tanaka, S.-H. Jeong, S. Yamazaki, S. Tomabechi, A. Uetake, M. Ekawa, and K. Morito, “Polarization-insensitive monolithically-integrated 8:1 SOA gate switch with large gain and high extinction ratio,” OFC 2008, OWE2 (2008).

Tanemura, T.

T. Tanemura, K. Takeda, and Y. Nakano, “320-Gbps wavelength-multiplexed 1x5 optical packet switching using broadband InP phased-array switch,” OFC 2009, OMU3 (2009).

T. Tanemura, M. Takenaka, A. Abdullah, K. Takeda, T. Shioda, M. Sugiyama, and Y. Nakano, “Design and fabrication of integrated 1×5 optical phased array switch on InP,” LEOS 2007, 780–781 (2007).

Tomabechi, S.

S. Tanaka, S.-H. Jeong, S. Yamazaki, S. Tomabechi, A. Uetake, M. Ekawa, and K. Morito, “Polarization-insensitive monolithically-integrated 8:1 SOA gate switch with large gain and high extinction ratio,” OFC 2008, OWE2 (2008).

Uetake, A.

S. Tanaka, S.-H. Jeong, S. Yamazaki, S. Tomabechi, A. Uetake, M. Ekawa, and K. Morito, “Polarization-insensitive monolithically-integrated 8:1 SOA gate switch with large gain and high extinction ratio,” OFC 2008, OWE2 (2008).

Ulrich, R.

R. Ulrich and G. Ankele, “Self-imaging in homogeneous planar optical waveguides,” Appl. Phys. Lett. 27(6), 337–339 (1975).
[Crossref]

Wight, D. R.

R. M. Jenkins, J. M. Heaton, D. R. Wight, J. T. Parker, J. C. H. Birbeck, G. W. Smith, and K. P. Hilton, “Novel 1×N and N×N integrated optical switches using self-imaging multimode GaAs/AlGaAs waveguides,” Appl. Phys. Lett. 64(6), 684–686 (1994).
[Crossref]

Yamazaki, S.

S. Tanaka, S.-H. Jeong, S. Yamazaki, S. Tomabechi, A. Uetake, M. Ekawa, and K. Morito, “Polarization-insensitive monolithically-integrated 8:1 SOA gate switch with large gain and high extinction ratio,” OFC 2008, OWE2 (2008).

Yasui, T.

Yosia, T.

A. Shinya, S. Matsuo, T. Yosia, T. Tanabe, E. Kuramochi, T. Sato, T. Kakitsuka, and M. Notomi, “All-optical on-chip bit memory based on ultra high Q InGaAsP photonic crystal,” Opt. Exp. 16(23), 19382–19387 (2008).
[Crossref]

Appl. Opt. (2)

Appl. Phys. Lett. (2)

R. M. Jenkins, J. M. Heaton, D. R. Wight, J. T. Parker, J. C. H. Birbeck, G. W. Smith, and K. P. Hilton, “Novel 1×N and N×N integrated optical switches using self-imaging multimode GaAs/AlGaAs waveguides,” Appl. Phys. Lett. 64(6), 684–686 (1994).
[Crossref]

R. Ulrich and G. Ankele, “Self-imaging in homogeneous planar optical waveguides,” Appl. Phys. Lett. 27(6), 337–339 (1975).
[Crossref]

IPAP Books (1)

K. Shimomura and Y. Kawakita, “Wavelength selective switch using arrayed waveguides with linearly varying refractive index distribution,” IPAP Books 2, 341–354 (2005).

J. Opt. Netw. (1)

LEOS (1)

T. Tanemura, M. Takenaka, A. Abdullah, K. Takeda, T. Shioda, M. Sugiyama, and Y. Nakano, “Design and fabrication of integrated 1×5 optical phased array switch on InP,” LEOS 2007, 780–781 (2007).

OFC (2)

T. Tanemura, K. Takeda, and Y. Nakano, “320-Gbps wavelength-multiplexed 1x5 optical packet switching using broadband InP phased-array switch,” OFC 2009, OMU3 (2009).

S. Tanaka, S.-H. Jeong, S. Yamazaki, S. Tomabechi, A. Uetake, M. Ekawa, and K. Morito, “Polarization-insensitive monolithically-integrated 8:1 SOA gate switch with large gain and high extinction ratio,” OFC 2008, OWE2 (2008).

Opt. Exp. (1)

A. Shinya, S. Matsuo, T. Yosia, T. Tanabe, E. Kuramochi, T. Sato, T. Kakitsuka, and M. Notomi, “All-optical on-chip bit memory based on ultra high Q InGaAsP photonic crystal,” Opt. Exp. 16(23), 19382–19387 (2008).
[Crossref]

PIER (1)

Z. Jin and G. Peng, “Designing optical switches based on silica multimode interference devices,” PIER 2005, 58–61 (2005).

Other (1)

S. Niwa, S. Matsuo, T. Kakitsuka, and K.-i. Kitayama, “Experimental demonstration of 1×4 InP/InGaAsP optical integrated multimode interference waveguide switch,” IPRM 2008, ThA1.7 (2008).

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Figures (10)

Fig. 1
Fig. 1

Schematic diagram of Optical Addressor and Optical Bit Memory Array.

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Fig. 2
Fig. 2

Schematic diagram of proposed MMI waveguide switch.

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Fig. 3
Fig. 3

Designed high-mesa waveguide structure.

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Fig. 4
Fig. 4

Theoretical light intensity pattern in the 1 × 4 MMI waveguide switch device for two different output ports.

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Fig. 5
Fig. 5

Theoretical light intensity distribution at the output for two different output ports.

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Fig. 6
Fig. 6

Photograph of the fabricated MMI waveguide switch.

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Fig. 7
Fig. 7

Near field pattern of the output light.

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Fig. 8
Fig. 8

Relation between wavelength and output power.

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Fig. 9
Fig. 9

Timing chart of output power from with dynamic switching.

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Fig. 10
Fig. 10

Timing chart of electrical signal pattern to the phase shifters.

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Tables (1)

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Table 1 Measured Performance of the Fabricated MMI Waveguide Switch

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Equations (2)

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Δ φ j k = { φ 0 + π + π 4 N ( − N + j + k − 1 ) ( 3 N − j − k + 1 )                                                                                                         f o r   N + j + k : o d d φ 0 + π 4 N ( N − j + k ) ( N + j − k )                                                                                                       f o r   N + j + k : e v e n
Ψ j ′ ( x , 0 ) = 1 N ∑ q = 0 N − 1 Ψ j ( x − x q , 0 ) exp ( i − θ j q ) = Ψ j ( x , − L m m i )

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