Abstract

A monolithically integrated InP/InGaAsP 1×5 optical phased-array switch is demonstrated for broadband wavelength-division multiplexed (WDM) optical packet switching (OPS) application. Using the wide optical bandwidth of the switch, we achieve error-free forwarding of 320-Gbps (40-Gbps × 8 channel) WDM signal with less than 1.3-dB penalty. Since the switch consists of only phase-modulating section, it is free from nonlinear signal distortion and inter-channel crosstalks, allowing large dynamic range of input power. The application to WDM-OPS testbed is demonstrated successfully, where 320-Gbps WDM payloads are routed synchronously to the optical label.

©2009 Optical Society of America

Full Article  |  PDF Article
OSA Recommended Articles
Monolithic InP strictly non-blocking 8×8 switch for high-speed WDM optical interconnection

Myung-Joon Kwack, Takuo Tanemura, Akio Higo, and Yoshiaki Nakano
Opt. Express 20(27) 28734-28741 (2012)

16-QAM optical packet switching and real-time self-homodyne detection using polarization-multiplexed pilot-carrier

Satoshi Shinada, Moriya Nakamura, Yukiyoshi Kamio, and Naoya Wada
Opt. Express 20(26) B535-B542 (2012)

Analysis of Large-Scale Multi-Stage All-Optical Packet Switching Routers

Q. Xu, H. Rastegarfar, Y. Ben M’Sallem, A. Leon-Garcia, S. LaRochelle, and L. A. Rusch
J. Opt. Commun. Netw. 4(5) 412-425 (2012)

More Recommended Articles

References

  • View by:
  • Article Order
  • |
  • Year
  • |
  • Author
  • |
  • Publication
  1. S. J. B. Yoo, “Optical packet and burst switching technologies for the future photonic internet,” IEEE J. Lightwave Technol. 24, 4468–4492 (2006).
    [Crossref]
  2. K. A. Williams, G. F. Roberts, T. Lin, R. V. Penty, I. H. White, M. Glick, and D. McAuley, “Integrated optical 2×2 switch for wavelength multiplexed interconnects,” IEEE J. Sel. Top. Quantum Electron. 11, 78–85 (2005).
    [Crossref]
  3. A. Shacham, B. A. Small, O. L. Ladouceur, and K. Bergman, “A fully implemented 12×12 data vortex optical packet switching interconnection network,” J. Lightwave Technol. 23, 3066–3075 (2005).
    [Crossref]
  4. Y. Kai, K. Sone, S. Yoshida, Y. Aoki, G. Nakagawa, and S. Kinoshita, “A compact and lossless 8×8 SOA gate switch subsystem for WDM optical packet interconnections,” in Proceedings of the 34th European Conf. on Opt. Com. (ECOC’08), paper We.2.D.4 (Belgium, Sept. 2008).
  5. H. Furukawa, N. Wada, Y. Awaji, T. Miyazaki, E. Kong, P. Chan, R. Man, G. Cincotti, and K. Kitayama, “Field trial of 160 Gbit/s DWDM-based optical packet switching and transmission,” Opt. Express,  16, 11487–11495 (2008), http://www.opticsinfobase.org/oe/abstract.cfm?uri=oe-16-15-11487.
    [Crossref] [PubMed]
  6. M. Schienle, G. Wenger, S. Eichinger, J. Müller, L. Stoll, and G. Müller, “A 1×8 InP/InGaAsP optical matrix switch with low insertion loss and high crosstalk suppression,” J. Lightwave Technol. 14, 822–826 (1996).
    [Crossref]
  7. Z. Wang, N. Chi, and S. Yu, “Characterization of 1×N broadcast and 2×N multicast packet switching using active-vertical-coupler-based optical crosspoint switch,” J. Lightwave Technol. 24, 2978–2985 (2006).
    [Crossref]
  8. T. Tanemura, M. Takenaka, A. Al Amin, K. Takeda, T. Shioda, M. Sugiyama, and Y. Nakano, “InP/InGaAsP integrated 1×5 optical switch using arrayed phase shifters,” IEEE Photon. Technol. Lett. 20, 1063–1065 (2008).
    [Crossref]
  9. T. Tanemura and Y. Nakano, “Design and scalability analysis of optical phased-array 1×N switch on planar lightwave circuit,” IEICE Electron Express 5, 603–609 (2008).
    [Crossref]
  10. I. M. Soganci, T. Tanemura, and Y. Nakano, “Polarization-independent broadband 1×8 optical phased-array switch monolithically integrated on InP,” in Proceedings of Optical Fiber Communication Conference (OFC’09), paper OWV1 (San Diego, Mar.2009).
  11. J. P. Mack, H. N. Poulsen, and D. J. Blumenthal, “Variable length optical packet synchronizer,” IEEE Photon. Technol. Lett. 20, 1252–1254 (2008).
    [Crossref]
  12. M. Takenaka, K. Takeda, Y. Kanema, Y. Nakano, M. Raburn, and T. Miyahara, “All-optical switching of 40 Gb/s packets by MMI-BLD optical label memory,” Opt. Express 14, 10785–10789 (2006), http://www.opticsinfobase.org/oe/abstract.cfm?URI=OPEX-14-22-10785.
    [Crossref] [PubMed]

2008 (4)

T. Tanemura, M. Takenaka, A. Al Amin, K. Takeda, T. Shioda, M. Sugiyama, and Y. Nakano, “InP/InGaAsP integrated 1×5 optical switch using arrayed phase shifters,” IEEE Photon. Technol. Lett. 20, 1063–1065 (2008).
[Crossref]

T. Tanemura and Y. Nakano, “Design and scalability analysis of optical phased-array 1×N switch on planar lightwave circuit,” IEICE Electron Express 5, 603–609 (2008).
[Crossref]

J. P. Mack, H. N. Poulsen, and D. J. Blumenthal, “Variable length optical packet synchronizer,” IEEE Photon. Technol. Lett. 20, 1252–1254 (2008).
[Crossref]

H. Furukawa, N. Wada, Y. Awaji, T. Miyazaki, E. Kong, P. Chan, R. Man, G. Cincotti, and K. Kitayama, “Field trial of 160 Gbit/s DWDM-based optical packet switching and transmission,” Opt. Express,  16, 11487–11495 (2008), http://www.opticsinfobase.org/oe/abstract.cfm?uri=oe-16-15-11487.
[Crossref] [PubMed]

2006 (3)

2005 (2)

K. A. Williams, G. F. Roberts, T. Lin, R. V. Penty, I. H. White, M. Glick, and D. McAuley, “Integrated optical 2×2 switch for wavelength multiplexed interconnects,” IEEE J. Sel. Top. Quantum Electron. 11, 78–85 (2005).
[Crossref]

A. Shacham, B. A. Small, O. L. Ladouceur, and K. Bergman, “A fully implemented 12×12 data vortex optical packet switching interconnection network,” J. Lightwave Technol. 23, 3066–3075 (2005).
[Crossref]

1996 (1)

M. Schienle, G. Wenger, S. Eichinger, J. Müller, L. Stoll, and G. Müller, “A 1×8 InP/InGaAsP optical matrix switch with low insertion loss and high crosstalk suppression,” J. Lightwave Technol. 14, 822–826 (1996).
[Crossref]

Al Amin, A.

T. Tanemura, M. Takenaka, A. Al Amin, K. Takeda, T. Shioda, M. Sugiyama, and Y. Nakano, “InP/InGaAsP integrated 1×5 optical switch using arrayed phase shifters,” IEEE Photon. Technol. Lett. 20, 1063–1065 (2008).
[Crossref]

Aoki, Y.

Y. Kai, K. Sone, S. Yoshida, Y. Aoki, G. Nakagawa, and S. Kinoshita, “A compact and lossless 8×8 SOA gate switch subsystem for WDM optical packet interconnections,” in Proceedings of the 34th European Conf. on Opt. Com. (ECOC’08), paper We.2.D.4 (Belgium, Sept. 2008).

Awaji, Y.

Bergman, K.

Blumenthal, D. J.

J. P. Mack, H. N. Poulsen, and D. J. Blumenthal, “Variable length optical packet synchronizer,” IEEE Photon. Technol. Lett. 20, 1252–1254 (2008).
[Crossref]

Chan, P.

Chi, N.

Cincotti, G.

Eichinger, S.

M. Schienle, G. Wenger, S. Eichinger, J. Müller, L. Stoll, and G. Müller, “A 1×8 InP/InGaAsP optical matrix switch with low insertion loss and high crosstalk suppression,” J. Lightwave Technol. 14, 822–826 (1996).
[Crossref]

Furukawa, H.

Glick, M.

K. A. Williams, G. F. Roberts, T. Lin, R. V. Penty, I. H. White, M. Glick, and D. McAuley, “Integrated optical 2×2 switch for wavelength multiplexed interconnects,” IEEE J. Sel. Top. Quantum Electron. 11, 78–85 (2005).
[Crossref]

Kai, Y.

Y. Kai, K. Sone, S. Yoshida, Y. Aoki, G. Nakagawa, and S. Kinoshita, “A compact and lossless 8×8 SOA gate switch subsystem for WDM optical packet interconnections,” in Proceedings of the 34th European Conf. on Opt. Com. (ECOC’08), paper We.2.D.4 (Belgium, Sept. 2008).

Kanema, Y.

Kinoshita, S.

Y. Kai, K. Sone, S. Yoshida, Y. Aoki, G. Nakagawa, and S. Kinoshita, “A compact and lossless 8×8 SOA gate switch subsystem for WDM optical packet interconnections,” in Proceedings of the 34th European Conf. on Opt. Com. (ECOC’08), paper We.2.D.4 (Belgium, Sept. 2008).

Kitayama, K.

Kong, E.

Ladouceur, O. L.

Lin, T.

K. A. Williams, G. F. Roberts, T. Lin, R. V. Penty, I. H. White, M. Glick, and D. McAuley, “Integrated optical 2×2 switch for wavelength multiplexed interconnects,” IEEE J. Sel. Top. Quantum Electron. 11, 78–85 (2005).
[Crossref]

Mack, J. P.

J. P. Mack, H. N. Poulsen, and D. J. Blumenthal, “Variable length optical packet synchronizer,” IEEE Photon. Technol. Lett. 20, 1252–1254 (2008).
[Crossref]

Man, R.

McAuley, D.

K. A. Williams, G. F. Roberts, T. Lin, R. V. Penty, I. H. White, M. Glick, and D. McAuley, “Integrated optical 2×2 switch for wavelength multiplexed interconnects,” IEEE J. Sel. Top. Quantum Electron. 11, 78–85 (2005).
[Crossref]

Miyahara, T.

Miyazaki, T.

Müller, G.

M. Schienle, G. Wenger, S. Eichinger, J. Müller, L. Stoll, and G. Müller, “A 1×8 InP/InGaAsP optical matrix switch with low insertion loss and high crosstalk suppression,” J. Lightwave Technol. 14, 822–826 (1996).
[Crossref]

Müller, J.

M. Schienle, G. Wenger, S. Eichinger, J. Müller, L. Stoll, and G. Müller, “A 1×8 InP/InGaAsP optical matrix switch with low insertion loss and high crosstalk suppression,” J. Lightwave Technol. 14, 822–826 (1996).
[Crossref]

Nakagawa, G.

Y. Kai, K. Sone, S. Yoshida, Y. Aoki, G. Nakagawa, and S. Kinoshita, “A compact and lossless 8×8 SOA gate switch subsystem for WDM optical packet interconnections,” in Proceedings of the 34th European Conf. on Opt. Com. (ECOC’08), paper We.2.D.4 (Belgium, Sept. 2008).

Nakano, Y.

T. Tanemura and Y. Nakano, “Design and scalability analysis of optical phased-array 1×N switch on planar lightwave circuit,” IEICE Electron Express 5, 603–609 (2008).
[Crossref]

T. Tanemura, M. Takenaka, A. Al Amin, K. Takeda, T. Shioda, M. Sugiyama, and Y. Nakano, “InP/InGaAsP integrated 1×5 optical switch using arrayed phase shifters,” IEEE Photon. Technol. Lett. 20, 1063–1065 (2008).
[Crossref]

M. Takenaka, K. Takeda, Y. Kanema, Y. Nakano, M. Raburn, and T. Miyahara, “All-optical switching of 40 Gb/s packets by MMI-BLD optical label memory,” Opt. Express 14, 10785–10789 (2006), http://www.opticsinfobase.org/oe/abstract.cfm?URI=OPEX-14-22-10785.
[Crossref] [PubMed]

I. M. Soganci, T. Tanemura, and Y. Nakano, “Polarization-independent broadband 1×8 optical phased-array switch monolithically integrated on InP,” in Proceedings of Optical Fiber Communication Conference (OFC’09), paper OWV1 (San Diego, Mar.2009).

Penty, R. V.

K. A. Williams, G. F. Roberts, T. Lin, R. V. Penty, I. H. White, M. Glick, and D. McAuley, “Integrated optical 2×2 switch for wavelength multiplexed interconnects,” IEEE J. Sel. Top. Quantum Electron. 11, 78–85 (2005).
[Crossref]

Poulsen, H. N.

J. P. Mack, H. N. Poulsen, and D. J. Blumenthal, “Variable length optical packet synchronizer,” IEEE Photon. Technol. Lett. 20, 1252–1254 (2008).
[Crossref]

Raburn, M.

Roberts, G. F.

K. A. Williams, G. F. Roberts, T. Lin, R. V. Penty, I. H. White, M. Glick, and D. McAuley, “Integrated optical 2×2 switch for wavelength multiplexed interconnects,” IEEE J. Sel. Top. Quantum Electron. 11, 78–85 (2005).
[Crossref]

Schienle, M.

M. Schienle, G. Wenger, S. Eichinger, J. Müller, L. Stoll, and G. Müller, “A 1×8 InP/InGaAsP optical matrix switch with low insertion loss and high crosstalk suppression,” J. Lightwave Technol. 14, 822–826 (1996).
[Crossref]

Shacham, A.

Shioda, T.

T. Tanemura, M. Takenaka, A. Al Amin, K. Takeda, T. Shioda, M. Sugiyama, and Y. Nakano, “InP/InGaAsP integrated 1×5 optical switch using arrayed phase shifters,” IEEE Photon. Technol. Lett. 20, 1063–1065 (2008).
[Crossref]

Small, B. A.

Soganci, I. M.

I. M. Soganci, T. Tanemura, and Y. Nakano, “Polarization-independent broadband 1×8 optical phased-array switch monolithically integrated on InP,” in Proceedings of Optical Fiber Communication Conference (OFC’09), paper OWV1 (San Diego, Mar.2009).

Sone, K.

Y. Kai, K. Sone, S. Yoshida, Y. Aoki, G. Nakagawa, and S. Kinoshita, “A compact and lossless 8×8 SOA gate switch subsystem for WDM optical packet interconnections,” in Proceedings of the 34th European Conf. on Opt. Com. (ECOC’08), paper We.2.D.4 (Belgium, Sept. 2008).

Stoll, L.

M. Schienle, G. Wenger, S. Eichinger, J. Müller, L. Stoll, and G. Müller, “A 1×8 InP/InGaAsP optical matrix switch with low insertion loss and high crosstalk suppression,” J. Lightwave Technol. 14, 822–826 (1996).
[Crossref]

Sugiyama, M.

T. Tanemura, M. Takenaka, A. Al Amin, K. Takeda, T. Shioda, M. Sugiyama, and Y. Nakano, “InP/InGaAsP integrated 1×5 optical switch using arrayed phase shifters,” IEEE Photon. Technol. Lett. 20, 1063–1065 (2008).
[Crossref]

Takeda, K.

T. Tanemura, M. Takenaka, A. Al Amin, K. Takeda, T. Shioda, M. Sugiyama, and Y. Nakano, “InP/InGaAsP integrated 1×5 optical switch using arrayed phase shifters,” IEEE Photon. Technol. Lett. 20, 1063–1065 (2008).
[Crossref]

M. Takenaka, K. Takeda, Y. Kanema, Y. Nakano, M. Raburn, and T. Miyahara, “All-optical switching of 40 Gb/s packets by MMI-BLD optical label memory,” Opt. Express 14, 10785–10789 (2006), http://www.opticsinfobase.org/oe/abstract.cfm?URI=OPEX-14-22-10785.
[Crossref] [PubMed]

Takenaka, M.

T. Tanemura, M. Takenaka, A. Al Amin, K. Takeda, T. Shioda, M. Sugiyama, and Y. Nakano, “InP/InGaAsP integrated 1×5 optical switch using arrayed phase shifters,” IEEE Photon. Technol. Lett. 20, 1063–1065 (2008).
[Crossref]

M. Takenaka, K. Takeda, Y. Kanema, Y. Nakano, M. Raburn, and T. Miyahara, “All-optical switching of 40 Gb/s packets by MMI-BLD optical label memory,” Opt. Express 14, 10785–10789 (2006), http://www.opticsinfobase.org/oe/abstract.cfm?URI=OPEX-14-22-10785.
[Crossref] [PubMed]

Tanemura, T.

T. Tanemura, M. Takenaka, A. Al Amin, K. Takeda, T. Shioda, M. Sugiyama, and Y. Nakano, “InP/InGaAsP integrated 1×5 optical switch using arrayed phase shifters,” IEEE Photon. Technol. Lett. 20, 1063–1065 (2008).
[Crossref]

T. Tanemura and Y. Nakano, “Design and scalability analysis of optical phased-array 1×N switch on planar lightwave circuit,” IEICE Electron Express 5, 603–609 (2008).
[Crossref]

I. M. Soganci, T. Tanemura, and Y. Nakano, “Polarization-independent broadband 1×8 optical phased-array switch monolithically integrated on InP,” in Proceedings of Optical Fiber Communication Conference (OFC’09), paper OWV1 (San Diego, Mar.2009).

Wada, N.

Wang, Z.

Wenger, G.

M. Schienle, G. Wenger, S. Eichinger, J. Müller, L. Stoll, and G. Müller, “A 1×8 InP/InGaAsP optical matrix switch with low insertion loss and high crosstalk suppression,” J. Lightwave Technol. 14, 822–826 (1996).
[Crossref]

White, I. H.

K. A. Williams, G. F. Roberts, T. Lin, R. V. Penty, I. H. White, M. Glick, and D. McAuley, “Integrated optical 2×2 switch for wavelength multiplexed interconnects,” IEEE J. Sel. Top. Quantum Electron. 11, 78–85 (2005).
[Crossref]

Williams, K. A.

K. A. Williams, G. F. Roberts, T. Lin, R. V. Penty, I. H. White, M. Glick, and D. McAuley, “Integrated optical 2×2 switch for wavelength multiplexed interconnects,” IEEE J. Sel. Top. Quantum Electron. 11, 78–85 (2005).
[Crossref]

Yoo, S. J. B.

S. J. B. Yoo, “Optical packet and burst switching technologies for the future photonic internet,” IEEE J. Lightwave Technol. 24, 4468–4492 (2006).
[Crossref]

Yoshida, S.

Y. Kai, K. Sone, S. Yoshida, Y. Aoki, G. Nakagawa, and S. Kinoshita, “A compact and lossless 8×8 SOA gate switch subsystem for WDM optical packet interconnections,” in Proceedings of the 34th European Conf. on Opt. Com. (ECOC’08), paper We.2.D.4 (Belgium, Sept. 2008).

Yu, S.

IEEE J. Lightwave Technol. (1)

S. J. B. Yoo, “Optical packet and burst switching technologies for the future photonic internet,” IEEE J. Lightwave Technol. 24, 4468–4492 (2006).
[Crossref]

IEEE J. Sel. Top. Quantum Electron. (1)

K. A. Williams, G. F. Roberts, T. Lin, R. V. Penty, I. H. White, M. Glick, and D. McAuley, “Integrated optical 2×2 switch for wavelength multiplexed interconnects,” IEEE J. Sel. Top. Quantum Electron. 11, 78–85 (2005).
[Crossref]

IEEE Photon. Technol. Lett. (2)

T. Tanemura, M. Takenaka, A. Al Amin, K. Takeda, T. Shioda, M. Sugiyama, and Y. Nakano, “InP/InGaAsP integrated 1×5 optical switch using arrayed phase shifters,” IEEE Photon. Technol. Lett. 20, 1063–1065 (2008).
[Crossref]

J. P. Mack, H. N. Poulsen, and D. J. Blumenthal, “Variable length optical packet synchronizer,” IEEE Photon. Technol. Lett. 20, 1252–1254 (2008).
[Crossref]

IEICE Electron Express (1)

T. Tanemura and Y. Nakano, “Design and scalability analysis of optical phased-array 1×N switch on planar lightwave circuit,” IEICE Electron Express 5, 603–609 (2008).
[Crossref]

J. Lightwave Technol. (3)

Opt. Express (2)

Other (2)

Y. Kai, K. Sone, S. Yoshida, Y. Aoki, G. Nakagawa, and S. Kinoshita, “A compact and lossless 8×8 SOA gate switch subsystem for WDM optical packet interconnections,” in Proceedings of the 34th European Conf. on Opt. Com. (ECOC’08), paper We.2.D.4 (Belgium, Sept. 2008).

I. M. Soganci, T. Tanemura, and Y. Nakano, “Polarization-independent broadband 1×8 optical phased-array switch monolithically integrated on InP,” in Proceedings of Optical Fiber Communication Conference (OFC’09), paper OWV1 (San Diego, Mar.2009).

Cited By

OSA participates in Crossref's Cited-By Linking service. Citing articles from OSA journals and other participating publishers are listed here.

Alert me when this article is cited.


Figures (6)

Fig. 1.
Fig. 1. Top photograph (a) and device structures (b) of the fabricated InP/InGaAsP 1×5 optical phased-array switch.

Download Full Size | PPT Slide | PDF

Fig. 2.
Fig. 2. Experimental setup for 320-Gbps WDM static switching measurement. LN-MZ: LiNbO3 Mach-Zehnder modulator, PC: polarization controller, EDFA: erbium-doped fiber amplifier, VOA: variable optical attenuator, DEMUX: wavelength demultiplexer, BER: bit-error-rate tester.

Download Full Size | PPT Slide | PDF

Fig. 3.
Fig. 3. (a). Receiver sensitivity at BER of 10-9 for all WDM channels at back-to-back (BB) and at five output ports (Port1–5) measured under static switching conditions (State1–5). (b–d) BER curves and 40-Gbps eye-diagrams of Ch1 (1546.1 nm), Ch5 (1552.5 nm), and Ch8 (1557.3 nm) for all states.

Download Full Size | PPT Slide | PDF

Fig. 4.
Fig. 4. Receiver penalty at BER of 10-9 as a function of input signal power of Ch5 (1552.5 nm) for the cases of single wavelength (Ch5, circles), two wavelengths (Ch5 and Ch4, dots), and eight wavelengths (Ch1-Ch8, triangles). The switch is set to State 1 and the output signal from Port 1 is measured.

Download Full Size | PPT Slide | PDF

Fig. 5.
Fig. 5. Experimental setup for 320-Gbps WDM-OPS demonstration.

Download Full Size | PPT Slide | PDF

Fig. 6.
Fig. 6. Waveforms of 320-Gbps WDM optical packets (all channels, Ch1, Ch5, and Ch8) at the switch input (left column), output Port 1 (center column), and Port 3 (right column).

Download Full Size | PPT Slide | PDF

Metrics