Abstract

We demonstrate an optical clock recovery circuit that extracts the line rate component on a per packet basis from short data packets at 40 Gb/s. The circuit comprises a Fabry-Perot filter followed by a novel power limiting configuration, which in turn consists of a 5m highly nonlinear bismuth oxide fiber in cascade with an optical bandpass filter. Both experimental and simulation-based results are in close agreement and reveal that the proposed circuit acquires the timing information within only a small number of bits, yielding a packet clock for every respective data packet. Moreover, we investigate theoretically the scaling laws for the parameters of the circuit for operation beyond 40 Gb/s and present simulation results showing successful packet clock extraction for 160 Gb/s data packets. Finally, the circuit’s potential for operation at 320 Gb/s is discussed, indicating that ultrafast packet clock recovery should be in principle feasible by exploiting the passive structure of the device and the fsec-scale nonlinear response of the optical fiber.

© 2007 Optical Society of America

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References

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  1. R. Ludwig, W. Pieper, E. Jahn, N. Agrawal, A. Ehrhardt, L. Kuller, H.G. Weber, "10GHz all-optical clock recovery using a mode-locked semiconductor laser in a 40Gbit/s, 100-km transmission experiment," in Proceedings of IEEE Conference on Optical Fiber Communications, (Institute of Electrical and Electronics Engineers, Anaheim, 1996), 167-168, WH2.
  2. O. Kamatani, S. Kawanishi, "Ultrahigh speed clock recovery with phase locked loop based on four-wave mixing in a travelling-wave laser diode amplifier," J. Lightwave Technol. 14, 1557-1568 (1996).
    [CrossRef]
  3. Y. Yang, Y. J. Wen, A. Nirmathalas, H. F. Liu, and D. Novak, "Optical clock recovery at line rates via injection locking of a long cavity Fabry-Pérot laser diode," IEEE Photon. Technol. Lett. 16, 1561-1563 (2004).
    [CrossRef]
  4. B. Sartorius, C. Bornholdt, S. Bauer, and M. Möhrle, "40 GHz optical clock recovery for application in asynchronous networks," in Proceedings of the 2001 European Conference on Optical Communications (ECOC, Amsterdam, 2001), 442-443, We. P.32.
  5. N. Pleros, K. Vyrsokinos, C. Bintjas, K. Yiannopoulos, K. Vlachos, H. Avramopoulos, and G. Guekos, "All-Optical Clock Recovery from Short Asynchronous Data Packets at 10 Gb/s," IEEE Photon. Technol. Lett. 15, 1291-1293 (2003).
    [CrossRef]
  6. E. Kehayas, L. Stampoulidis, H. Avramopoulos, Y. Liu, E. Tangdiongga and H.J.S. Dorren, "40 Gb/s all-optical packet clock recovery with ultrafast lock-in time and low inter-packet guardbands," Opt. Express 13, 475-480 (2005).
    [CrossRef] [PubMed]
  7. Ch. Kouloumentas, A. Tzanakaki, and I. Tomkos, "Clock Recovery at 160 Gb/s and beyond, using a Fiber Based Optical Power Limiter," IEEE Photon. Technol. Lett. 18, 2365-2367 (2006).
    [CrossRef]
  8. G. V. Agrawal, Nonlinear Fiber Optics, 3rd Ed. (Academic Press, Inc., 2001).

2006

Ch. Kouloumentas, A. Tzanakaki, and I. Tomkos, "Clock Recovery at 160 Gb/s and beyond, using a Fiber Based Optical Power Limiter," IEEE Photon. Technol. Lett. 18, 2365-2367 (2006).
[CrossRef]

2005

2004

Y. Yang, Y. J. Wen, A. Nirmathalas, H. F. Liu, and D. Novak, "Optical clock recovery at line rates via injection locking of a long cavity Fabry-Pérot laser diode," IEEE Photon. Technol. Lett. 16, 1561-1563 (2004).
[CrossRef]

2003

N. Pleros, K. Vyrsokinos, C. Bintjas, K. Yiannopoulos, K. Vlachos, H. Avramopoulos, and G. Guekos, "All-Optical Clock Recovery from Short Asynchronous Data Packets at 10 Gb/s," IEEE Photon. Technol. Lett. 15, 1291-1293 (2003).
[CrossRef]

1996

O. Kamatani, S. Kawanishi, "Ultrahigh speed clock recovery with phase locked loop based on four-wave mixing in a travelling-wave laser diode amplifier," J. Lightwave Technol. 14, 1557-1568 (1996).
[CrossRef]

IEEE Photon. Technol. Lett.

Y. Yang, Y. J. Wen, A. Nirmathalas, H. F. Liu, and D. Novak, "Optical clock recovery at line rates via injection locking of a long cavity Fabry-Pérot laser diode," IEEE Photon. Technol. Lett. 16, 1561-1563 (2004).
[CrossRef]

N. Pleros, K. Vyrsokinos, C. Bintjas, K. Yiannopoulos, K. Vlachos, H. Avramopoulos, and G. Guekos, "All-Optical Clock Recovery from Short Asynchronous Data Packets at 10 Gb/s," IEEE Photon. Technol. Lett. 15, 1291-1293 (2003).
[CrossRef]

Ch. Kouloumentas, A. Tzanakaki, and I. Tomkos, "Clock Recovery at 160 Gb/s and beyond, using a Fiber Based Optical Power Limiter," IEEE Photon. Technol. Lett. 18, 2365-2367 (2006).
[CrossRef]

J. Lightwave Technol.

O. Kamatani, S. Kawanishi, "Ultrahigh speed clock recovery with phase locked loop based on four-wave mixing in a travelling-wave laser diode amplifier," J. Lightwave Technol. 14, 1557-1568 (1996).
[CrossRef]

Opt. Express

Other

G. V. Agrawal, Nonlinear Fiber Optics, 3rd Ed. (Academic Press, Inc., 2001).

R. Ludwig, W. Pieper, E. Jahn, N. Agrawal, A. Ehrhardt, L. Kuller, H.G. Weber, "10GHz all-optical clock recovery using a mode-locked semiconductor laser in a 40Gbit/s, 100-km transmission experiment," in Proceedings of IEEE Conference on Optical Fiber Communications, (Institute of Electrical and Electronics Engineers, Anaheim, 1996), 167-168, WH2.

B. Sartorius, C. Bornholdt, S. Bauer, and M. Möhrle, "40 GHz optical clock recovery for application in asynchronous networks," in Proceedings of the 2001 European Conference on Optical Communications (ECOC, Amsterdam, 2001), 442-443, We. P.32.

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Figures (5)

Fig. 1.
Fig. 1.

a) Experimental setup for the derivation of the optical power limiter’s transfer function using input pulses of 3 ps pulse width. b) The experimental (black dots) power-limiting output vs. input peak power transfer function. The blue line corresponds to the simulated transfer function.

Fig. 2.
Fig. 2.

Experimental setup for packet clock recovery at 40 Gb/s.

Fig. 3.
Fig. 3.

Traces and eye diagrams of a) the input signal, b) the wavelength converted signal, c) the signal at the output of the FPF, and d) at the output of the clock recovery unit. Time base is 800 ps/div for the traces and 10 ps/div for the eye diagrams. In the inset of Fig. 3(d) a detailed representation of the first packet clock is given.

Fig. 4.
Fig. 4.

Eye diagrams of the a) input signal, b) wavelength converted signal, c) output of the FPF, and d) output of the clock recovery unit, when longer packets serve as input. Time base is 10 ps/div.

Fig. 5.
Fig. 5.

Simulation traces (eye diagrams as insets) of a) the input of the fiber at 40 Gb/s, b) the output of the clock recovery circuit at 40 Gb/s, c) the input of the fiber at 160 Gb/s, and d) the output of the clock recovery circuit at 160 Gb/s. Time base is 200 and 800 ps/division for traces at 40 and 160 Gb/s, respectively. In upper insets of fig. 5(b) and 5(d) detailed representations of the first packet clock are given.

Equations (2)

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i u ξ = 1 2 2 u τ 2 N 2 u 2 u
ξ = z L D = z β 2 T 0 2 , τ = T T 0 , N 2 = L D L NL = ( γ P 0 ) · T 0 2 β 2

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