Abstract

Conventional architectures for the implementation of Boolean logic are based on a network of bistable elements assembled to realize cascades of simple Boolean logic gates. Since each such gate has two input signals and only one output signal, such architectures are fundamentally dissipative in information and energy. Their serial nature also induces a latency in the processing time. In this paper we present a new, principally non-dissipative digital logic architecture which mitigates the above impediments. Unlike traditional computing architectures, the proposed architecture involves a distributed and parallel input scheme where logical functions are evaluated at the speed of light. The system is based on digital logic vectors rather than the Boolean scalars of electronic logic. The architecture employs a novel conception of cascading which utilizes the strengths of both optics and electronics while avoiding their weaknesses. It is inherently non-dissipative, respects the linear nature of interactions in pure optics, and harnesses the control advantages of electrons without reducing the speed advantages of optics. This new logic paradigm was specially developed with optical implementation in mind. However, it is suitable for other implementations as well, including conventional electronic devices.

© 2007 Optical Society of America

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References

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  1. L. J. Cutrona, E. N. Leith, C. J. Palermo, and L. J. Porcello, “Optical data processing and filtering systems,” IRE Trans. Inform. Theory IT-6,386–400 (1960).
    [Crossref]
  2. A. B. VanderLugt, “Optical data processing and filtering systems,” IRE Trans. Inform. Theory IT-10,139–145 (1964).
  3. H. J. Caulfield and J. Shamir, “Wave-particle duality processors – characteristics, requirements and applications,” J. Opt. Soc. Am. A 7,1314–1323 (1990).
    [Crossref]
  4. J. Shamir, H. J. Caulfield, W. Micelli, and R. J. Seymour, “Optical Computing and the Fredkin Gates,” Applied Optics 25(10),1604–1607 (1986).
    [Crossref]
  5. J. Shamir, “Three-dimensional optical interconnection gate array,” Appl. Opt. 26,3455–3457 (1987).
    [Crossref] [PubMed]
  6. M. M. Mirsalehi, J. Shamir, and H. J. Caulfield, “Residue arithmetic processing utilizing optical Fredkin gate arrays,” Appl. Opt. 26 (1987).
    [Crossref] [PubMed]
  7. K. M. Johnson, M. Surette, and J. Shamir, “Optical interconnection network using polarization-based ferroelectric liquid crystal gates,” Appl. Opt. 27,1727–1733 (1988).
    [Crossref] [PubMed]
  8. E. Fredkin and T. Toffoli, “Conservative Logic,” International Journal of Theoreticl Physics 21(3/4),219–253 (1982).
    [Crossref]
  9. H. J. Caulfied, R. A. Soref, L. Qian, A. Zavalin, and J. Hardy, “Generalized Optical Logic Elements – GOLEs,” under review .
  10. R. Landauer, “Irreversibility and Heat Generation in the Computing Process,” IBM Journal of Research and Development 5,183–191 (1961).
    [Crossref]
  11. S. Younis, “Asymptotically zero energy computing using split-level charge recovery logic,” Ph.D. thesis, MIT (1994).
  12. S. Younis and T. Knight, “Asymptotically zero energy split-level charge recovery logic,” in Proc. of 1994 International Workshop on Low Power Design, pp.177–182 (1994).
  13. M. P. Frank, “Physical Limits of Computing. Lecture #24 Adiabatic CMOS,” (2002). URL http://www.cise.ufl.edu/mpf/physlim/PhysLimL24.ppt.
  14. A. I. Zavalin, J. Shamir, C. S. Vikram, and H. J. Caulfield, “Achieving stabilization in interferometric logic operations,” Appl. Opt. 45(2),360–365 (2006).
    [Crossref]
  15. H. J. Caulfied and R. A. Soref, “Universal reconfigurable optical logic with silicon-on-insulator resonant structures,” Photonics and Nanostructures - Fundamentals and Applications (to appear).

2006 (1)

A. I. Zavalin, J. Shamir, C. S. Vikram, and H. J. Caulfield, “Achieving stabilization in interferometric logic operations,” Appl. Opt. 45(2),360–365 (2006).
[Crossref]

2002 (1)

M. P. Frank, “Physical Limits of Computing. Lecture #24 Adiabatic CMOS,” (2002). URL http://www.cise.ufl.edu/mpf/physlim/PhysLimL24.ppt.

1994 (1)

S. Younis, “Asymptotically zero energy computing using split-level charge recovery logic,” Ph.D. thesis, MIT (1994).

1990 (1)

H. J. Caulfield and J. Shamir, “Wave-particle duality processors – characteristics, requirements and applications,” J. Opt. Soc. Am. A 7,1314–1323 (1990).
[Crossref]

1988 (1)

1987 (2)

M. M. Mirsalehi, J. Shamir, and H. J. Caulfield, “Residue arithmetic processing utilizing optical Fredkin gate arrays,” Appl. Opt. 26 (1987).
[Crossref] [PubMed]

J. Shamir, “Three-dimensional optical interconnection gate array,” Appl. Opt. 26,3455–3457 (1987).
[Crossref] [PubMed]

1986 (1)

J. Shamir, H. J. Caulfield, W. Micelli, and R. J. Seymour, “Optical Computing and the Fredkin Gates,” Applied Optics 25(10),1604–1607 (1986).
[Crossref]

1982 (1)

E. Fredkin and T. Toffoli, “Conservative Logic,” International Journal of Theoreticl Physics 21(3/4),219–253 (1982).
[Crossref]

1964 (1)

A. B. VanderLugt, “Optical data processing and filtering systems,” IRE Trans. Inform. Theory IT-10,139–145 (1964).

1961 (1)

R. Landauer, “Irreversibility and Heat Generation in the Computing Process,” IBM Journal of Research and Development 5,183–191 (1961).
[Crossref]

1960 (1)

L. J. Cutrona, E. N. Leith, C. J. Palermo, and L. J. Porcello, “Optical data processing and filtering systems,” IRE Trans. Inform. Theory IT-6,386–400 (1960).
[Crossref]

Caulfied, H. J.

H. J. Caulfied, R. A. Soref, L. Qian, A. Zavalin, and J. Hardy, “Generalized Optical Logic Elements – GOLEs,” under review .

H. J. Caulfied and R. A. Soref, “Universal reconfigurable optical logic with silicon-on-insulator resonant structures,” Photonics and Nanostructures - Fundamentals and Applications (to appear).

Caulfield, H. J.

A. I. Zavalin, J. Shamir, C. S. Vikram, and H. J. Caulfield, “Achieving stabilization in interferometric logic operations,” Appl. Opt. 45(2),360–365 (2006).
[Crossref]

H. J. Caulfield and J. Shamir, “Wave-particle duality processors – characteristics, requirements and applications,” J. Opt. Soc. Am. A 7,1314–1323 (1990).
[Crossref]

M. M. Mirsalehi, J. Shamir, and H. J. Caulfield, “Residue arithmetic processing utilizing optical Fredkin gate arrays,” Appl. Opt. 26 (1987).
[Crossref] [PubMed]

J. Shamir, H. J. Caulfield, W. Micelli, and R. J. Seymour, “Optical Computing and the Fredkin Gates,” Applied Optics 25(10),1604–1607 (1986).
[Crossref]

Cutrona, L. J.

L. J. Cutrona, E. N. Leith, C. J. Palermo, and L. J. Porcello, “Optical data processing and filtering systems,” IRE Trans. Inform. Theory IT-6,386–400 (1960).
[Crossref]

Frank, M. P.

M. P. Frank, “Physical Limits of Computing. Lecture #24 Adiabatic CMOS,” (2002). URL http://www.cise.ufl.edu/mpf/physlim/PhysLimL24.ppt.

Fredkin, E.

E. Fredkin and T. Toffoli, “Conservative Logic,” International Journal of Theoreticl Physics 21(3/4),219–253 (1982).
[Crossref]

Hardy, J.

H. J. Caulfied, R. A. Soref, L. Qian, A. Zavalin, and J. Hardy, “Generalized Optical Logic Elements – GOLEs,” under review .

Johnson, K. M.

Knight, T.

S. Younis and T. Knight, “Asymptotically zero energy split-level charge recovery logic,” in Proc. of 1994 International Workshop on Low Power Design, pp.177–182 (1994).

Landauer, R.

R. Landauer, “Irreversibility and Heat Generation in the Computing Process,” IBM Journal of Research and Development 5,183–191 (1961).
[Crossref]

Leith, E. N.

L. J. Cutrona, E. N. Leith, C. J. Palermo, and L. J. Porcello, “Optical data processing and filtering systems,” IRE Trans. Inform. Theory IT-6,386–400 (1960).
[Crossref]

Micelli, W.

J. Shamir, H. J. Caulfield, W. Micelli, and R. J. Seymour, “Optical Computing and the Fredkin Gates,” Applied Optics 25(10),1604–1607 (1986).
[Crossref]

Mirsalehi, M. M.

M. M. Mirsalehi, J. Shamir, and H. J. Caulfield, “Residue arithmetic processing utilizing optical Fredkin gate arrays,” Appl. Opt. 26 (1987).
[Crossref] [PubMed]

Palermo, C. J.

L. J. Cutrona, E. N. Leith, C. J. Palermo, and L. J. Porcello, “Optical data processing and filtering systems,” IRE Trans. Inform. Theory IT-6,386–400 (1960).
[Crossref]

Porcello, L. J.

L. J. Cutrona, E. N. Leith, C. J. Palermo, and L. J. Porcello, “Optical data processing and filtering systems,” IRE Trans. Inform. Theory IT-6,386–400 (1960).
[Crossref]

Qian, L.

H. J. Caulfied, R. A. Soref, L. Qian, A. Zavalin, and J. Hardy, “Generalized Optical Logic Elements – GOLEs,” under review .

Seymour, R. J.

J. Shamir, H. J. Caulfield, W. Micelli, and R. J. Seymour, “Optical Computing and the Fredkin Gates,” Applied Optics 25(10),1604–1607 (1986).
[Crossref]

Shamir, J.

A. I. Zavalin, J. Shamir, C. S. Vikram, and H. J. Caulfield, “Achieving stabilization in interferometric logic operations,” Appl. Opt. 45(2),360–365 (2006).
[Crossref]

H. J. Caulfield and J. Shamir, “Wave-particle duality processors – characteristics, requirements and applications,” J. Opt. Soc. Am. A 7,1314–1323 (1990).
[Crossref]

K. M. Johnson, M. Surette, and J. Shamir, “Optical interconnection network using polarization-based ferroelectric liquid crystal gates,” Appl. Opt. 27,1727–1733 (1988).
[Crossref] [PubMed]

M. M. Mirsalehi, J. Shamir, and H. J. Caulfield, “Residue arithmetic processing utilizing optical Fredkin gate arrays,” Appl. Opt. 26 (1987).
[Crossref] [PubMed]

J. Shamir, “Three-dimensional optical interconnection gate array,” Appl. Opt. 26,3455–3457 (1987).
[Crossref] [PubMed]

J. Shamir, H. J. Caulfield, W. Micelli, and R. J. Seymour, “Optical Computing and the Fredkin Gates,” Applied Optics 25(10),1604–1607 (1986).
[Crossref]

Soref, R. A.

H. J. Caulfied and R. A. Soref, “Universal reconfigurable optical logic with silicon-on-insulator resonant structures,” Photonics and Nanostructures - Fundamentals and Applications (to appear).

H. J. Caulfied, R. A. Soref, L. Qian, A. Zavalin, and J. Hardy, “Generalized Optical Logic Elements – GOLEs,” under review .

Surette, M.

Toffoli, T.

E. Fredkin and T. Toffoli, “Conservative Logic,” International Journal of Theoreticl Physics 21(3/4),219–253 (1982).
[Crossref]

VanderLugt, A. B.

A. B. VanderLugt, “Optical data processing and filtering systems,” IRE Trans. Inform. Theory IT-10,139–145 (1964).

Vikram, C. S.

A. I. Zavalin, J. Shamir, C. S. Vikram, and H. J. Caulfield, “Achieving stabilization in interferometric logic operations,” Appl. Opt. 45(2),360–365 (2006).
[Crossref]

Younis, S.

S. Younis, “Asymptotically zero energy computing using split-level charge recovery logic,” Ph.D. thesis, MIT (1994).

S. Younis and T. Knight, “Asymptotically zero energy split-level charge recovery logic,” in Proc. of 1994 International Workshop on Low Power Design, pp.177–182 (1994).

Zavalin, A.

H. J. Caulfied, R. A. Soref, L. Qian, A. Zavalin, and J. Hardy, “Generalized Optical Logic Elements – GOLEs,” under review .

Zavalin, A. I.

A. I. Zavalin, J. Shamir, C. S. Vikram, and H. J. Caulfield, “Achieving stabilization in interferometric logic operations,” Appl. Opt. 45(2),360–365 (2006).
[Crossref]

Appl. Opt. (4)

J. Shamir, “Three-dimensional optical interconnection gate array,” Appl. Opt. 26,3455–3457 (1987).
[Crossref] [PubMed]

M. M. Mirsalehi, J. Shamir, and H. J. Caulfield, “Residue arithmetic processing utilizing optical Fredkin gate arrays,” Appl. Opt. 26 (1987).
[Crossref] [PubMed]

K. M. Johnson, M. Surette, and J. Shamir, “Optical interconnection network using polarization-based ferroelectric liquid crystal gates,” Appl. Opt. 27,1727–1733 (1988).
[Crossref] [PubMed]

A. I. Zavalin, J. Shamir, C. S. Vikram, and H. J. Caulfield, “Achieving stabilization in interferometric logic operations,” Appl. Opt. 45(2),360–365 (2006).
[Crossref]

Applied Optics (1)

J. Shamir, H. J. Caulfield, W. Micelli, and R. J. Seymour, “Optical Computing and the Fredkin Gates,” Applied Optics 25(10),1604–1607 (1986).
[Crossref]

IBM Journal of Research and Development (1)

R. Landauer, “Irreversibility and Heat Generation in the Computing Process,” IBM Journal of Research and Development 5,183–191 (1961).
[Crossref]

International Journal of Theoreticl Physics (1)

E. Fredkin and T. Toffoli, “Conservative Logic,” International Journal of Theoreticl Physics 21(3/4),219–253 (1982).
[Crossref]

IRE Trans. Inform. Theory (2)

L. J. Cutrona, E. N. Leith, C. J. Palermo, and L. J. Porcello, “Optical data processing and filtering systems,” IRE Trans. Inform. Theory IT-6,386–400 (1960).
[Crossref]

A. B. VanderLugt, “Optical data processing and filtering systems,” IRE Trans. Inform. Theory IT-10,139–145 (1964).

J. Opt. Soc. Am. (1)

H. J. Caulfield and J. Shamir, “Wave-particle duality processors – characteristics, requirements and applications,” J. Opt. Soc. Am. A 7,1314–1323 (1990).
[Crossref]

Ph.D. thesis (1)

S. Younis, “Asymptotically zero energy computing using split-level charge recovery logic,” Ph.D. thesis, MIT (1994).

Photonics and Nanostructures - Fundamentals and Applications (1)

H. J. Caulfied and R. A. Soref, “Universal reconfigurable optical logic with silicon-on-insulator resonant structures,” Photonics and Nanostructures - Fundamentals and Applications (to appear).

Other (3)

S. Younis and T. Knight, “Asymptotically zero energy split-level charge recovery logic,” in Proc. of 1994 International Workshop on Low Power Design, pp.177–182 (1994).

M. P. Frank, “Physical Limits of Computing. Lecture #24 Adiabatic CMOS,” (2002). URL http://www.cise.ufl.edu/mpf/physlim/PhysLimL24.ppt.

H. J. Caulfied, R. A. Soref, L. Qian, A. Zavalin, and J. Hardy, “Generalized Optical Logic Elements – GOLEs,” under review .

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Figures (10)

Fig. 1.
Fig. 1.

XOR/XNOR computed with a series of directed logic elements

Fig. 2.
Fig. 2.

OR/NOR circuit in directed logic

Fig. 3.
Fig. 3.

Recursive cascading to produce a complex circuit: OR circuits are nested within an AND circuit as indicated by the arrows.

Fig. 4.
Fig. 4.

The final circuit for (A OR B) AND C

Fig. 5.
Fig. 5.

A simpler circuit computing the same function as Figure 4

Fig. 6.
Fig. 6.

AND/NAND circuit

Fig. 7.
Fig. 7.

Circuit for IF A, THEN B and its negation A AND NOT B

Fig. 8.
Fig. 8.

Circuit for IF B, THEN A and its negation B AND NOT A

Fig. 9.
Fig. 9.

OR/NOR circuit

Fig. 10.
Fig. 10.

A fully cascadeable XOR/XNOR circuit.The XOR gate shown in Figure 1 works only for XOR among literals, it can’t be cascaded into in the style of section 2.2. The XOR design shown here is fully cascadeable though somewhat larger.

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