Abstract

Smart pixel technology provides the ability to integrate complex electronic circuitry with optoelectronic devices to produce signal processing capabilities previously unattainable with a single technology. Epitaxy-on-Electronics (EoE) is a process by which optoelectronic devices are monolithically integrated with electronic circuitry in a common semiconductor material. Here, InGaP LEDs are integrated with GaAs electronic circuitry to produce smart pixel arrays. In this paper, the architecture and experimental characterization of the optical devices of a novel smart pixel implementation of an neural network are presented. Measured performance characteristics are presented for the detectors and LEDs, before and after the EoE process. The experimental results demonstrate limitations in the performance of the detectors and LEDs for use in a full-scale implementation, however, current ongoing improvements in the EoE technology show promise to eliminate these limitations.

© 1999 Optical Society of America

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References

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  1. R. Floyd and L. Steinberg, “An adaptive algorithm for spatial gray scale,” SID 75 Digest35–36, (1975).
  2. B. L. Shoop and E. K. Ressler, “An error diffusion neural network for digital image halftoning,” Proc. of the IEEE Workshop on Neural Networks, (Institute of Electrical and Electronics Engineers, Signal Processing Society and Neural Networks Council, Boston, Massachusetts) 427–436 (1995).
  3. E. K. Ressler and B. L. Shoop, “High quality digital halftones from error diffusion networks, ” Proc. of the Society for Information Display, (San Diego, California) 506–509 (1996).
  4. B. L. Shoop, A. H. Sayles, D. A. Hall, and E. K. Ressler, “A smart pixel implementation of an error diffusion neural network for digital halftoning,” Invited Paper in Special Issue of International Journal of Optoelectronics on Smart Pixels  11, 217–228, (1997).
  5. D. A. Hall, A. H. Sayles, G. P. Dudevoir, R. W. Sadowski, and B.L. Shoop, “Experimental demonstration of a 5×5 smart pixel neural array for digital image halftoning,” Postdeadline Paper in OSA Annual Meeting Technical Digest, (Optical Society of America, Washington, D.C., 1998).
  6. D. A. Hall, B. L. Shoop, G. P. Dudevoir, and A. H. Sayles, “Experimental demonstration of a 3×3 liquid crystal on silicon smart pixel array for digital image halftoning,” in OSA Annual Meeting Technical Digest (Optical Society of America, Washington, D.C., 1998).
  7. D. A. Hall, B. L. Shoop, J. R. Loy, G. B. Tait, E. K. Ressler, J. F. Ahadian, and C. G. Fonstad, “Experimental demonstration of a 3×3 monolithically integrated smart pixel array based on Epitaxy-on-Electronics technology,” Postdeadline Paper in OSA Annual Meeting Technical Digest, (Optical Society of America, Washington, D.C., 1997).
  8. J. F. Ahadian, P. T. Vaidyanathan, S. G. Patterson, Y. Royter, D. Mull, G. S. Petrich, W. D. Goodhus, S. Prasad, L. A. Kolodziejski, and C. G. Fonstad, “Practical OEIC’s based on monolithic integration of GaAs-InGaP LED’s with commercial GaAs VLSI electronics,” IEEE J. Quant. Elect. 34, 1117–1123, (1998).
    [Crossref]
  9. J. F. Ahadian and C .G. Fonstad, “The Epitaxy-on-Electronics technology for monolithic optoelectronic integration: foundations, development, and status,” Opt. Eng. 37, 3161–3174 (1998).
    [Crossref]
  10. E. K. Braun, K. V. Shenoy, C. G. Fonstad, and J. M. Mikkelson, “Elevated Temperature Stability of GaAs Digital Integrated Circuits,” IEEE Electron Device Let. 17, 37–39, (1996).
    [Crossref]
  11. Photonics Research Center, U.S. Military Academy, http://www.eecs.usma.edu/photonic/default.html
  12. Compound Semiconductor Materials and Devices Research Group, Massachusetts Institute of Technology, http://web.mit.edu/fonstad/www/group.html

1998 (2)

J. F. Ahadian, P. T. Vaidyanathan, S. G. Patterson, Y. Royter, D. Mull, G. S. Petrich, W. D. Goodhus, S. Prasad, L. A. Kolodziejski, and C. G. Fonstad, “Practical OEIC’s based on monolithic integration of GaAs-InGaP LED’s with commercial GaAs VLSI electronics,” IEEE J. Quant. Elect. 34, 1117–1123, (1998).
[Crossref]

J. F. Ahadian and C .G. Fonstad, “The Epitaxy-on-Electronics technology for monolithic optoelectronic integration: foundations, development, and status,” Opt. Eng. 37, 3161–3174 (1998).
[Crossref]

1997 (1)

B. L. Shoop, A. H. Sayles, D. A. Hall, and E. K. Ressler, “A smart pixel implementation of an error diffusion neural network for digital halftoning,” Invited Paper in Special Issue of International Journal of Optoelectronics on Smart Pixels  11, 217–228, (1997).

1996 (1)

E. K. Braun, K. V. Shenoy, C. G. Fonstad, and J. M. Mikkelson, “Elevated Temperature Stability of GaAs Digital Integrated Circuits,” IEEE Electron Device Let. 17, 37–39, (1996).
[Crossref]

1975 (1)

R. Floyd and L. Steinberg, “An adaptive algorithm for spatial gray scale,” SID 75 Digest35–36, (1975).

Ahadian, J. F.

J. F. Ahadian, P. T. Vaidyanathan, S. G. Patterson, Y. Royter, D. Mull, G. S. Petrich, W. D. Goodhus, S. Prasad, L. A. Kolodziejski, and C. G. Fonstad, “Practical OEIC’s based on monolithic integration of GaAs-InGaP LED’s with commercial GaAs VLSI electronics,” IEEE J. Quant. Elect. 34, 1117–1123, (1998).
[Crossref]

J. F. Ahadian and C .G. Fonstad, “The Epitaxy-on-Electronics technology for monolithic optoelectronic integration: foundations, development, and status,” Opt. Eng. 37, 3161–3174 (1998).
[Crossref]

D. A. Hall, B. L. Shoop, J. R. Loy, G. B. Tait, E. K. Ressler, J. F. Ahadian, and C. G. Fonstad, “Experimental demonstration of a 3×3 monolithically integrated smart pixel array based on Epitaxy-on-Electronics technology,” Postdeadline Paper in OSA Annual Meeting Technical Digest, (Optical Society of America, Washington, D.C., 1997).

Braun, E. K.

E. K. Braun, K. V. Shenoy, C. G. Fonstad, and J. M. Mikkelson, “Elevated Temperature Stability of GaAs Digital Integrated Circuits,” IEEE Electron Device Let. 17, 37–39, (1996).
[Crossref]

Dudevoir, G. P.

D. A. Hall, A. H. Sayles, G. P. Dudevoir, R. W. Sadowski, and B.L. Shoop, “Experimental demonstration of a 5×5 smart pixel neural array for digital image halftoning,” Postdeadline Paper in OSA Annual Meeting Technical Digest, (Optical Society of America, Washington, D.C., 1998).

D. A. Hall, B. L. Shoop, G. P. Dudevoir, and A. H. Sayles, “Experimental demonstration of a 3×3 liquid crystal on silicon smart pixel array for digital image halftoning,” in OSA Annual Meeting Technical Digest (Optical Society of America, Washington, D.C., 1998).

Floyd, R.

R. Floyd and L. Steinberg, “An adaptive algorithm for spatial gray scale,” SID 75 Digest35–36, (1975).

Fonstad, C .G.

J. F. Ahadian and C .G. Fonstad, “The Epitaxy-on-Electronics technology for monolithic optoelectronic integration: foundations, development, and status,” Opt. Eng. 37, 3161–3174 (1998).
[Crossref]

Fonstad, C. G.

J. F. Ahadian, P. T. Vaidyanathan, S. G. Patterson, Y. Royter, D. Mull, G. S. Petrich, W. D. Goodhus, S. Prasad, L. A. Kolodziejski, and C. G. Fonstad, “Practical OEIC’s based on monolithic integration of GaAs-InGaP LED’s with commercial GaAs VLSI electronics,” IEEE J. Quant. Elect. 34, 1117–1123, (1998).
[Crossref]

E. K. Braun, K. V. Shenoy, C. G. Fonstad, and J. M. Mikkelson, “Elevated Temperature Stability of GaAs Digital Integrated Circuits,” IEEE Electron Device Let. 17, 37–39, (1996).
[Crossref]

D. A. Hall, B. L. Shoop, J. R. Loy, G. B. Tait, E. K. Ressler, J. F. Ahadian, and C. G. Fonstad, “Experimental demonstration of a 3×3 monolithically integrated smart pixel array based on Epitaxy-on-Electronics technology,” Postdeadline Paper in OSA Annual Meeting Technical Digest, (Optical Society of America, Washington, D.C., 1997).

Goodhus, W. D.

J. F. Ahadian, P. T. Vaidyanathan, S. G. Patterson, Y. Royter, D. Mull, G. S. Petrich, W. D. Goodhus, S. Prasad, L. A. Kolodziejski, and C. G. Fonstad, “Practical OEIC’s based on monolithic integration of GaAs-InGaP LED’s with commercial GaAs VLSI electronics,” IEEE J. Quant. Elect. 34, 1117–1123, (1998).
[Crossref]

Hall, D. A.

B. L. Shoop, A. H. Sayles, D. A. Hall, and E. K. Ressler, “A smart pixel implementation of an error diffusion neural network for digital halftoning,” Invited Paper in Special Issue of International Journal of Optoelectronics on Smart Pixels  11, 217–228, (1997).

D. A. Hall, B. L. Shoop, G. P. Dudevoir, and A. H. Sayles, “Experimental demonstration of a 3×3 liquid crystal on silicon smart pixel array for digital image halftoning,” in OSA Annual Meeting Technical Digest (Optical Society of America, Washington, D.C., 1998).

D. A. Hall, A. H. Sayles, G. P. Dudevoir, R. W. Sadowski, and B.L. Shoop, “Experimental demonstration of a 5×5 smart pixel neural array for digital image halftoning,” Postdeadline Paper in OSA Annual Meeting Technical Digest, (Optical Society of America, Washington, D.C., 1998).

D. A. Hall, B. L. Shoop, J. R. Loy, G. B. Tait, E. K. Ressler, J. F. Ahadian, and C. G. Fonstad, “Experimental demonstration of a 3×3 monolithically integrated smart pixel array based on Epitaxy-on-Electronics technology,” Postdeadline Paper in OSA Annual Meeting Technical Digest, (Optical Society of America, Washington, D.C., 1997).

Kolodziejski, L. A.

J. F. Ahadian, P. T. Vaidyanathan, S. G. Patterson, Y. Royter, D. Mull, G. S. Petrich, W. D. Goodhus, S. Prasad, L. A. Kolodziejski, and C. G. Fonstad, “Practical OEIC’s based on monolithic integration of GaAs-InGaP LED’s with commercial GaAs VLSI electronics,” IEEE J. Quant. Elect. 34, 1117–1123, (1998).
[Crossref]

Loy, J. R.

D. A. Hall, B. L. Shoop, J. R. Loy, G. B. Tait, E. K. Ressler, J. F. Ahadian, and C. G. Fonstad, “Experimental demonstration of a 3×3 monolithically integrated smart pixel array based on Epitaxy-on-Electronics technology,” Postdeadline Paper in OSA Annual Meeting Technical Digest, (Optical Society of America, Washington, D.C., 1997).

Mikkelson, J. M.

E. K. Braun, K. V. Shenoy, C. G. Fonstad, and J. M. Mikkelson, “Elevated Temperature Stability of GaAs Digital Integrated Circuits,” IEEE Electron Device Let. 17, 37–39, (1996).
[Crossref]

Mull, D.

J. F. Ahadian, P. T. Vaidyanathan, S. G. Patterson, Y. Royter, D. Mull, G. S. Petrich, W. D. Goodhus, S. Prasad, L. A. Kolodziejski, and C. G. Fonstad, “Practical OEIC’s based on monolithic integration of GaAs-InGaP LED’s with commercial GaAs VLSI electronics,” IEEE J. Quant. Elect. 34, 1117–1123, (1998).
[Crossref]

Patterson, S. G.

J. F. Ahadian, P. T. Vaidyanathan, S. G. Patterson, Y. Royter, D. Mull, G. S. Petrich, W. D. Goodhus, S. Prasad, L. A. Kolodziejski, and C. G. Fonstad, “Practical OEIC’s based on monolithic integration of GaAs-InGaP LED’s with commercial GaAs VLSI electronics,” IEEE J. Quant. Elect. 34, 1117–1123, (1998).
[Crossref]

Petrich, G. S.

J. F. Ahadian, P. T. Vaidyanathan, S. G. Patterson, Y. Royter, D. Mull, G. S. Petrich, W. D. Goodhus, S. Prasad, L. A. Kolodziejski, and C. G. Fonstad, “Practical OEIC’s based on monolithic integration of GaAs-InGaP LED’s with commercial GaAs VLSI electronics,” IEEE J. Quant. Elect. 34, 1117–1123, (1998).
[Crossref]

Prasad, S.

J. F. Ahadian, P. T. Vaidyanathan, S. G. Patterson, Y. Royter, D. Mull, G. S. Petrich, W. D. Goodhus, S. Prasad, L. A. Kolodziejski, and C. G. Fonstad, “Practical OEIC’s based on monolithic integration of GaAs-InGaP LED’s with commercial GaAs VLSI electronics,” IEEE J. Quant. Elect. 34, 1117–1123, (1998).
[Crossref]

Ressler, E. K.

B. L. Shoop, A. H. Sayles, D. A. Hall, and E. K. Ressler, “A smart pixel implementation of an error diffusion neural network for digital halftoning,” Invited Paper in Special Issue of International Journal of Optoelectronics on Smart Pixels  11, 217–228, (1997).

B. L. Shoop and E. K. Ressler, “An error diffusion neural network for digital image halftoning,” Proc. of the IEEE Workshop on Neural Networks, (Institute of Electrical and Electronics Engineers, Signal Processing Society and Neural Networks Council, Boston, Massachusetts) 427–436 (1995).

E. K. Ressler and B. L. Shoop, “High quality digital halftones from error diffusion networks, ” Proc. of the Society for Information Display, (San Diego, California) 506–509 (1996).

D. A. Hall, B. L. Shoop, J. R. Loy, G. B. Tait, E. K. Ressler, J. F. Ahadian, and C. G. Fonstad, “Experimental demonstration of a 3×3 monolithically integrated smart pixel array based on Epitaxy-on-Electronics technology,” Postdeadline Paper in OSA Annual Meeting Technical Digest, (Optical Society of America, Washington, D.C., 1997).

Royter, Y.

J. F. Ahadian, P. T. Vaidyanathan, S. G. Patterson, Y. Royter, D. Mull, G. S. Petrich, W. D. Goodhus, S. Prasad, L. A. Kolodziejski, and C. G. Fonstad, “Practical OEIC’s based on monolithic integration of GaAs-InGaP LED’s with commercial GaAs VLSI electronics,” IEEE J. Quant. Elect. 34, 1117–1123, (1998).
[Crossref]

Sadowski, R. W.

D. A. Hall, A. H. Sayles, G. P. Dudevoir, R. W. Sadowski, and B.L. Shoop, “Experimental demonstration of a 5×5 smart pixel neural array for digital image halftoning,” Postdeadline Paper in OSA Annual Meeting Technical Digest, (Optical Society of America, Washington, D.C., 1998).

Sayles, A. H.

B. L. Shoop, A. H. Sayles, D. A. Hall, and E. K. Ressler, “A smart pixel implementation of an error diffusion neural network for digital halftoning,” Invited Paper in Special Issue of International Journal of Optoelectronics on Smart Pixels  11, 217–228, (1997).

D. A. Hall, A. H. Sayles, G. P. Dudevoir, R. W. Sadowski, and B.L. Shoop, “Experimental demonstration of a 5×5 smart pixel neural array for digital image halftoning,” Postdeadline Paper in OSA Annual Meeting Technical Digest, (Optical Society of America, Washington, D.C., 1998).

D. A. Hall, B. L. Shoop, G. P. Dudevoir, and A. H. Sayles, “Experimental demonstration of a 3×3 liquid crystal on silicon smart pixel array for digital image halftoning,” in OSA Annual Meeting Technical Digest (Optical Society of America, Washington, D.C., 1998).

Shenoy, K. V.

E. K. Braun, K. V. Shenoy, C. G. Fonstad, and J. M. Mikkelson, “Elevated Temperature Stability of GaAs Digital Integrated Circuits,” IEEE Electron Device Let. 17, 37–39, (1996).
[Crossref]

Shoop, B. L.

B. L. Shoop, A. H. Sayles, D. A. Hall, and E. K. Ressler, “A smart pixel implementation of an error diffusion neural network for digital halftoning,” Invited Paper in Special Issue of International Journal of Optoelectronics on Smart Pixels  11, 217–228, (1997).

B. L. Shoop and E. K. Ressler, “An error diffusion neural network for digital image halftoning,” Proc. of the IEEE Workshop on Neural Networks, (Institute of Electrical and Electronics Engineers, Signal Processing Society and Neural Networks Council, Boston, Massachusetts) 427–436 (1995).

E. K. Ressler and B. L. Shoop, “High quality digital halftones from error diffusion networks, ” Proc. of the Society for Information Display, (San Diego, California) 506–509 (1996).

D. A. Hall, B. L. Shoop, G. P. Dudevoir, and A. H. Sayles, “Experimental demonstration of a 3×3 liquid crystal on silicon smart pixel array for digital image halftoning,” in OSA Annual Meeting Technical Digest (Optical Society of America, Washington, D.C., 1998).

D. A. Hall, B. L. Shoop, J. R. Loy, G. B. Tait, E. K. Ressler, J. F. Ahadian, and C. G. Fonstad, “Experimental demonstration of a 3×3 monolithically integrated smart pixel array based on Epitaxy-on-Electronics technology,” Postdeadline Paper in OSA Annual Meeting Technical Digest, (Optical Society of America, Washington, D.C., 1997).

Shoop, B.L.

D. A. Hall, A. H. Sayles, G. P. Dudevoir, R. W. Sadowski, and B.L. Shoop, “Experimental demonstration of a 5×5 smart pixel neural array for digital image halftoning,” Postdeadline Paper in OSA Annual Meeting Technical Digest, (Optical Society of America, Washington, D.C., 1998).

Steinberg, L.

R. Floyd and L. Steinberg, “An adaptive algorithm for spatial gray scale,” SID 75 Digest35–36, (1975).

Tait, G. B.

D. A. Hall, B. L. Shoop, J. R. Loy, G. B. Tait, E. K. Ressler, J. F. Ahadian, and C. G. Fonstad, “Experimental demonstration of a 3×3 monolithically integrated smart pixel array based on Epitaxy-on-Electronics technology,” Postdeadline Paper in OSA Annual Meeting Technical Digest, (Optical Society of America, Washington, D.C., 1997).

Vaidyanathan, P. T.

J. F. Ahadian, P. T. Vaidyanathan, S. G. Patterson, Y. Royter, D. Mull, G. S. Petrich, W. D. Goodhus, S. Prasad, L. A. Kolodziejski, and C. G. Fonstad, “Practical OEIC’s based on monolithic integration of GaAs-InGaP LED’s with commercial GaAs VLSI electronics,” IEEE J. Quant. Elect. 34, 1117–1123, (1998).
[Crossref]

IEEE Electron Device Let. (1)

E. K. Braun, K. V. Shenoy, C. G. Fonstad, and J. M. Mikkelson, “Elevated Temperature Stability of GaAs Digital Integrated Circuits,” IEEE Electron Device Let. 17, 37–39, (1996).
[Crossref]

IEEE J. Quant. Elect. (1)

J. F. Ahadian, P. T. Vaidyanathan, S. G. Patterson, Y. Royter, D. Mull, G. S. Petrich, W. D. Goodhus, S. Prasad, L. A. Kolodziejski, and C. G. Fonstad, “Practical OEIC’s based on monolithic integration of GaAs-InGaP LED’s with commercial GaAs VLSI electronics,” IEEE J. Quant. Elect. 34, 1117–1123, (1998).
[Crossref]

Opt. Eng. (1)

J. F. Ahadian and C .G. Fonstad, “The Epitaxy-on-Electronics technology for monolithic optoelectronic integration: foundations, development, and status,” Opt. Eng. 37, 3161–3174 (1998).
[Crossref]

SID 75 Digest (1)

R. Floyd and L. Steinberg, “An adaptive algorithm for spatial gray scale,” SID 75 Digest35–36, (1975).

Other (8)

B. L. Shoop and E. K. Ressler, “An error diffusion neural network for digital image halftoning,” Proc. of the IEEE Workshop on Neural Networks, (Institute of Electrical and Electronics Engineers, Signal Processing Society and Neural Networks Council, Boston, Massachusetts) 427–436 (1995).

E. K. Ressler and B. L. Shoop, “High quality digital halftones from error diffusion networks, ” Proc. of the Society for Information Display, (San Diego, California) 506–509 (1996).

B. L. Shoop, A. H. Sayles, D. A. Hall, and E. K. Ressler, “A smart pixel implementation of an error diffusion neural network for digital halftoning,” Invited Paper in Special Issue of International Journal of Optoelectronics on Smart Pixels  11, 217–228, (1997).

D. A. Hall, A. H. Sayles, G. P. Dudevoir, R. W. Sadowski, and B.L. Shoop, “Experimental demonstration of a 5×5 smart pixel neural array for digital image halftoning,” Postdeadline Paper in OSA Annual Meeting Technical Digest, (Optical Society of America, Washington, D.C., 1998).

D. A. Hall, B. L. Shoop, G. P. Dudevoir, and A. H. Sayles, “Experimental demonstration of a 3×3 liquid crystal on silicon smart pixel array for digital image halftoning,” in OSA Annual Meeting Technical Digest (Optical Society of America, Washington, D.C., 1998).

D. A. Hall, B. L. Shoop, J. R. Loy, G. B. Tait, E. K. Ressler, J. F. Ahadian, and C. G. Fonstad, “Experimental demonstration of a 3×3 monolithically integrated smart pixel array based on Epitaxy-on-Electronics technology,” Postdeadline Paper in OSA Annual Meeting Technical Digest, (Optical Society of America, Washington, D.C., 1997).

Photonics Research Center, U.S. Military Academy, http://www.eecs.usma.edu/photonic/default.html

Compound Semiconductor Materials and Devices Research Group, Massachusetts Institute of Technology, http://web.mit.edu/fonstad/www/group.html

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Figures (8)

Fig. 1.
Fig. 1.

Photomicrograph of OPTOCHIP, a proof-of-concept smart pixel implementation of a 3×3 neural array.

Fig. 2.
Fig. 2.

Photomicrograph of a single neuron on OPTOCHIP displaying the three neural components: 1) the detector circuit, 2) the quantizer circuit, and 3) the LED with its driver circuit.

Fig. 3.
Fig. 3.

Circuit schematic of a neuron on OPTOCHIP. Darkened transistors are depletion-mode MESFETS. All others are enhancement-mode MESFETS.

Fig. 4.
Fig. 4.

Pre-EoE detector performance curves (Chip #E1).

Fig. 5.
Fig. 5.

Post-EoE detector performance curves (Chip #816).

Fig. 6.
Fig. 6.

(a) Illustration of the layers of the InGaP LED structure grown by EoE, (b) Scanning electron micrograph of a completed LED, and (c) Photomicrograph of an operating LED.

Fig. 7.
Fig. 7.

L-I curves for eighteen LEDs from Chips #815 and #816.

Fig. 8.
Fig. 8.

Spectral curves for the LED on Chip #815, Neuron #6, at three different power settings.

Metrics