Abstract

Integration of active electronics into photonic systems is necessary for large-scale photonic integration. While heterogeneous integration leverages high-performance electronics, a monolithic scheme can coexist by aiding the electronic processing, improving overall efficiency. We report a lateral bipolar junction transistor on a commercial silicon photonics foundry process. We achieved a DC current gain of 10 with a Darlington configuration, and using measured S-parameters for a single BJT, the available AC gain was at least 3dB for signal frequencies up to 1.1 GHz. Our single BJT demonstrated a transimpedance of 3.2mS/μm, which is about 70 times better than existing literature.

© 2020 Optical Society of America under the terms of the OSA Open Access Publishing Agreement

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References

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2018 (2)

S. Kaushal, R. Cheng, M. Ma, A. Mistry, M. Burla, L. Chrostowski, and J. Azaña, “Optical signal processing based on silicon photonics waveguide bragg gratings,” Front. Optoelectron. 11(2), 163–188 (2018).
[Crossref]

V. Stojanović, R. J. Ram, M. Popović, S. Lin, S. Moazeni, M. Wade, C. Sun, L. Alloatti, A. Atabaki, F. Pavanello, N. Mehta, and P. Bhargava, “Monolithic silicon-photonic platforms in state-of-the-art cmos soi processes,” Opt. Express 26(10), 13106–13121 (2018).
[Crossref]

2017 (1)

A. N. Tait, T. F. De Lima, E. Zhou, A. X. Wu, M. A. Nahmias, B. J. Shastri, and P. R. Prucnal, “Neuromorphic photonic networks using silicon photonic weight banks,” Sci. Rep. 7(1), 7430 (2017).
[Crossref]

2015 (1)

2014 (3)

G. Yurtsever, B. Považay, A. Alex, B. Zabihian, W. Drexler, and R. Baets, “Photonic integrated mach-zehnder interferometer with an on-chip reference arm for optical coherence tomography,” Biomed. Opt. Express 5(4), 1050–1061 (2014).
[Crossref]

A. Novack, R. Shi, M. Streshinsky, J. Tao, K. Tan, A. E.-J. Lim, G.-Q. Lo, T. Baehr-Jones, and M. Hochberg, “Monothically integrated mesfet devices on a high-speed silicon photonics platform,” J. Lightwave Technol. 32(22), 4345–4348 (2014).
[Crossref]

R. W. Going, J. Loo, T.-J. K. Liu, and M. C. Wu, “Germanium gate photomosfet integrated to silicon photonics,” IEEE J. Sel. Top. Quantum Electron. 20(4), 1–7 (2014).
[Crossref]

2012 (1)

Y. A. Vlasov, “Silicon cmos-integrated nano-photonics for computer and data communications beyond 100g,” IEEE Commun. Mag. 50(2), s67–s72 (2012).
[Crossref]

2009 (1)

2008 (1)

2006 (1)

C. Gunn, “Cmos photonics for high-speed interconnects,” IEEE Micro 26(2), 58–66 (2006).
[Crossref]

Abbaslou, S.

C. Huang, T. F. De Lima, A. Jha, S. Abbaslou, B. J. Shastri, and P. R. Prucnal, “Giant enhancement in signal contrast using integrated all-optical nonlinear thresholder,” in 2019 Optical Fiber Communications Conference and Exhibition (OFC), (IEEE, 2019), pp. 1–3.

T. F. de Lima, A. N. Tait, H. Saeidi, M. A. Nahmias, H.-T. Peng, S. Abbaslou, B. J. Shastri, and P. R. Prucnal, “Noise analysis of photonic modulator neurons,” arXiv preprint arXiv:1907.07325 (2019).

Alex, A.

Alloatti, L.

Armijo, G.

P. De Dobbelaere, A. Dahl, A. Mekis, B. Chase, B. Weber, B. Welch, D. Foltz, G. Armijo, G. Masini, and G. McGee, “Advanced silicon photonics technology platform leveraging a semiconductor supply chain,” in 2017 IEEE International Electron Devices Meeting (IEDM), (IEEE, 2017), pp. 34–1.

Asghari, M.

Atabaki, A.

Ayazi, A.

F. Boeuf, S. Crémer, N. Vulliet, T. Pinguet, A. Mekis, G. Masini, L. Verslegers, P. Sun, A. Ayazi, and N.-K. Hon, “A multi-wavelength 3d-compatible silicon photonics platform on 300mm soi wafers for 25gb/s applications,” in 2013 IEEE International Electron Devices Meeting, (IEEE, 2013), pp. 13–3.

T. Baehr-Jones, R. Ding, A. Ayazi, T. Pinguet, M. Streshinsky, N. Harris, J. Li, L. He, M. Gould, and Y. Zhang, “A 25 gb/s silicon photonics platform,” arXiv preprint arXiv:1203.0767 (2012).

Azaña, J.

S. Kaushal, R. Cheng, M. Ma, A. Mistry, M. Burla, L. Chrostowski, and J. Azaña, “Optical signal processing based on silicon photonics waveguide bragg gratings,” Front. Optoelectron. 11(2), 163–188 (2018).
[Crossref]

Baehr-Jones, T.

A. Novack, R. Shi, M. Streshinsky, J. Tao, K. Tan, A. E.-J. Lim, G.-Q. Lo, T. Baehr-Jones, and M. Hochberg, “Monothically integrated mesfet devices on a high-speed silicon photonics platform,” J. Lightwave Technol. 32(22), 4345–4348 (2014).
[Crossref]

T. Baehr-Jones, R. Ding, A. Ayazi, T. Pinguet, M. Streshinsky, N. Harris, J. Li, L. He, M. Gould, and Y. Zhang, “A 25 gb/s silicon photonics platform,” arXiv preprint arXiv:1203.0767 (2012).

Baets, R.

Bhargava, P.

Boeuf, F.

F. Boeuf, S. Crémer, N. Vulliet, T. Pinguet, A. Mekis, G. Masini, L. Verslegers, P. Sun, A. Ayazi, and N.-K. Hon, “A multi-wavelength 3d-compatible silicon photonics platform on 300mm soi wafers for 25gb/s applications,” in 2013 IEEE International Electron Devices Meeting, (IEEE, 2013), pp. 13–3.

Burla, M.

S. Kaushal, R. Cheng, M. Ma, A. Mistry, M. Burla, L. Chrostowski, and J. Azaña, “Optical signal processing based on silicon photonics waveguide bragg gratings,” Front. Optoelectron. 11(2), 163–188 (2018).
[Crossref]

Chase, B.

P. De Dobbelaere, A. Dahl, A. Mekis, B. Chase, B. Weber, B. Welch, D. Foltz, G. Armijo, G. Masini, and G. McGee, “Advanced silicon photonics technology platform leveraging a semiconductor supply chain,” in 2017 IEEE International Electron Devices Meeting (IEDM), (IEEE, 2017), pp. 34–1.

Chen, L.

Cheng, R.

S. Kaushal, R. Cheng, M. Ma, A. Mistry, M. Burla, L. Chrostowski, and J. Azaña, “Optical signal processing based on silicon photonics waveguide bragg gratings,” Front. Optoelectron. 11(2), 163–188 (2018).
[Crossref]

Chrostowski, L.

S. Kaushal, R. Cheng, M. Ma, A. Mistry, M. Burla, L. Chrostowski, and J. Azaña, “Optical signal processing based on silicon photonics waveguide bragg gratings,” Front. Optoelectron. 11(2), 163–188 (2018).
[Crossref]

Coolbaugh, D. D.

E. Timurdogan, Z. Su, K. Settaluri, S. Lin, S. Moazeni, C. Sun, G. Leake, D. D. Coolbaugh, B. R. Moss, M. Moresco, V. Stojanović, and M. R. Watts, “An ultra low power 3d integrated intra-chip silicon electronic-photonic link,” in Optical Fiber Communication Conference, (Optical Society of America, 2015), pp. Th5B–8.

Crémer, S.

F. Boeuf, S. Crémer, N. Vulliet, T. Pinguet, A. Mekis, G. Masini, L. Verslegers, P. Sun, A. Ayazi, and N.-K. Hon, “A multi-wavelength 3d-compatible silicon photonics platform on 300mm soi wafers for 25gb/s applications,” in 2013 IEEE International Electron Devices Meeting, (IEEE, 2013), pp. 13–3.

Dahl, A.

P. De Dobbelaere, A. Dahl, A. Mekis, B. Chase, B. Weber, B. Welch, D. Foltz, G. Armijo, G. Masini, and G. McGee, “Advanced silicon photonics technology platform leveraging a semiconductor supply chain,” in 2017 IEEE International Electron Devices Meeting (IEDM), (IEEE, 2017), pp. 34–1.

De Dobbelaere, P.

P. De Dobbelaere, A. Dahl, A. Mekis, B. Chase, B. Weber, B. Welch, D. Foltz, G. Armijo, G. Masini, and G. McGee, “Advanced silicon photonics technology platform leveraging a semiconductor supply chain,” in 2017 IEEE International Electron Devices Meeting (IEDM), (IEEE, 2017), pp. 34–1.

de Lima, T.

T. de Lima and A. Tait, “Lightlab – laboratory instrumentation and automation,” https://github.com/lightwave-lab/lightlab (2018).

De Lima, T. F.

A. N. Tait, T. F. De Lima, E. Zhou, A. X. Wu, M. A. Nahmias, B. J. Shastri, and P. R. Prucnal, “Neuromorphic photonic networks using silicon photonic weight banks,” Sci. Rep. 7(1), 7430 (2017).
[Crossref]

C. Huang, T. F. De Lima, A. Jha, S. Abbaslou, B. J. Shastri, and P. R. Prucnal, “Giant enhancement in signal contrast using integrated all-optical nonlinear thresholder,” in 2019 Optical Fiber Communications Conference and Exhibition (OFC), (IEEE, 2019), pp. 1–3.

T. F. de Lima, A. N. Tait, H. Saeidi, M. A. Nahmias, H.-T. Peng, S. Abbaslou, B. J. Shastri, and P. R. Prucnal, “Noise analysis of photonic modulator neurons,” arXiv preprint arXiv:1907.07325 (2019).

Ding, R.

T. Baehr-Jones, R. Ding, A. Ayazi, T. Pinguet, M. Streshinsky, N. Harris, J. Li, L. He, M. Gould, and Y. Zhang, “A 25 gb/s silicon photonics platform,” arXiv preprint arXiv:1203.0767 (2012).

Dong, P.

Drexler, W.

Feng, D.

Foltz, D.

P. De Dobbelaere, A. Dahl, A. Mekis, B. Chase, B. Weber, B. Welch, D. Foltz, G. Armijo, G. Masini, and G. McGee, “Advanced silicon photonics technology platform leveraging a semiconductor supply chain,” in 2017 IEEE International Electron Devices Meeting (IEDM), (IEEE, 2017), pp. 34–1.

Fujikata, J.

Georgas, M.

M. Georgas, “Optical receiver techniques for integrated photonic links,” (2014).

Going, R. W.

R. W. Going, J. Loo, T.-J. K. Liu, and M. C. Wu, “Germanium gate photomosfet integrated to silicon photonics,” IEEE J. Sel. Top. Quantum Electron. 20(4), 1–7 (2014).
[Crossref]

Gould, M.

T. Baehr-Jones, R. Ding, A. Ayazi, T. Pinguet, M. Streshinsky, N. Harris, J. Li, L. He, M. Gould, and Y. Zhang, “A 25 gb/s silicon photonics platform,” arXiv preprint arXiv:1203.0767 (2012).

Gunn, C.

C. Gunn, “Cmos photonics for high-speed interconnects,” IEEE Micro 26(2), 58–66 (2006).
[Crossref]

Guo, X.

Y. Zhang, Y. He, H. Zhou, Z. Xu, X. Jiang, X. Guo, C. Qiu, and Y. Su, “Silicon photonic devices for optical signal processing in wavelength, polarization and mode domains,” in Conference on Lasers and Electro-Optics/Pacific Rim, (Optical Society of America, 2018), pp. Th2C–1.

Hagihara, Y.

Harris, N.

T. Baehr-Jones, R. Ding, A. Ayazi, T. Pinguet, M. Streshinsky, N. Harris, J. Li, L. He, M. Gould, and Y. Zhang, “A 25 gb/s silicon photonics platform,” arXiv preprint arXiv:1203.0767 (2012).

He, L.

T. Baehr-Jones, R. Ding, A. Ayazi, T. Pinguet, M. Streshinsky, N. Harris, J. Li, L. He, M. Gould, and Y. Zhang, “A 25 gb/s silicon photonics platform,” arXiv preprint arXiv:1203.0767 (2012).

He, Y.

Y. Zhang, Y. He, H. Zhou, Z. Xu, X. Jiang, X. Guo, C. Qiu, and Y. Su, “Silicon photonic devices for optical signal processing in wavelength, polarization and mode domains,” in Conference on Lasers and Electro-Optics/Pacific Rim, (Optical Society of America, 2018), pp. Th2C–1.

Heinemann, B.

L. Zimmermann, D. Knoll, S. Lischke, D. Petousi, M. Kroh, G. Winzer, B. Heinemann, P. Ostrovskyy, D. Micusik, and M. Lisker, “Monolithic integration of photonic devices in sige bicmos,” in 11th International Conference on Group IV Photonics (GFP), (IEEE, 2014), pp. 102–103.

Hochberg, M.

A. Novack, R. Shi, M. Streshinsky, J. Tao, K. Tan, A. E.-J. Lim, G.-Q. Lo, T. Baehr-Jones, and M. Hochberg, “Monothically integrated mesfet devices on a high-speed silicon photonics platform,” J. Lightwave Technol. 32(22), 4345–4348 (2014).
[Crossref]

Hon, N.-K.

F. Boeuf, S. Crémer, N. Vulliet, T. Pinguet, A. Mekis, G. Masini, L. Verslegers, P. Sun, A. Ayazi, and N.-K. Hon, “A multi-wavelength 3d-compatible silicon photonics platform on 300mm soi wafers for 25gb/s applications,” in 2013 IEEE International Electron Devices Meeting, (IEEE, 2013), pp. 13–3.

Huang, C.

C. Huang, T. F. De Lima, A. Jha, S. Abbaslou, B. J. Shastri, and P. R. Prucnal, “Giant enhancement in signal contrast using integrated all-optical nonlinear thresholder,” in 2019 Optical Fiber Communications Conference and Exhibition (OFC), (IEEE, 2019), pp. 1–3.

Inasaka, J.

Jha, A.

C. Huang, T. F. De Lima, A. Jha, S. Abbaslou, B. J. Shastri, and P. R. Prucnal, “Giant enhancement in signal contrast using integrated all-optical nonlinear thresholder,” in 2019 Optical Fiber Communications Conference and Exhibition (OFC), (IEEE, 2019), pp. 1–3.

Jiang, X.

Y. Zhang, Y. He, H. Zhou, Z. Xu, X. Jiang, X. Guo, C. Qiu, and Y. Su, “Silicon photonic devices for optical signal processing in wavelength, polarization and mode domains,” in Conference on Lasers and Electro-Optics/Pacific Rim, (Optical Society of America, 2018), pp. Th2C–1.

Kaushal, S.

S. Kaushal, R. Cheng, M. Ma, A. Mistry, M. Burla, L. Chrostowski, and J. Azaña, “Optical signal processing based on silicon photonics waveguide bragg gratings,” Front. Optoelectron. 11(2), 163–188 (2018).
[Crossref]

Knoll, D.

L. Zimmermann, D. Knoll, S. Lischke, D. Petousi, M. Kroh, G. Winzer, B. Heinemann, P. Ostrovskyy, D. Micusik, and M. Lisker, “Monolithic integration of photonic devices in sige bicmos,” in 11th International Conference on Group IV Photonics (GFP), (IEEE, 2014), pp. 102–103.

Kohno, Y.

Y. Kohno, K. Komatsu, Y. Ozeki, Y. Nakano, and T. Tanemura, “Large-scale silicon photonic phased array chip for single-pixel ghost imaging,” in Optical Fiber Communication Conference, (Optical Society of America, 2019), pp. M4E–2.

Komatsu, K.

Y. Kohno, K. Komatsu, Y. Ozeki, Y. Nakano, and T. Tanemura, “Large-scale silicon photonic phased array chip for single-pixel ghost imaging,” in Optical Fiber Communication Conference, (Optical Society of America, 2019), pp. M4E–2.

Krishnamoorthy, A.V.

Kroh, M.

L. Zimmermann, D. Knoll, S. Lischke, D. Petousi, M. Kroh, G. Winzer, B. Heinemann, P. Ostrovskyy, D. Micusik, and M. Lisker, “Monolithic integration of photonic devices in sige bicmos,” in 11th International Conference on Group IV Photonics (GFP), (IEEE, 2014), pp. 102–103.

Kung, C.-C.

Kurata, K.

Kurihara, M.

Leake, G.

E. Timurdogan, Z. Su, K. Settaluri, S. Lin, S. Moazeni, C. Sun, G. Leake, D. D. Coolbaugh, B. R. Moss, M. Moresco, V. Stojanović, and M. R. Watts, “An ultra low power 3d integrated intra-chip silicon electronic-photonic link,” in Optical Fiber Communication Conference, (Optical Society of America, 2015), pp. Th5B–8.

Li, G.

Li, J.

T. Baehr-Jones, R. Ding, A. Ayazi, T. Pinguet, M. Streshinsky, N. Harris, J. Li, L. He, M. Gould, and Y. Zhang, “A 25 gb/s silicon photonics platform,” arXiv preprint arXiv:1203.0767 (2012).

Li, S.

S. Li, N. G. Tarr, and N. Y. Winnie, “Monolithic integration of soi waveguide photodetectors and transimpedance amplifiers,” in Silicon Photonics XIII, vol. 10537 (International Society for Optics and Photonics, 2018), p. 105371M.

Liang, H.

Liao, S.

Lim, A. E.-J.

A. Novack, R. Shi, M. Streshinsky, J. Tao, K. Tan, A. E.-J. Lim, G.-Q. Lo, T. Baehr-Jones, and M. Hochberg, “Monothically integrated mesfet devices on a high-speed silicon photonics platform,” J. Lightwave Technol. 32(22), 4345–4348 (2014).
[Crossref]

Lin, S.

V. Stojanović, R. J. Ram, M. Popović, S. Lin, S. Moazeni, M. Wade, C. Sun, L. Alloatti, A. Atabaki, F. Pavanello, N. Mehta, and P. Bhargava, “Monolithic silicon-photonic platforms in state-of-the-art cmos soi processes,” Opt. Express 26(10), 13106–13121 (2018).
[Crossref]

E. Timurdogan, Z. Su, K. Settaluri, S. Lin, S. Moazeni, C. Sun, G. Leake, D. D. Coolbaugh, B. R. Moss, M. Moresco, V. Stojanović, and M. R. Watts, “An ultra low power 3d integrated intra-chip silicon electronic-photonic link,” in Optical Fiber Communication Conference, (Optical Society of America, 2015), pp. Th5B–8.

Lipson, M.

Lischke, S.

L. Zimmermann, D. Knoll, S. Lischke, D. Petousi, M. Kroh, G. Winzer, B. Heinemann, P. Ostrovskyy, D. Micusik, and M. Lisker, “Monolithic integration of photonic devices in sige bicmos,” in 11th International Conference on Group IV Photonics (GFP), (IEEE, 2014), pp. 102–103.

Lisker, M.

L. Zimmermann, D. Knoll, S. Lischke, D. Petousi, M. Kroh, G. Winzer, B. Heinemann, P. Ostrovskyy, D. Micusik, and M. Lisker, “Monolithic integration of photonic devices in sige bicmos,” in 11th International Conference on Group IV Photonics (GFP), (IEEE, 2014), pp. 102–103.

Liu, T.-J. K.

R. W. Going, J. Loo, T.-J. K. Liu, and M. C. Wu, “Germanium gate photomosfet integrated to silicon photonics,” IEEE J. Sel. Top. Quantum Electron. 20(4), 1–7 (2014).
[Crossref]

Lo, G.-Q.

A. Novack, R. Shi, M. Streshinsky, J. Tao, K. Tan, A. E.-J. Lim, G.-Q. Lo, T. Baehr-Jones, and M. Hochberg, “Monothically integrated mesfet devices on a high-speed silicon photonics platform,” J. Lightwave Technol. 32(22), 4345–4348 (2014).
[Crossref]

Loo, J.

R. W. Going, J. Loo, T.-J. K. Liu, and M. C. Wu, “Germanium gate photomosfet integrated to silicon photonics,” IEEE J. Sel. Top. Quantum Electron. 20(4), 1–7 (2014).
[Crossref]

Ma, M.

S. Kaushal, R. Cheng, M. Ma, A. Mistry, M. Burla, L. Chrostowski, and J. Azaña, “Optical signal processing based on silicon photonics waveguide bragg gratings,” Front. Optoelectron. 11(2), 163–188 (2018).
[Crossref]

Masini, G.

F. Boeuf, S. Crémer, N. Vulliet, T. Pinguet, A. Mekis, G. Masini, L. Verslegers, P. Sun, A. Ayazi, and N.-K. Hon, “A multi-wavelength 3d-compatible silicon photonics platform on 300mm soi wafers for 25gb/s applications,” in 2013 IEEE International Electron Devices Meeting, (IEEE, 2013), pp. 13–3.

P. De Dobbelaere, A. Dahl, A. Mekis, B. Chase, B. Weber, B. Welch, D. Foltz, G. Armijo, G. Masini, and G. McGee, “Advanced silicon photonics technology platform leveraging a semiconductor supply chain,” in 2017 IEEE International Electron Devices Meeting (IEDM), (IEEE, 2017), pp. 34–1.

McGee, G.

P. De Dobbelaere, A. Dahl, A. Mekis, B. Chase, B. Weber, B. Welch, D. Foltz, G. Armijo, G. Masini, and G. McGee, “Advanced silicon photonics technology platform leveraging a semiconductor supply chain,” in 2017 IEEE International Electron Devices Meeting (IEDM), (IEEE, 2017), pp. 34–1.

Mehta, N.

Mekis, A.

P. De Dobbelaere, A. Dahl, A. Mekis, B. Chase, B. Weber, B. Welch, D. Foltz, G. Armijo, G. Masini, and G. McGee, “Advanced silicon photonics technology platform leveraging a semiconductor supply chain,” in 2017 IEEE International Electron Devices Meeting (IEDM), (IEEE, 2017), pp. 34–1.

F. Boeuf, S. Crémer, N. Vulliet, T. Pinguet, A. Mekis, G. Masini, L. Verslegers, P. Sun, A. Ayazi, and N.-K. Hon, “A multi-wavelength 3d-compatible silicon photonics platform on 300mm soi wafers for 25gb/s applications,” in 2013 IEEE International Electron Devices Meeting, (IEEE, 2013), pp. 13–3.

Micusik, D.

L. Zimmermann, D. Knoll, S. Lischke, D. Petousi, M. Kroh, G. Winzer, B. Heinemann, P. Ostrovskyy, D. Micusik, and M. Lisker, “Monolithic integration of photonic devices in sige bicmos,” in 11th International Conference on Group IV Photonics (GFP), (IEEE, 2014), pp. 102–103.

Mistry, A.

S. Kaushal, R. Cheng, M. Ma, A. Mistry, M. Burla, L. Chrostowski, and J. Azaña, “Optical signal processing based on silicon photonics waveguide bragg gratings,” Front. Optoelectron. 11(2), 163–188 (2018).
[Crossref]

Moazeni, S.

V. Stojanović, R. J. Ram, M. Popović, S. Lin, S. Moazeni, M. Wade, C. Sun, L. Alloatti, A. Atabaki, F. Pavanello, N. Mehta, and P. Bhargava, “Monolithic silicon-photonic platforms in state-of-the-art cmos soi processes,” Opt. Express 26(10), 13106–13121 (2018).
[Crossref]

E. Timurdogan, Z. Su, K. Settaluri, S. Lin, S. Moazeni, C. Sun, G. Leake, D. D. Coolbaugh, B. R. Moss, M. Moresco, V. Stojanović, and M. R. Watts, “An ultra low power 3d integrated intra-chip silicon electronic-photonic link,” in Optical Fiber Communication Conference, (Optical Society of America, 2015), pp. Th5B–8.

Moresco, M.

E. Timurdogan, Z. Su, K. Settaluri, S. Lin, S. Moazeni, C. Sun, G. Leake, D. D. Coolbaugh, B. R. Moss, M. Moresco, V. Stojanović, and M. R. Watts, “An ultra low power 3d integrated intra-chip silicon electronic-photonic link,” in Optical Fiber Communication Conference, (Optical Society of America, 2015), pp. Th5B–8.

Moss, B. R.

E. Timurdogan, Z. Su, K. Settaluri, S. Lin, S. Moazeni, C. Sun, G. Leake, D. D. Coolbaugh, B. R. Moss, M. Moresco, V. Stojanović, and M. R. Watts, “An ultra low power 3d integrated intra-chip silicon electronic-photonic link,” in Optical Fiber Communication Conference, (Optical Society of America, 2015), pp. Th5B–8.

Nahmias, M. A.

A. N. Tait, T. F. De Lima, E. Zhou, A. X. Wu, M. A. Nahmias, B. J. Shastri, and P. R. Prucnal, “Neuromorphic photonic networks using silicon photonic weight banks,” Sci. Rep. 7(1), 7430 (2017).
[Crossref]

T. F. de Lima, A. N. Tait, H. Saeidi, M. A. Nahmias, H.-T. Peng, S. Abbaslou, B. J. Shastri, and P. R. Prucnal, “Noise analysis of photonic modulator neurons,” arXiv preprint arXiv:1907.07325 (2019).

Nakano, Y.

Y. Kohno, K. Komatsu, Y. Ozeki, Y. Nakano, and T. Tanemura, “Large-scale silicon photonic phased array chip for single-pixel ghost imaging,” in Optical Fiber Communication Conference, (Optical Society of America, 2019), pp. M4E–2.

Nedachi, T.

Novack, A.

A. Novack, R. Shi, M. Streshinsky, J. Tao, K. Tan, A. E.-J. Lim, G.-Q. Lo, T. Baehr-Jones, and M. Hochberg, “Monothically integrated mesfet devices on a high-speed silicon photonics platform,” J. Lightwave Technol. 32(22), 4345–4348 (2014).
[Crossref]

Okamoto, D.

Ostrovskyy, P.

L. Zimmermann, D. Knoll, S. Lischke, D. Petousi, M. Kroh, G. Winzer, B. Heinemann, P. Ostrovskyy, D. Micusik, and M. Lisker, “Monolithic integration of photonic devices in sige bicmos,” in 11th International Conference on Group IV Photonics (GFP), (IEEE, 2014), pp. 102–103.

Ozeki, Y.

Y. Kohno, K. Komatsu, Y. Ozeki, Y. Nakano, and T. Tanemura, “Large-scale silicon photonic phased array chip for single-pixel ghost imaging,” in Optical Fiber Communication Conference, (Optical Society of America, 2019), pp. M4E–2.

Pavanello, F.

Peng, H.-T.

T. F. de Lima, A. N. Tait, H. Saeidi, M. A. Nahmias, H.-T. Peng, S. Abbaslou, B. J. Shastri, and P. R. Prucnal, “Noise analysis of photonic modulator neurons,” arXiv preprint arXiv:1907.07325 (2019).

Petousi, D.

L. Zimmermann, D. Knoll, S. Lischke, D. Petousi, M. Kroh, G. Winzer, B. Heinemann, P. Ostrovskyy, D. Micusik, and M. Lisker, “Monolithic integration of photonic devices in sige bicmos,” in 11th International Conference on Group IV Photonics (GFP), (IEEE, 2014), pp. 102–103.

Pinguet, T.

F. Boeuf, S. Crémer, N. Vulliet, T. Pinguet, A. Mekis, G. Masini, L. Verslegers, P. Sun, A. Ayazi, and N.-K. Hon, “A multi-wavelength 3d-compatible silicon photonics platform on 300mm soi wafers for 25gb/s applications,” in 2013 IEEE International Electron Devices Meeting, (IEEE, 2013), pp. 13–3.

T. Baehr-Jones, R. Ding, A. Ayazi, T. Pinguet, M. Streshinsky, N. Harris, J. Li, L. He, M. Gould, and Y. Zhang, “A 25 gb/s silicon photonics platform,” arXiv preprint arXiv:1203.0767 (2012).

Popovic, M.

Považay, B.

Prucnal, P. R.

A. N. Tait, T. F. De Lima, E. Zhou, A. X. Wu, M. A. Nahmias, B. J. Shastri, and P. R. Prucnal, “Neuromorphic photonic networks using silicon photonic weight banks,” Sci. Rep. 7(1), 7430 (2017).
[Crossref]

T. F. de Lima, A. N. Tait, H. Saeidi, M. A. Nahmias, H.-T. Peng, S. Abbaslou, B. J. Shastri, and P. R. Prucnal, “Noise analysis of photonic modulator neurons,” arXiv preprint arXiv:1907.07325 (2019).

C. Huang, T. F. De Lima, A. Jha, S. Abbaslou, B. J. Shastri, and P. R. Prucnal, “Giant enhancement in signal contrast using integrated all-optical nonlinear thresholder,” in 2019 Optical Fiber Communications Conference and Exhibition (OFC), (IEEE, 2019), pp. 1–3.

Qian, W.

Qiu, C.

Y. Zhang, Y. He, H. Zhou, Z. Xu, X. Jiang, X. Guo, C. Qiu, and Y. Su, “Silicon photonic devices for optical signal processing in wavelength, polarization and mode domains,” in Conference on Lasers and Electro-Optics/Pacific Rim, (Optical Society of America, 2018), pp. Th2C–1.

Ram, R. J.

Robinson, J. T.

Saeidi, H.

T. F. de Lima, A. N. Tait, H. Saeidi, M. A. Nahmias, H.-T. Peng, S. Abbaslou, B. J. Shastri, and P. R. Prucnal, “Noise analysis of photonic modulator neurons,” arXiv preprint arXiv:1907.07325 (2019).

Settaluri, K.

E. Timurdogan, Z. Su, K. Settaluri, S. Lin, S. Moazeni, C. Sun, G. Leake, D. D. Coolbaugh, B. R. Moss, M. Moresco, V. Stojanović, and M. R. Watts, “An ultra low power 3d integrated intra-chip silicon electronic-photonic link,” in Optical Fiber Communication Conference, (Optical Society of America, 2015), pp. Th5B–8.

Shafiiha, R.

Shastri, B. J.

A. N. Tait, T. F. De Lima, E. Zhou, A. X. Wu, M. A. Nahmias, B. J. Shastri, and P. R. Prucnal, “Neuromorphic photonic networks using silicon photonic weight banks,” Sci. Rep. 7(1), 7430 (2017).
[Crossref]

T. F. de Lima, A. N. Tait, H. Saeidi, M. A. Nahmias, H.-T. Peng, S. Abbaslou, B. J. Shastri, and P. R. Prucnal, “Noise analysis of photonic modulator neurons,” arXiv preprint arXiv:1907.07325 (2019).

C. Huang, T. F. De Lima, A. Jha, S. Abbaslou, B. J. Shastri, and P. R. Prucnal, “Giant enhancement in signal contrast using integrated all-optical nonlinear thresholder,” in 2019 Optical Fiber Communications Conference and Exhibition (OFC), (IEEE, 2019), pp. 1–3.

Shi, R.

A. Novack, R. Shi, M. Streshinsky, J. Tao, K. Tan, A. E.-J. Lim, G.-Q. Lo, T. Baehr-Jones, and M. Hochberg, “Monothically integrated mesfet devices on a high-speed silicon photonics platform,” J. Lightwave Technol. 32(22), 4345–4348 (2014).
[Crossref]

Siegelin, F.

F. Siegelin and A. Stuffer, “Dislocation related leakage in advanced cmos devices,” in Proceedings of the 31 international symposium for testing and failure analysis, (2005).

Stojanovic, V.

V. Stojanović, R. J. Ram, M. Popović, S. Lin, S. Moazeni, M. Wade, C. Sun, L. Alloatti, A. Atabaki, F. Pavanello, N. Mehta, and P. Bhargava, “Monolithic silicon-photonic platforms in state-of-the-art cmos soi processes,” Opt. Express 26(10), 13106–13121 (2018).
[Crossref]

E. Timurdogan, Z. Su, K. Settaluri, S. Lin, S. Moazeni, C. Sun, G. Leake, D. D. Coolbaugh, B. R. Moss, M. Moresco, V. Stojanović, and M. R. Watts, “An ultra low power 3d integrated intra-chip silicon electronic-photonic link,” in Optical Fiber Communication Conference, (Optical Society of America, 2015), pp. Th5B–8.

Streshinsky, M.

A. Novack, R. Shi, M. Streshinsky, J. Tao, K. Tan, A. E.-J. Lim, G.-Q. Lo, T. Baehr-Jones, and M. Hochberg, “Monothically integrated mesfet devices on a high-speed silicon photonics platform,” J. Lightwave Technol. 32(22), 4345–4348 (2014).
[Crossref]

T. Baehr-Jones, R. Ding, A. Ayazi, T. Pinguet, M. Streshinsky, N. Harris, J. Li, L. He, M. Gould, and Y. Zhang, “A 25 gb/s silicon photonics platform,” arXiv preprint arXiv:1203.0767 (2012).

Stuffer, A.

F. Siegelin and A. Stuffer, “Dislocation related leakage in advanced cmos devices,” in Proceedings of the 31 international symposium for testing and failure analysis, (2005).

Su, Y.

Y. Zhang, Y. He, H. Zhou, Z. Xu, X. Jiang, X. Guo, C. Qiu, and Y. Su, “Silicon photonic devices for optical signal processing in wavelength, polarization and mode domains,” in Conference on Lasers and Electro-Optics/Pacific Rim, (Optical Society of America, 2018), pp. Th2C–1.

Su, Z.

E. Timurdogan, Z. Su, K. Settaluri, S. Lin, S. Moazeni, C. Sun, G. Leake, D. D. Coolbaugh, B. R. Moss, M. Moresco, V. Stojanović, and M. R. Watts, “An ultra low power 3d integrated intra-chip silicon electronic-photonic link,” in Optical Fiber Communication Conference, (Optical Society of America, 2015), pp. Th5B–8.

Sun, C.

V. Stojanović, R. J. Ram, M. Popović, S. Lin, S. Moazeni, M. Wade, C. Sun, L. Alloatti, A. Atabaki, F. Pavanello, N. Mehta, and P. Bhargava, “Monolithic silicon-photonic platforms in state-of-the-art cmos soi processes,” Opt. Express 26(10), 13106–13121 (2018).
[Crossref]

E. Timurdogan, Z. Su, K. Settaluri, S. Lin, S. Moazeni, C. Sun, G. Leake, D. D. Coolbaugh, B. R. Moss, M. Moresco, V. Stojanović, and M. R. Watts, “An ultra low power 3d integrated intra-chip silicon electronic-photonic link,” in Optical Fiber Communication Conference, (Optical Society of America, 2015), pp. Th5B–8.

Sun, P.

F. Boeuf, S. Crémer, N. Vulliet, T. Pinguet, A. Mekis, G. Masini, L. Verslegers, P. Sun, A. Ayazi, and N.-K. Hon, “A multi-wavelength 3d-compatible silicon photonics platform on 300mm soi wafers for 25gb/s applications,” in 2013 IEEE International Electron Devices Meeting, (IEEE, 2013), pp. 13–3.

Suzuki, Y.

Tait, A.

T. de Lima and A. Tait, “Lightlab – laboratory instrumentation and automation,” https://github.com/lightwave-lab/lightlab (2018).

Tait, A. N.

A. N. Tait, T. F. De Lima, E. Zhou, A. X. Wu, M. A. Nahmias, B. J. Shastri, and P. R. Prucnal, “Neuromorphic photonic networks using silicon photonic weight banks,” Sci. Rep. 7(1), 7430 (2017).
[Crossref]

T. F. de Lima, A. N. Tait, H. Saeidi, M. A. Nahmias, H.-T. Peng, S. Abbaslou, B. J. Shastri, and P. R. Prucnal, “Noise analysis of photonic modulator neurons,” arXiv preprint arXiv:1907.07325 (2019).

Tan, K.

A. Novack, R. Shi, M. Streshinsky, J. Tao, K. Tan, A. E.-J. Lim, G.-Q. Lo, T. Baehr-Jones, and M. Hochberg, “Monothically integrated mesfet devices on a high-speed silicon photonics platform,” J. Lightwave Technol. 32(22), 4345–4348 (2014).
[Crossref]

Tanemura, T.

Y. Kohno, K. Komatsu, Y. Ozeki, Y. Nakano, and T. Tanemura, “Large-scale silicon photonic phased array chip for single-pixel ghost imaging,” in Optical Fiber Communication Conference, (Optical Society of America, 2019), pp. M4E–2.

Tao, J.

A. Novack, R. Shi, M. Streshinsky, J. Tao, K. Tan, A. E.-J. Lim, G.-Q. Lo, T. Baehr-Jones, and M. Hochberg, “Monothically integrated mesfet devices on a high-speed silicon photonics platform,” J. Lightwave Technol. 32(22), 4345–4348 (2014).
[Crossref]

Tarr, N. G.

S. Li, N. G. Tarr, and N. Y. Winnie, “Monolithic integration of soi waveguide photodetectors and transimpedance amplifiers,” in Silicon Photonics XIII, vol. 10537 (International Society for Optics and Photonics, 2018), p. 105371M.

Timurdogan, E.

E. Timurdogan, Z. Su, K. Settaluri, S. Lin, S. Moazeni, C. Sun, G. Leake, D. D. Coolbaugh, B. R. Moss, M. Moresco, V. Stojanović, and M. R. Watts, “An ultra low power 3d integrated intra-chip silicon electronic-photonic link,” in Optical Fiber Communication Conference, (Optical Society of America, 2015), pp. Th5B–8.

Tokushima, M.

Tsuchida, J.

Verslegers, L.

F. Boeuf, S. Crémer, N. Vulliet, T. Pinguet, A. Mekis, G. Masini, L. Verslegers, P. Sun, A. Ayazi, and N.-K. Hon, “A multi-wavelength 3d-compatible silicon photonics platform on 300mm soi wafers for 25gb/s applications,” in 2013 IEEE International Electron Devices Meeting, (IEEE, 2013), pp. 13–3.

Vlasov, Y. A.

Y. A. Vlasov, “Silicon cmos-integrated nano-photonics for computer and data communications beyond 100g,” IEEE Commun. Mag. 50(2), s67–s72 (2012).
[Crossref]

Vulliet, N.

F. Boeuf, S. Crémer, N. Vulliet, T. Pinguet, A. Mekis, G. Masini, L. Verslegers, P. Sun, A. Ayazi, and N.-K. Hon, “A multi-wavelength 3d-compatible silicon photonics platform on 300mm soi wafers for 25gb/s applications,” in 2013 IEEE International Electron Devices Meeting, (IEEE, 2013), pp. 13–3.

Wade, M.

Watts, M. R.

E. Timurdogan, Z. Su, K. Settaluri, S. Lin, S. Moazeni, C. Sun, G. Leake, D. D. Coolbaugh, B. R. Moss, M. Moresco, V. Stojanović, and M. R. Watts, “An ultra low power 3d integrated intra-chip silicon electronic-photonic link,” in Optical Fiber Communication Conference, (Optical Society of America, 2015), pp. Th5B–8.

Weber, B.

P. De Dobbelaere, A. Dahl, A. Mekis, B. Chase, B. Weber, B. Welch, D. Foltz, G. Armijo, G. Masini, and G. McGee, “Advanced silicon photonics technology platform leveraging a semiconductor supply chain,” in 2017 IEEE International Electron Devices Meeting (IEDM), (IEEE, 2017), pp. 34–1.

Welch, B.

P. De Dobbelaere, A. Dahl, A. Mekis, B. Chase, B. Weber, B. Welch, D. Foltz, G. Armijo, G. Masini, and G. McGee, “Advanced silicon photonics technology platform leveraging a semiconductor supply chain,” in 2017 IEEE International Electron Devices Meeting (IEDM), (IEEE, 2017), pp. 34–1.

Winnie, N. Y.

S. Li, N. G. Tarr, and N. Y. Winnie, “Monolithic integration of soi waveguide photodetectors and transimpedance amplifiers,” in Silicon Photonics XIII, vol. 10537 (International Society for Optics and Photonics, 2018), p. 105371M.

Winzer, G.

L. Zimmermann, D. Knoll, S. Lischke, D. Petousi, M. Kroh, G. Winzer, B. Heinemann, P. Ostrovskyy, D. Micusik, and M. Lisker, “Monolithic integration of photonic devices in sige bicmos,” in 11th International Conference on Group IV Photonics (GFP), (IEEE, 2014), pp. 102–103.

Wu, A. X.

A. N. Tait, T. F. De Lima, E. Zhou, A. X. Wu, M. A. Nahmias, B. J. Shastri, and P. R. Prucnal, “Neuromorphic photonic networks using silicon photonic weight banks,” Sci. Rep. 7(1), 7430 (2017).
[Crossref]

Wu, M. C.

R. W. Going, J. Loo, T.-J. K. Liu, and M. C. Wu, “Germanium gate photomosfet integrated to silicon photonics,” IEEE J. Sel. Top. Quantum Electron. 20(4), 1–7 (2014).
[Crossref]

Xu, Z.

Y. Zhang, Y. He, H. Zhou, Z. Xu, X. Jiang, X. Guo, C. Qiu, and Y. Su, “Silicon photonic devices for optical signal processing in wavelength, polarization and mode domains,” in Conference on Lasers and Electro-Optics/Pacific Rim, (Optical Society of America, 2018), pp. Th2C–1.

Yashiki, K.

Yurtsever, G.

Zabihian, B.

Zhang, Y.

T. Baehr-Jones, R. Ding, A. Ayazi, T. Pinguet, M. Streshinsky, N. Harris, J. Li, L. He, M. Gould, and Y. Zhang, “A 25 gb/s silicon photonics platform,” arXiv preprint arXiv:1203.0767 (2012).

Y. Zhang, Y. He, H. Zhou, Z. Xu, X. Jiang, X. Guo, C. Qiu, and Y. Su, “Silicon photonic devices for optical signal processing in wavelength, polarization and mode domains,” in Conference on Lasers and Electro-Optics/Pacific Rim, (Optical Society of America, 2018), pp. Th2C–1.

Zheng, D.

Zheng, X.

Zhou, E.

A. N. Tait, T. F. De Lima, E. Zhou, A. X. Wu, M. A. Nahmias, B. J. Shastri, and P. R. Prucnal, “Neuromorphic photonic networks using silicon photonic weight banks,” Sci. Rep. 7(1), 7430 (2017).
[Crossref]

Zhou, H.

Y. Zhang, Y. He, H. Zhou, Z. Xu, X. Jiang, X. Guo, C. Qiu, and Y. Su, “Silicon photonic devices for optical signal processing in wavelength, polarization and mode domains,” in Conference on Lasers and Electro-Optics/Pacific Rim, (Optical Society of America, 2018), pp. Th2C–1.

Zimmermann, L.

L. Zimmermann, D. Knoll, S. Lischke, D. Petousi, M. Kroh, G. Winzer, B. Heinemann, P. Ostrovskyy, D. Micusik, and M. Lisker, “Monolithic integration of photonic devices in sige bicmos,” in 11th International Conference on Group IV Photonics (GFP), (IEEE, 2014), pp. 102–103.

Biomed. Opt. Express (1)

Front. Optoelectron. (1)

S. Kaushal, R. Cheng, M. Ma, A. Mistry, M. Burla, L. Chrostowski, and J. Azaña, “Optical signal processing based on silicon photonics waveguide bragg gratings,” Front. Optoelectron. 11(2), 163–188 (2018).
[Crossref]

IEEE Commun. Mag. (1)

Y. A. Vlasov, “Silicon cmos-integrated nano-photonics for computer and data communications beyond 100g,” IEEE Commun. Mag. 50(2), s67–s72 (2012).
[Crossref]

IEEE J. Sel. Top. Quantum Electron. (1)

R. W. Going, J. Loo, T.-J. K. Liu, and M. C. Wu, “Germanium gate photomosfet integrated to silicon photonics,” IEEE J. Sel. Top. Quantum Electron. 20(4), 1–7 (2014).
[Crossref]

IEEE Micro (1)

C. Gunn, “Cmos photonics for high-speed interconnects,” IEEE Micro 26(2), 58–66 (2006).
[Crossref]

J. Lightwave Technol. (2)

D. Okamoto, Y. Suzuki, K. Yashiki, Y. Hagihara, M. Tokushima, J. Fujikata, M. Kurihara, J. Tsuchida, T. Nedachi, J. Inasaka, and K. Kurata, “A 25-gb/s 5 × 5 mm2 chip-scale silicon-photonic receiver integrated with 28-nm cmos transimpedance amplifier,” J. Lightwave Technol. 34(12), 2988–2995 (2015).
[Crossref]

A. Novack, R. Shi, M. Streshinsky, J. Tao, K. Tan, A. E.-J. Lim, G.-Q. Lo, T. Baehr-Jones, and M. Hochberg, “Monothically integrated mesfet devices on a high-speed silicon photonics platform,” J. Lightwave Technol. 32(22), 4345–4348 (2014).
[Crossref]

Opt. Express (3)

Sci. Rep. (1)

A. N. Tait, T. F. De Lima, E. Zhou, A. X. Wu, M. A. Nahmias, B. J. Shastri, and P. R. Prucnal, “Neuromorphic photonic networks using silicon photonic weight banks,” Sci. Rep. 7(1), 7430 (2017).
[Crossref]

Other (13)

Y. Kohno, K. Komatsu, Y. Ozeki, Y. Nakano, and T. Tanemura, “Large-scale silicon photonic phased array chip for single-pixel ghost imaging,” in Optical Fiber Communication Conference, (Optical Society of America, 2019), pp. M4E–2.

T. F. de Lima, A. N. Tait, H. Saeidi, M. A. Nahmias, H.-T. Peng, S. Abbaslou, B. J. Shastri, and P. R. Prucnal, “Noise analysis of photonic modulator neurons,” arXiv preprint arXiv:1907.07325 (2019).

Y. Zhang, Y. He, H. Zhou, Z. Xu, X. Jiang, X. Guo, C. Qiu, and Y. Su, “Silicon photonic devices for optical signal processing in wavelength, polarization and mode domains,” in Conference on Lasers and Electro-Optics/Pacific Rim, (Optical Society of America, 2018), pp. Th2C–1.

C. Huang, T. F. De Lima, A. Jha, S. Abbaslou, B. J. Shastri, and P. R. Prucnal, “Giant enhancement in signal contrast using integrated all-optical nonlinear thresholder,” in 2019 Optical Fiber Communications Conference and Exhibition (OFC), (IEEE, 2019), pp. 1–3.

L. Zimmermann, D. Knoll, S. Lischke, D. Petousi, M. Kroh, G. Winzer, B. Heinemann, P. Ostrovskyy, D. Micusik, and M. Lisker, “Monolithic integration of photonic devices in sige bicmos,” in 11th International Conference on Group IV Photonics (GFP), (IEEE, 2014), pp. 102–103.

P. De Dobbelaere, A. Dahl, A. Mekis, B. Chase, B. Weber, B. Welch, D. Foltz, G. Armijo, G. Masini, and G. McGee, “Advanced silicon photonics technology platform leveraging a semiconductor supply chain,” in 2017 IEEE International Electron Devices Meeting (IEDM), (IEEE, 2017), pp. 34–1.

F. Boeuf, S. Crémer, N. Vulliet, T. Pinguet, A. Mekis, G. Masini, L. Verslegers, P. Sun, A. Ayazi, and N.-K. Hon, “A multi-wavelength 3d-compatible silicon photonics platform on 300mm soi wafers for 25gb/s applications,” in 2013 IEEE International Electron Devices Meeting, (IEEE, 2013), pp. 13–3.

E. Timurdogan, Z. Su, K. Settaluri, S. Lin, S. Moazeni, C. Sun, G. Leake, D. D. Coolbaugh, B. R. Moss, M. Moresco, V. Stojanović, and M. R. Watts, “An ultra low power 3d integrated intra-chip silicon electronic-photonic link,” in Optical Fiber Communication Conference, (Optical Society of America, 2015), pp. Th5B–8.

T. Baehr-Jones, R. Ding, A. Ayazi, T. Pinguet, M. Streshinsky, N. Harris, J. Li, L. He, M. Gould, and Y. Zhang, “A 25 gb/s silicon photonics platform,” arXiv preprint arXiv:1203.0767 (2012).

S. Li, N. G. Tarr, and N. Y. Winnie, “Monolithic integration of soi waveguide photodetectors and transimpedance amplifiers,” in Silicon Photonics XIII, vol. 10537 (International Society for Optics and Photonics, 2018), p. 105371M.

M. Georgas, “Optical receiver techniques for integrated photonic links,” (2014).

F. Siegelin and A. Stuffer, “Dislocation related leakage in advanced cmos devices,” in Proceedings of the 31 international symposium for testing and failure analysis, (2005).

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Figures (12)

Fig. 1.
Fig. 1. Characterization results of photonic components on the same fabrication run as the BJT. (a) Photodetector dark current at 1550 nm, (b) Zoomed-out plot of (a) showing dark current within reverse bias regime, (c) Eye diagram of a microring modulator modulating 5 Gb/s PRBS pattern with an extinction ratio of 10.4 dB.
Fig. 2.
Fig. 2. Sample applications of BJTs in photonic systems. (a) Microring modulator (MRM) based transmitter circuit: data from a pulse pattern generator (PPG) is modulated onto light (IN) via an MRM, driven by a modulator driver (MD). (b) A TIA-based receiver circuit: incoming light ( $P_{\textrm {IN}}$ ) generates a photocurrent that is amplified by a TIA and then by a power amplifier (PA) before being sent to an ADC. (c) A photonic neuron circuit, where the photocurrent is amplified by a TIA which then drives a modulator (MOD) with transfer function T(V).
Fig. 3.
Fig. 3. (a) BJT design on Klayout, showing Si and implant layers. The contact pads are connected through metal traces to pads probed for I/O. (b) SEM image of a fabricated BJT on the same chip. False colors overlaid to distinguish different doped regions. (Image was taken at PRISM Imaging and Analysis Center, Princeton. (a) and (b) correspond to devices with different dimensions.) Device doping profiles obtained from TCAD process simulation: (c) 3D structure of the lateral BJT (denoting the region marked by the dashed rectangle in (b)) showing the activated dopant density profile, (d) device lateral cross-section. TCAD simulation of DC characteristics of the devices with: (e) $L_b = 3.25$ $\mu$ m and (f) $L_b = 4.00$ $\mu$ m.
Fig. 4.
Fig. 4. Experimental measurement of BC and BE diode characteristics of two fabricated BJTs. (a) Circuit schematic of the setup for BE diode measurement where a Keithley 2400 sourcemeter actuates the voltage and measures the current across the diode, and C is left floating (similar setup used for BC diode, with BC connected to a Keithley and E left floating (not shown)). Measured IV characteristics of BJTs with (b) $L_b$ = 3.25 $\mu$ m, and (c) $L_b$ = 4.00 $\mu$ m.
Fig. 5.
Fig. 5. (left) Schematic of the experimental setup for DC Characterization. Keithley 2400 across BE actuates $I_{BE}$ while the one across CE actuates $V_{CE}$ and measures $I_{CE}$ . (right) Top-down image of the on- chip DUT, showing BJT contact pads probed using a DC probe array. The dimensions of the contact pads were optimized for available DC probe array.
Fig. 6.
Fig. 6. BJT DC Characterization results. Plot of $I_{CE}$ vs $V_{CE}$ at different $I_{BE}$ (shown in different colors) of two BJTs with (left) $L_b$ =3.25 $\mu$ m and (right) $L_b$ =4.00 $\mu$ m. The dots correspond to experimentally measured values, while the solid lines correspond to the fit to the Ebers-Moll equations.
Fig. 7.
Fig. 7. (left) Experimental setup for DC Characterization of a Darlington BJT. Sourcemeters (Keithley 2400) were used to actuate voltage (current) and measure voltage (current) for CE (BE) diode. (right) BJT DC characteristics of a Darlington. Each color corresponds to a particular $I_{BE}$ value.
Fig. 8.
Fig. 8. (Left) Schematic of the experimental setup for AC characterization. (Right) Closeup image of the probed device on chip.
Fig. 9.
Fig. 9. Small-signal equivalent circuit model of the BJT.
Fig. 10.
Fig. 10. (left) Device cross-section (generated from TCAD simulation) with the equivalent circuit schematic. (right) Parasitics calculated from the measured S-parameters for the following bias condition: $V_{CE} = 1V$ and $I_{BE} = 80$ $\mu$ A.
Fig. 11.
Fig. 11. Maximum available gain, $G_{max}$ , for a BJT ( $L_b$ =3.25 $\mu$ m) calculated from the measured S-parameters under the following bias: $V_{CE} = 1V$ and $I_{BE} = 80$ $\mu$ A.
Fig. 12.
Fig. 12. Simulated device AC gain, S21, incorporating matching networks of 200 MHz bandwidth for a BJT ( $L_b$ =3.25 $\mu$ m). The circuit of an LC matching network for 800-1000 MHz is shown as an inset.

Tables (3)

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Table 1. BJT doping density profile and dimensions.

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Table 2. Comparison of simulated and foundry-reported sheet resistance of individual layers. For the BJT of this work, N++ is used as the emitter and collector contact, N is used as the collector, P++ is used as the base contact, and P+ is used as the base.

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Table 3. DC characterization model fit parameters ( I s , V A , β F , β R , c ), and calculated transimpedance, g , per unit length of the BJTs.

Equations (12)

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I C E = I s [ ( e q V B E k T e q V B C k T ) ( 1 V B C V A ) 1 β R ( e q V B C k T 1 ) ]
I B E = I s [ 1 β F ( e q V B E k T 1 ) + 1 β R ( e q V B C k T 1 ) ]
β Darlington = β 1 β 2 + β 1 + β 2 ,
C π = Im ( Y 11 + Y 12 ) 2 π f
r π = 1 Re ( Y 11 + Y 12 )
C μ = Im ( Y 12 ) 2 π f
r o = 1 Re ( Y 12 + Y 22 )
Y 11 = 1 Z 0 ( 1 S 11 ) ( 1 + S 22 ) + S 12 S 21 ( 1 + S 11 ) ( 1 + S 22 ) S 12 S 21
Y 22 = 1 Z 0 ( 1 + S 11 ) ( 1 S 22 ) + S 12 S 21 ( 1 + S 11 ) ( 1 + S 22 ) S 12 S 21
Y 12 = 1 Z 0 2 S 12 ( 1 + S 11 ) ( 1 + S 22 ) S 12 S 21
Y 21 = 1 Z 0 2 S 21 ( 1 + S 11 ) ( 1 + S 22 ) S 12 S 21
G m a x = | S 21 | 2 ( 1 | S 11 | ) 2 ( 1 | S 22 | ) 2 .

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