Abstract

The performance of a receiver based on a CMOS amplifier circuit designed with 90nm ground rules wire-bonded to a waveguide germanium photodetector is characterized at data rates up to 40Gbps. Both chips were fabricated through the IBM Silicon CMOS Integrated Nanophotonics process on specialty photonics-enabled SOI wafers. At the data rate of 28Gbps which is relevant to the new generation of optical interconnects, a sensitivity of −7.3dBm average optical power is demonstrated with 3.4pJ/bit power-efficiency and 0.6UI horizontal eye opening at a bit-error-rate of 10−12. The receiver operates error-free (bit-error-rate < 10−12) up to 40Gbps with optimized power supply settings demonstrating an energy efficiency of 1.4pJ/bit and 4pJ/bit at data rates of 32Gbps and 40Gbps, respectively, with an average optical power of −0.8dBm.

© 2012 OSA

Full Article  |  PDF Article

References

  • View by:
  • |
  • |
  • |

  1. Y. A. Vlasov, “Silicon CMOS-Integrated Nano-Photonics for Computer and Data Communications Beyond 100G,” IEEE Commun. Mag.50, S67–S72 (2012).
  2. C. L. Schow, “Power-Efficient Transceivers for High-Bandwidth, Short-Reach Interconnects,” Optical Fiber Communication Conference (OFC), OTh1E.4 (2012).
  3. X. Zheng, D. Patil, J. Lexau, F. Liu, G. Li, H. Thacker, Y. Luo, I. Shubin, J. Li, J. Yao, P. Dong, D. Feng, M. Asghari, T. Pinguet, A. Mekis, P. Amberg, M. Dayringer, J. Gainsley, H. F. Moghadam, E. Alon, K. Raj, R. Ho, J. E. Cunningham, and A. V. Krishnamoorthy, “Ultra-efficient 10 Gb/s hybrid integrated silicon photonic transmitter and receiver,” Opt. Express19(6), 5172–5186 (2011).
    [CrossRef] [PubMed]
  4. A. Alduino, L. Liao, R. Jones, M. Morse, B. Kim, W. Lo, J. Basak, B. Koch, H. Liu, H. Rong, M. Sysak, C. Krause, R. Saba, D. Lazar, L. Horwitz, R. Bar, S. Litski, A. Liu, K. Sullivan, O. Dosunmu, N. Na, T. Yin, F. Haubensack, I. Hsieh, J. Heck, R. Beatty, H. Park, J. Bovington, S. Lee, H. Nguyen, H. Au, K. Nguyen, P. Merani, M. Hakami, and M. Paniccia, “Demonstration of a High Speed 4-Channel Integrated Silicon Photonics WDM Link with Hybrid Silicon Lasers,” Integrated Photonics Research, Silicon and Nano Photonics (IPR), PDIWI5 (2010).
  5. S. J. Koester, C. L. Schow, L. Schares, G. Dehlinger, J. D. Schaub, F. E. Doany, and R. A. John, “Ge-on-SOI-detector/Si-CMOS-amplifier receivers for high-performance optical communications applications,” J. Lightwave Technol.25(1), 46–57 (2007).
    [CrossRef]
  6. T. Takemoto, F. Yuki, H. Yamashita, S. Tsuji, Y. Lee, K. Adachi, K. Shinoda, Y. Matsuoka, K. Kogo, S. Nishimura, M. Nido, M. Namiwaka, T. Kaneko, T. Sugimoto, and K. Kurata, “100-Gbps CMOS Transceiver for Multilane Optical Backplane System with 1.3-cm2 Footprint, ” 37th European Conference and Exposition on Optical Communications (ECOC), Th.12.B.5. (2011).
  7. A. Narasimha, B. Analui, Y. Liang, T. J. Sleboda, S. Abdalla, E. Balmater, S. Gloeckner, D. Guckenberger, M. Harrison, R. G. M. P. Koumans, D. Kucharski, A. Mekis, S. Mirsaidi, D. Song, and T. Pinguet, “A fully integrated 4 × 10-Gb/s DWDM optoelectronic transceiver implemented in a standard 0.13 µm CMOS SOI technology,” IEEE J. Solid-state Circuits42(12), 2736–2744 (2007).
    [CrossRef]
  8. S. Assefa, F. Xia, S. W. Bedell, Y. Zhang, T. Topuria, P. M. Rice, and Y. A. Vlasov, “CMOS-integrated high-speed MSM germanium waveguide photodetector,” Opt. Express18(5), 4986–4999 (2010).
    [CrossRef] [PubMed]
  9. B. G. Lee, S. Assefa, C. Schow, W. M. Green, A. Rylyakov, R. A. John, J. A. Kash, and Y. A. Vlasov, “Hybrid-Integrated Germanium Photodetector and CMOS Receiver Operating at 15 Gb/s,” Conference on Lasers and Electro-Optics (CLEO), CFB4 (2011).
  10. Q. Fang, Y. T. Phang, C. W. Tan, T. Y. Liow, M. B. Yu, G. Q. Lo, and D. L. Kwong, “Multi-channel silicon photonic receiver based on ring-resonators,” Opt. Express18(13), 13510–13515 (2010).
    [CrossRef] [PubMed]
  11. C. L. Schow, A. V. Rylyakov, C. Baks, F. E. Doany, and J. A. Kash, “A 25 Gb/s, 6.5 pJ/bit, 90-nm CMOS-driven multimode optical link,” IEEE Photon. Technol. Lett.24(10), 824–826 (2012).
    [CrossRef]
  12. L. Chen, C. R. Doerr, L. Buhl, Y. Baeyens, and R. A. Aroca, “Monolithically integrated 40-wavelength demultiplexer and photodetector array on silicon,” IEEE Photon. Technol. Lett.23(13), 869–871 (2011).
    [CrossRef]
  13. A. V. Rylyakov, C. L. Schow, J. Proesel, D. M. Kuchta, C. Baks, N. Y. Li, C. Xie, and K. Jackson, “A 40-Gb/s, 850-nm, VCSEL-Based Full Optical Link,” Optical Fiber Communication Conference (OFC), OTh1E.1 (2012).
  14. C. F. Liao and S. Liu, “40 Gb/s transimpedance-AGC amplifier and CDR circuit for broadband data receivers in 90 nm CMOS,” IEEE J. Solid-state Circuits43(3), 642–655 (2008).
    [CrossRef]
  15. J. Kim and J. F. Buckwalter, “A 40-Gb/s optical transceiver front-end in 45 nm SOI CMOS,” IEEE J. Solid-state Circuits47(3), 615–626 (2012).
    [CrossRef]
  16. S. Assefa, W. M. Green, A. V. Rylyakov, C. L. Schow, F. Horst, and Y. A. Vlasov, “CMOS Integrated Silicon Nanophotonics: Enabling Technology for Exascale Computational Systems,” Optical Fiber Communication Conference (OFC), OMM6 (2011).
  17. W. M. Green, A. V. Rylyakov, C. L. Schow, F. Horst, and Y. A. Vlasov, “CMOS integrated Silicon Nanophotonics: Enabling Technology for Exascale Computational Systems,” Proc. SEMICON, Chiba, Japan, Dec. 1–3, 2010, available: http://www.research.ibm.com/photonics .
  18. S. Assefa, F. Xia, S. W. Bedell, Y. Zhang, T. Topuria, P. M. Rice, and Y. A. Vlasov, “CMOS-Integrated 40GHz Germanium Waveguide Photodetector for On-chip Optical Interconnects,” Optical Fiber Communication Conference (OFC), OMR4 (2009).
  19. S. Assefa, C. Jahnes, and Y. Vlasov, “CMOS compatible integrated dielectric optical waveguide coupler and fabrication,” US Patent 2009/0324162 A1, filed June 2008.

2012 (3)

Y. A. Vlasov, “Silicon CMOS-Integrated Nano-Photonics for Computer and Data Communications Beyond 100G,” IEEE Commun. Mag.50, S67–S72 (2012).

C. L. Schow, A. V. Rylyakov, C. Baks, F. E. Doany, and J. A. Kash, “A 25 Gb/s, 6.5 pJ/bit, 90-nm CMOS-driven multimode optical link,” IEEE Photon. Technol. Lett.24(10), 824–826 (2012).
[CrossRef]

J. Kim and J. F. Buckwalter, “A 40-Gb/s optical transceiver front-end in 45 nm SOI CMOS,” IEEE J. Solid-state Circuits47(3), 615–626 (2012).
[CrossRef]

2011 (2)

2010 (2)

2008 (1)

C. F. Liao and S. Liu, “40 Gb/s transimpedance-AGC amplifier and CDR circuit for broadband data receivers in 90 nm CMOS,” IEEE J. Solid-state Circuits43(3), 642–655 (2008).
[CrossRef]

2007 (2)

A. Narasimha, B. Analui, Y. Liang, T. J. Sleboda, S. Abdalla, E. Balmater, S. Gloeckner, D. Guckenberger, M. Harrison, R. G. M. P. Koumans, D. Kucharski, A. Mekis, S. Mirsaidi, D. Song, and T. Pinguet, “A fully integrated 4 × 10-Gb/s DWDM optoelectronic transceiver implemented in a standard 0.13 µm CMOS SOI technology,” IEEE J. Solid-state Circuits42(12), 2736–2744 (2007).
[CrossRef]

S. J. Koester, C. L. Schow, L. Schares, G. Dehlinger, J. D. Schaub, F. E. Doany, and R. A. John, “Ge-on-SOI-detector/Si-CMOS-amplifier receivers for high-performance optical communications applications,” J. Lightwave Technol.25(1), 46–57 (2007).
[CrossRef]

Abdalla, S.

A. Narasimha, B. Analui, Y. Liang, T. J. Sleboda, S. Abdalla, E. Balmater, S. Gloeckner, D. Guckenberger, M. Harrison, R. G. M. P. Koumans, D. Kucharski, A. Mekis, S. Mirsaidi, D. Song, and T. Pinguet, “A fully integrated 4 × 10-Gb/s DWDM optoelectronic transceiver implemented in a standard 0.13 µm CMOS SOI technology,” IEEE J. Solid-state Circuits42(12), 2736–2744 (2007).
[CrossRef]

Alon, E.

Amberg, P.

Analui, B.

A. Narasimha, B. Analui, Y. Liang, T. J. Sleboda, S. Abdalla, E. Balmater, S. Gloeckner, D. Guckenberger, M. Harrison, R. G. M. P. Koumans, D. Kucharski, A. Mekis, S. Mirsaidi, D. Song, and T. Pinguet, “A fully integrated 4 × 10-Gb/s DWDM optoelectronic transceiver implemented in a standard 0.13 µm CMOS SOI technology,” IEEE J. Solid-state Circuits42(12), 2736–2744 (2007).
[CrossRef]

Aroca, R. A.

L. Chen, C. R. Doerr, L. Buhl, Y. Baeyens, and R. A. Aroca, “Monolithically integrated 40-wavelength demultiplexer and photodetector array on silicon,” IEEE Photon. Technol. Lett.23(13), 869–871 (2011).
[CrossRef]

Asghari, M.

Assefa, S.

Baeyens, Y.

L. Chen, C. R. Doerr, L. Buhl, Y. Baeyens, and R. A. Aroca, “Monolithically integrated 40-wavelength demultiplexer and photodetector array on silicon,” IEEE Photon. Technol. Lett.23(13), 869–871 (2011).
[CrossRef]

Baks, C.

C. L. Schow, A. V. Rylyakov, C. Baks, F. E. Doany, and J. A. Kash, “A 25 Gb/s, 6.5 pJ/bit, 90-nm CMOS-driven multimode optical link,” IEEE Photon. Technol. Lett.24(10), 824–826 (2012).
[CrossRef]

Balmater, E.

A. Narasimha, B. Analui, Y. Liang, T. J. Sleboda, S. Abdalla, E. Balmater, S. Gloeckner, D. Guckenberger, M. Harrison, R. G. M. P. Koumans, D. Kucharski, A. Mekis, S. Mirsaidi, D. Song, and T. Pinguet, “A fully integrated 4 × 10-Gb/s DWDM optoelectronic transceiver implemented in a standard 0.13 µm CMOS SOI technology,” IEEE J. Solid-state Circuits42(12), 2736–2744 (2007).
[CrossRef]

Bedell, S. W.

Buckwalter, J. F.

J. Kim and J. F. Buckwalter, “A 40-Gb/s optical transceiver front-end in 45 nm SOI CMOS,” IEEE J. Solid-state Circuits47(3), 615–626 (2012).
[CrossRef]

Buhl, L.

L. Chen, C. R. Doerr, L. Buhl, Y. Baeyens, and R. A. Aroca, “Monolithically integrated 40-wavelength demultiplexer and photodetector array on silicon,” IEEE Photon. Technol. Lett.23(13), 869–871 (2011).
[CrossRef]

Chen, L.

L. Chen, C. R. Doerr, L. Buhl, Y. Baeyens, and R. A. Aroca, “Monolithically integrated 40-wavelength demultiplexer and photodetector array on silicon,” IEEE Photon. Technol. Lett.23(13), 869–871 (2011).
[CrossRef]

Cunningham, J. E.

Dayringer, M.

Dehlinger, G.

Doany, F. E.

C. L. Schow, A. V. Rylyakov, C. Baks, F. E. Doany, and J. A. Kash, “A 25 Gb/s, 6.5 pJ/bit, 90-nm CMOS-driven multimode optical link,” IEEE Photon. Technol. Lett.24(10), 824–826 (2012).
[CrossRef]

S. J. Koester, C. L. Schow, L. Schares, G. Dehlinger, J. D. Schaub, F. E. Doany, and R. A. John, “Ge-on-SOI-detector/Si-CMOS-amplifier receivers for high-performance optical communications applications,” J. Lightwave Technol.25(1), 46–57 (2007).
[CrossRef]

Doerr, C. R.

L. Chen, C. R. Doerr, L. Buhl, Y. Baeyens, and R. A. Aroca, “Monolithically integrated 40-wavelength demultiplexer and photodetector array on silicon,” IEEE Photon. Technol. Lett.23(13), 869–871 (2011).
[CrossRef]

Dong, P.

Fang, Q.

Feng, D.

Gainsley, J.

Gloeckner, S.

A. Narasimha, B. Analui, Y. Liang, T. J. Sleboda, S. Abdalla, E. Balmater, S. Gloeckner, D. Guckenberger, M. Harrison, R. G. M. P. Koumans, D. Kucharski, A. Mekis, S. Mirsaidi, D. Song, and T. Pinguet, “A fully integrated 4 × 10-Gb/s DWDM optoelectronic transceiver implemented in a standard 0.13 µm CMOS SOI technology,” IEEE J. Solid-state Circuits42(12), 2736–2744 (2007).
[CrossRef]

Guckenberger, D.

A. Narasimha, B. Analui, Y. Liang, T. J. Sleboda, S. Abdalla, E. Balmater, S. Gloeckner, D. Guckenberger, M. Harrison, R. G. M. P. Koumans, D. Kucharski, A. Mekis, S. Mirsaidi, D. Song, and T. Pinguet, “A fully integrated 4 × 10-Gb/s DWDM optoelectronic transceiver implemented in a standard 0.13 µm CMOS SOI technology,” IEEE J. Solid-state Circuits42(12), 2736–2744 (2007).
[CrossRef]

Harrison, M.

A. Narasimha, B. Analui, Y. Liang, T. J. Sleboda, S. Abdalla, E. Balmater, S. Gloeckner, D. Guckenberger, M. Harrison, R. G. M. P. Koumans, D. Kucharski, A. Mekis, S. Mirsaidi, D. Song, and T. Pinguet, “A fully integrated 4 × 10-Gb/s DWDM optoelectronic transceiver implemented in a standard 0.13 µm CMOS SOI technology,” IEEE J. Solid-state Circuits42(12), 2736–2744 (2007).
[CrossRef]

Ho, R.

John, R. A.

Kash, J. A.

C. L. Schow, A. V. Rylyakov, C. Baks, F. E. Doany, and J. A. Kash, “A 25 Gb/s, 6.5 pJ/bit, 90-nm CMOS-driven multimode optical link,” IEEE Photon. Technol. Lett.24(10), 824–826 (2012).
[CrossRef]

Kim, J.

J. Kim and J. F. Buckwalter, “A 40-Gb/s optical transceiver front-end in 45 nm SOI CMOS,” IEEE J. Solid-state Circuits47(3), 615–626 (2012).
[CrossRef]

Koester, S. J.

Koumans, R. G. M. P.

A. Narasimha, B. Analui, Y. Liang, T. J. Sleboda, S. Abdalla, E. Balmater, S. Gloeckner, D. Guckenberger, M. Harrison, R. G. M. P. Koumans, D. Kucharski, A. Mekis, S. Mirsaidi, D. Song, and T. Pinguet, “A fully integrated 4 × 10-Gb/s DWDM optoelectronic transceiver implemented in a standard 0.13 µm CMOS SOI technology,” IEEE J. Solid-state Circuits42(12), 2736–2744 (2007).
[CrossRef]

Krishnamoorthy, A. V.

Kucharski, D.

A. Narasimha, B. Analui, Y. Liang, T. J. Sleboda, S. Abdalla, E. Balmater, S. Gloeckner, D. Guckenberger, M. Harrison, R. G. M. P. Koumans, D. Kucharski, A. Mekis, S. Mirsaidi, D. Song, and T. Pinguet, “A fully integrated 4 × 10-Gb/s DWDM optoelectronic transceiver implemented in a standard 0.13 µm CMOS SOI technology,” IEEE J. Solid-state Circuits42(12), 2736–2744 (2007).
[CrossRef]

Kwong, D. L.

Lexau, J.

Li, G.

Li, J.

Liang, Y.

A. Narasimha, B. Analui, Y. Liang, T. J. Sleboda, S. Abdalla, E. Balmater, S. Gloeckner, D. Guckenberger, M. Harrison, R. G. M. P. Koumans, D. Kucharski, A. Mekis, S. Mirsaidi, D. Song, and T. Pinguet, “A fully integrated 4 × 10-Gb/s DWDM optoelectronic transceiver implemented in a standard 0.13 µm CMOS SOI technology,” IEEE J. Solid-state Circuits42(12), 2736–2744 (2007).
[CrossRef]

Liao, C. F.

C. F. Liao and S. Liu, “40 Gb/s transimpedance-AGC amplifier and CDR circuit for broadband data receivers in 90 nm CMOS,” IEEE J. Solid-state Circuits43(3), 642–655 (2008).
[CrossRef]

Liow, T. Y.

Liu, F.

Liu, S.

C. F. Liao and S. Liu, “40 Gb/s transimpedance-AGC amplifier and CDR circuit for broadband data receivers in 90 nm CMOS,” IEEE J. Solid-state Circuits43(3), 642–655 (2008).
[CrossRef]

Lo, G. Q.

Luo, Y.

Mekis, A.

X. Zheng, D. Patil, J. Lexau, F. Liu, G. Li, H. Thacker, Y. Luo, I. Shubin, J. Li, J. Yao, P. Dong, D. Feng, M. Asghari, T. Pinguet, A. Mekis, P. Amberg, M. Dayringer, J. Gainsley, H. F. Moghadam, E. Alon, K. Raj, R. Ho, J. E. Cunningham, and A. V. Krishnamoorthy, “Ultra-efficient 10 Gb/s hybrid integrated silicon photonic transmitter and receiver,” Opt. Express19(6), 5172–5186 (2011).
[CrossRef] [PubMed]

A. Narasimha, B. Analui, Y. Liang, T. J. Sleboda, S. Abdalla, E. Balmater, S. Gloeckner, D. Guckenberger, M. Harrison, R. G. M. P. Koumans, D. Kucharski, A. Mekis, S. Mirsaidi, D. Song, and T. Pinguet, “A fully integrated 4 × 10-Gb/s DWDM optoelectronic transceiver implemented in a standard 0.13 µm CMOS SOI technology,” IEEE J. Solid-state Circuits42(12), 2736–2744 (2007).
[CrossRef]

Mirsaidi, S.

A. Narasimha, B. Analui, Y. Liang, T. J. Sleboda, S. Abdalla, E. Balmater, S. Gloeckner, D. Guckenberger, M. Harrison, R. G. M. P. Koumans, D. Kucharski, A. Mekis, S. Mirsaidi, D. Song, and T. Pinguet, “A fully integrated 4 × 10-Gb/s DWDM optoelectronic transceiver implemented in a standard 0.13 µm CMOS SOI technology,” IEEE J. Solid-state Circuits42(12), 2736–2744 (2007).
[CrossRef]

Moghadam, H. F.

Narasimha, A.

A. Narasimha, B. Analui, Y. Liang, T. J. Sleboda, S. Abdalla, E. Balmater, S. Gloeckner, D. Guckenberger, M. Harrison, R. G. M. P. Koumans, D. Kucharski, A. Mekis, S. Mirsaidi, D. Song, and T. Pinguet, “A fully integrated 4 × 10-Gb/s DWDM optoelectronic transceiver implemented in a standard 0.13 µm CMOS SOI technology,” IEEE J. Solid-state Circuits42(12), 2736–2744 (2007).
[CrossRef]

Patil, D.

Phang, Y. T.

Pinguet, T.

X. Zheng, D. Patil, J. Lexau, F. Liu, G. Li, H. Thacker, Y. Luo, I. Shubin, J. Li, J. Yao, P. Dong, D. Feng, M. Asghari, T. Pinguet, A. Mekis, P. Amberg, M. Dayringer, J. Gainsley, H. F. Moghadam, E. Alon, K. Raj, R. Ho, J. E. Cunningham, and A. V. Krishnamoorthy, “Ultra-efficient 10 Gb/s hybrid integrated silicon photonic transmitter and receiver,” Opt. Express19(6), 5172–5186 (2011).
[CrossRef] [PubMed]

A. Narasimha, B. Analui, Y. Liang, T. J. Sleboda, S. Abdalla, E. Balmater, S. Gloeckner, D. Guckenberger, M. Harrison, R. G. M. P. Koumans, D. Kucharski, A. Mekis, S. Mirsaidi, D. Song, and T. Pinguet, “A fully integrated 4 × 10-Gb/s DWDM optoelectronic transceiver implemented in a standard 0.13 µm CMOS SOI technology,” IEEE J. Solid-state Circuits42(12), 2736–2744 (2007).
[CrossRef]

Raj, K.

Rice, P. M.

Rylyakov, A. V.

C. L. Schow, A. V. Rylyakov, C. Baks, F. E. Doany, and J. A. Kash, “A 25 Gb/s, 6.5 pJ/bit, 90-nm CMOS-driven multimode optical link,” IEEE Photon. Technol. Lett.24(10), 824–826 (2012).
[CrossRef]

Schares, L.

Schaub, J. D.

Schow, C. L.

C. L. Schow, A. V. Rylyakov, C. Baks, F. E. Doany, and J. A. Kash, “A 25 Gb/s, 6.5 pJ/bit, 90-nm CMOS-driven multimode optical link,” IEEE Photon. Technol. Lett.24(10), 824–826 (2012).
[CrossRef]

S. J. Koester, C. L. Schow, L. Schares, G. Dehlinger, J. D. Schaub, F. E. Doany, and R. A. John, “Ge-on-SOI-detector/Si-CMOS-amplifier receivers for high-performance optical communications applications,” J. Lightwave Technol.25(1), 46–57 (2007).
[CrossRef]

Shubin, I.

Sleboda, T. J.

A. Narasimha, B. Analui, Y. Liang, T. J. Sleboda, S. Abdalla, E. Balmater, S. Gloeckner, D. Guckenberger, M. Harrison, R. G. M. P. Koumans, D. Kucharski, A. Mekis, S. Mirsaidi, D. Song, and T. Pinguet, “A fully integrated 4 × 10-Gb/s DWDM optoelectronic transceiver implemented in a standard 0.13 µm CMOS SOI technology,” IEEE J. Solid-state Circuits42(12), 2736–2744 (2007).
[CrossRef]

Song, D.

A. Narasimha, B. Analui, Y. Liang, T. J. Sleboda, S. Abdalla, E. Balmater, S. Gloeckner, D. Guckenberger, M. Harrison, R. G. M. P. Koumans, D. Kucharski, A. Mekis, S. Mirsaidi, D. Song, and T. Pinguet, “A fully integrated 4 × 10-Gb/s DWDM optoelectronic transceiver implemented in a standard 0.13 µm CMOS SOI technology,” IEEE J. Solid-state Circuits42(12), 2736–2744 (2007).
[CrossRef]

Tan, C. W.

Thacker, H.

Topuria, T.

Vlasov, Y. A.

Y. A. Vlasov, “Silicon CMOS-Integrated Nano-Photonics for Computer and Data Communications Beyond 100G,” IEEE Commun. Mag.50, S67–S72 (2012).

S. Assefa, F. Xia, S. W. Bedell, Y. Zhang, T. Topuria, P. M. Rice, and Y. A. Vlasov, “CMOS-integrated high-speed MSM germanium waveguide photodetector,” Opt. Express18(5), 4986–4999 (2010).
[CrossRef] [PubMed]

Xia, F.

Yao, J.

Yu, M. B.

Zhang, Y.

Zheng, X.

IEEE Commun. Mag. (1)

Y. A. Vlasov, “Silicon CMOS-Integrated Nano-Photonics for Computer and Data Communications Beyond 100G,” IEEE Commun. Mag.50, S67–S72 (2012).

IEEE J. Solid-state Circuits (3)

A. Narasimha, B. Analui, Y. Liang, T. J. Sleboda, S. Abdalla, E. Balmater, S. Gloeckner, D. Guckenberger, M. Harrison, R. G. M. P. Koumans, D. Kucharski, A. Mekis, S. Mirsaidi, D. Song, and T. Pinguet, “A fully integrated 4 × 10-Gb/s DWDM optoelectronic transceiver implemented in a standard 0.13 µm CMOS SOI technology,” IEEE J. Solid-state Circuits42(12), 2736–2744 (2007).
[CrossRef]

C. F. Liao and S. Liu, “40 Gb/s transimpedance-AGC amplifier and CDR circuit for broadband data receivers in 90 nm CMOS,” IEEE J. Solid-state Circuits43(3), 642–655 (2008).
[CrossRef]

J. Kim and J. F. Buckwalter, “A 40-Gb/s optical transceiver front-end in 45 nm SOI CMOS,” IEEE J. Solid-state Circuits47(3), 615–626 (2012).
[CrossRef]

IEEE Photon. Technol. Lett. (2)

C. L. Schow, A. V. Rylyakov, C. Baks, F. E. Doany, and J. A. Kash, “A 25 Gb/s, 6.5 pJ/bit, 90-nm CMOS-driven multimode optical link,” IEEE Photon. Technol. Lett.24(10), 824–826 (2012).
[CrossRef]

L. Chen, C. R. Doerr, L. Buhl, Y. Baeyens, and R. A. Aroca, “Monolithically integrated 40-wavelength demultiplexer and photodetector array on silicon,” IEEE Photon. Technol. Lett.23(13), 869–871 (2011).
[CrossRef]

J. Lightwave Technol. (1)

Opt. Express (3)

Other (9)

A. V. Rylyakov, C. L. Schow, J. Proesel, D. M. Kuchta, C. Baks, N. Y. Li, C. Xie, and K. Jackson, “A 40-Gb/s, 850-nm, VCSEL-Based Full Optical Link,” Optical Fiber Communication Conference (OFC), OTh1E.1 (2012).

S. Assefa, W. M. Green, A. V. Rylyakov, C. L. Schow, F. Horst, and Y. A. Vlasov, “CMOS Integrated Silicon Nanophotonics: Enabling Technology for Exascale Computational Systems,” Optical Fiber Communication Conference (OFC), OMM6 (2011).

W. M. Green, A. V. Rylyakov, C. L. Schow, F. Horst, and Y. A. Vlasov, “CMOS integrated Silicon Nanophotonics: Enabling Technology for Exascale Computational Systems,” Proc. SEMICON, Chiba, Japan, Dec. 1–3, 2010, available: http://www.research.ibm.com/photonics .

S. Assefa, F. Xia, S. W. Bedell, Y. Zhang, T. Topuria, P. M. Rice, and Y. A. Vlasov, “CMOS-Integrated 40GHz Germanium Waveguide Photodetector for On-chip Optical Interconnects,” Optical Fiber Communication Conference (OFC), OMR4 (2009).

S. Assefa, C. Jahnes, and Y. Vlasov, “CMOS compatible integrated dielectric optical waveguide coupler and fabrication,” US Patent 2009/0324162 A1, filed June 2008.

A. Alduino, L. Liao, R. Jones, M. Morse, B. Kim, W. Lo, J. Basak, B. Koch, H. Liu, H. Rong, M. Sysak, C. Krause, R. Saba, D. Lazar, L. Horwitz, R. Bar, S. Litski, A. Liu, K. Sullivan, O. Dosunmu, N. Na, T. Yin, F. Haubensack, I. Hsieh, J. Heck, R. Beatty, H. Park, J. Bovington, S. Lee, H. Nguyen, H. Au, K. Nguyen, P. Merani, M. Hakami, and M. Paniccia, “Demonstration of a High Speed 4-Channel Integrated Silicon Photonics WDM Link with Hybrid Silicon Lasers,” Integrated Photonics Research, Silicon and Nano Photonics (IPR), PDIWI5 (2010).

C. L. Schow, “Power-Efficient Transceivers for High-Bandwidth, Short-Reach Interconnects,” Optical Fiber Communication Conference (OFC), OTh1E.4 (2012).

B. G. Lee, S. Assefa, C. Schow, W. M. Green, A. Rylyakov, R. A. John, J. A. Kash, and Y. A. Vlasov, “Hybrid-Integrated Germanium Photodetector and CMOS Receiver Operating at 15 Gb/s,” Conference on Lasers and Electro-Optics (CLEO), CFB4 (2011).

T. Takemoto, F. Yuki, H. Yamashita, S. Tsuji, Y. Lee, K. Adachi, K. Shinoda, Y. Matsuoka, K. Kogo, S. Nishimura, M. Nido, M. Namiwaka, T. Kaneko, T. Sugimoto, and K. Kurata, “100-Gbps CMOS Transceiver for Multilane Optical Backplane System with 1.3-cm2 Footprint, ” 37th European Conference and Exposition on Optical Communications (ECOC), Th.12.B.5. (2011).

Cited By

OSA participates in CrossRef's Cited-By Linking service. Citing articles from OSA journals and other participating publishers are listed here.

Alert me when this article is cited.


Figures (8)

Fig. 1
Fig. 1

(a) Right-hand side: Photograph showing the waveguide-integrated Ge PD chip wire-bonded to the CMOS amplifier chip; Left-hand side: magnified image of the waveguide-integrated Ge PD with interdigitated contacts. (b) Schematic of the CMOS receiver amplifer consisting of a trans-impedance amplifier (TIA) followed by a six-stage limiting amplifier (LA) and a current-mode logic output stage (OS) buffer. Four separate power supplies are individually tuned for best performance. Receiver power consumption is measured from the sum of the voltage-current product of the four power supplies. (c) Schematic of the measurement setup. The LiNbO3 modulator was driven by a pseudo-random bit sequence of length 27–1 (PRBS7). Optical eye at the output of the modulator and the electrical eye at the receiver output measured at 40Gbps are shown with an average optical power of −0.8dBm.

Fig. 2
Fig. 2

Electrical eye diagrams at the receiver output measured at various data rates with 97.2mW power drawn from all four power supplies on the receiver and an average input optical power of −5.5dBm.

Fig. 3
Fig. 3

(a) BER curves of the receiver measured using PRBS7 at various data rates. Power settings correspond to total receiver power consumption of 97.2mW ; (b) 28Gbps bathtub curve measured at average optical power of 1dB and 5dB higher than the 10−12 BER sensitivity for Ge PD Rx and 5dB higher than the 10−12 BER sensitivity for a commercial InP Rx with the same power supply settings as the BER curve measurement.

Fig. 4
Fig. 4

(a). Energy efficiency measured with an average optical power of −7.3dBm at various data rates. Power settings are optimized for each data rate measured to minimize the power consumptions while maintaining BER<10−12 and 100mV peak-to-peak single-ended output (b). Receiver sensitivity taken at 10−12 BER versus energy efficiency measured at 25 and 28Gbps

Fig. 5
Fig. 5

(a) Eye diagrams at various data rates measured at an average optical power of −0.8dBm; Power settings corresponds to a total receiver power consumption of 119.8mW (b) Receiver BER curves at various data rates with receiver power supply settings equivalent to those in (a).

Fig. 6
Fig. 6

(a) Bathtub curves at 28Gbps and 36Gbps measured with an average optical power 1dB higher than the 10−12 BER sensitivity. Power settings correspond to a total receiver power consumption of 119.8mW. (b) Energy efficiency versus data rates with an average optical power of −0.8dBm. At each data rate tested, receiver supply voltages are optimized for each data rate measured to minimize the power consumptions while maintaining BER<10−12 and 100mV peak-to-peak single-ended output

Fig. 7
Fig. 7

(a) BER curve of the receiver measured at 40Gbps with power supply settings corresponding to total receiver power consumption of 158.4mW. (b). Bathtub curve measured at an average optical power 0.3dB higher than the 10−12 BER sensitivity with the same power supply settings as the BER curve measurement in (a)

Fig. 8
Fig. 8

Eye diagrams of the receiver at 40Gbps with an average optical power of (a) −4.5dBm and (b) −0.8dBm. Power supply settings corresponds to a total receiver power consumption of 158.4mW

Tables (1)

Tables Icon

Table 1 Summarized measurement conditions and results for various experiments

Metrics