Abstract

In this work, GaInAs/InP membrane p-i-n photodiodes integrated with a back-end distributed Bragg reflector were numerically investigated for a backreflection of 30dB. The results showed that a 3-dB bandwidth of 17 GHz and reverse bias of 1 V can be obtained for an absorption section length of 12 μm. The 3-dB bandwidth is approximately twice faster and the absorption length is 1/3 times smaller compared to those of a similar photodiode without the back-end DBR.

© 2019 Optical Society of America under the terms of the OSA Open Access Publishing Agreement

1. INTRODUCTION

The advent of Si large-scale integration (LSI) circuits based on complementary metal oxide semiconductor (CMOS) technology has made it possible to integrate a large number of components into a single circuit for computers and other applications. The development of LSI circuits has greatly improved the processing capability and reduced the total power dissipation of electronic systems. However, the physical limitations of electrical interconnections such as excessive propagation delay and Joule heat generation in metal interconnections are the limiting factors that hinder further development of LSI systems. A few innovative solutions have been proposed to interconnect the functional blocks and overcome these limiting factors, such as three-dimensional integrated circuits with through-silicon via [1,2] wireless capacitive coupling [3] and inductive coupling [4]. On-chip optical interconnections have also attracted considerable attention in recent years because these interconnections significantly improve data capacity and power savings [5]. For on-chip optical interconnections, the system energy cost should be 100 fJ/bit or less for a data rate of 10 Gb/s [6].

In order to fulfill the above demand for on-chip optical interconnections, we had proposed a hybrid optical-electrical interconnection method, where an InP-based membrane photonic integrated circuit (MPIC) is attached onto a Si LSI chip with multilevel interconnection by adhesive bonding (see Fig. 1) [710]. In this system, the uppermost interconnection of the LSI is optical and it is not electrical. This enables us to realize high-speed data transmission between distant circuit blocks in the Si LSI circuit. The lasers and detectors in the data-transmission circuits are connected to the driving circuits on the Si LSI circuit via through-silicon.

 figure: Fig. 1.

Fig. 1. Conceptual diagram of an MPIC bonded on Si-based CMOS LSI circuit.

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The uppermost MPIC consists of a thin semiconductor core layer sandwiched between low refractive index materials, such as SiO2 and air. A strong optical confinement in the gain region can be achieved by fabricating the laser in a membrane structure and therefore, the laser can be operated at very low power consumption compared with conventional semiconductor lasers [1118].

We had also studied a membrane photodiode (PD) with ultralow power consumption [19,20], which is another crucial element for MPICs. One of the essential requirements of a membrane PD is to achieve a suitable modulation speed that matches the laser diode, with extremely low power consumption. In order to further reduce the power consumption of the membrane PD, the transimpedance amplifiers (TIAs) and post amplifiers should be replaced with a high load resistor directly connected to the membrane PD [2124].

In this work, we propose and investigate two types of membrane GaInAs/InP p-i-n PDs integrated with a back-end distributed Bragg reflector (DBR) in order to achieve a membrane PD with shorter device length and high 3-dB bandwidth for a backreflection of 30dB.

2. DESIGN OF THE MEMBRANE PDs WITH DBR

A. Design Guide for the Membrane PDs

Figure 2(a) shows the simplified schematic of the membrane interconnection system. It can be seen that the PD receives an input power, Pin, from the laser transmitter, whose output power is Pout after propagating through a membrane waveguide with a link loss (i.e., coupling loss and propagation loss).

 figure: Fig. 2.

Fig. 2. (a) Simplified schematic of the membrane interconnection system. (b) Equivalent circuit of the receiverless PD.

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Figure 2(b) shows the output voltage equivalent circuit of the membrane PD with a directly connected load resistor. Here, the photocurrent is assumed to be extremely small due to the low output power from the laser diode. The photocurrent, Ipd, from the PD passing through the load resistor, RL, can produce a voltage swing (Vout=Ipd×RL) to directly drive the standard digital static CMOS inverter. The key point is that the capacitance, Cj, of the membrane PD must be extremely small in order to obtain a high 3-dB bandwidth.

Figure 3(a) shows the relationship between the load resistance, RL, and capacitance, Cj, for various 3-dB bandwidths, f3dB=(2πRLCj)1. In order to produce several hundreds of millivolts (mV) for the output voltage of the PD, the load resistance must be several kΩ or higher because of the small photocurrent, Ipd. For convenience, we assume that RL=10 and Cj<1fF for f3dB>10GHz. This is a difficult task for conventional PDs used as optical receivers. However, we believe that this can be realized by using our membrane PDs owing to the relatively large optical confinement factor of the absorption layer.

 figure: Fig. 3.

Fig. 3. (a) Relationship between RL and Cj used to determine the required bandwidth. (b) Received power requirement of the membrane PD for a data rate of 10 Gbps (indicated by the red line) and required output power of the laser (indicated by the black line) as a function of the load resistance, RL.

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In this work, we aim to achieve a low bit error rate (BER) and high output voltage (several mV) for our designed PDs. Thus, we determine the minimum output power required for the laser transmitter to fulfill the BER and Vout criteria prior to discussing the design of the membrane PDs. The required power received at the PD, Pin, was determined as a function of the load resistance, RL, for a data rate of 10 Gb/s. Here, we use a large value of RL instead of TIA to reduce the thermal noise, which will be beneficial for our MPIC. The noise generated by the circuit needs to be determined before the laser power requirement is calculated. For a receiverless PD circuit [Fig. 2(b)], the thermal noise, shot noise, and BER for the intensity modulation-direct detection method are determined using the following equations [25]:

BER=12erfc(SNR22),
SNR=4Q2,
Q=I1I0σ1+σ0,
where Q is a factor of I1, I1 is the current signal when the corresponding bit is 1, I0 is the current signal when the corresponding bit is 0, σ1 is the noise current of I1, and σ0 is the noise current of I0. In this case, the Q factor is assumed to be 7, which means that the BER is approximately 1012. Without an increase in the amplifier noise, the equation for the thermal noise limited power and shot noise limited power can be expressed as
SNRthermal=RLResp2Pin24kBTempf4Q2,
SNRshot=RespPin2qfQ2,
where Resp is the responsivity (=η×λ[μm]/1.24[A/W] and η is the quantum efficiency) of the PD, kB is the Boltzmann constant, Temp is the operation temperature, f is the bandwidth, q is the electron charge, and Pin is the minimum received power for the thermal noise and shot noise. The thermal noise limited power and shot noise limited power are strongly restricted by the Q factor and therefore, they are related to the BER. The blue line in Fig. 3(c) indicates the sum of the limited minimum received power for the thermal noise and shot noise whereas the red line indicates the incident power required for a voltage output of 200 mV. It can be seen from Eq. (4) that the increase in the load resistance will reduce the thermal noise limitation and power demand of the voltage output. In other words, the received power at the PD, Pin, is inversely proportional to the square root of the load resistance, RL. For a case where the BER=1012 (Q=7), f=10GHz, and RL=10 at room temperature, the minimum input power considering the thermal noise is equal to 27.5dBm, assuming that the responsivity is 1 A/W. The green line indicates the shot noise limited power, which is a constant value (38.0dBm). With the demand for noise limited power, we need to consider the value of the received power for the PD, Pin, which can be determined from the following equation:
Vout=Pin×Resp×RL.
The theoretical responsivity of the PD is assumed to be 1 A/W (η=0.80). The minimum input power of the PD, Pin, for an output voltage, Vout, of 200 mV is found to be 17.7dBm when the load resistance is 10 kΩ, and the required laser output power can be obtained by considering the link loss. Here, the link loss is assumed to be 3 dB, which is obtained from the coupling loss between the laser and waveguide and the coupling loss between the waveguide and PD (0.5 dB) and propagation loss (2 dB). Hence, the required output power of the laser, Pout, is 14.7dBm (34 μW) for RL=10 and a data rate of 10 Gb/s.

B. Two Types of Membrane PDs Integrated with Back-End DBR

Figure 4(a) shows the schematic of a membrane GaInAs p-i-n PD with the back-end DBR bonded on a Si substrate through 1-μm-thick SiO2 using benzocyclobutene adhesive bonding. A 120-nm-thick GaInAs absorption section is sandwiched laterally between the n-InP and p-InP side clads, which also forms a lateral p-i-n junction. The GaInAs absorption section is sandwiched vertically between a 100-nm-thick InP clad (top) and 50-nm-thick InP clad (bottom). The absorption section is connected to a back-end DBR in order to suppress backward radiation of light. The absorption section length, Labs, can be reduced owing to the high-reflectivity back-end DBR and therefore, the 3-dB bandwidth can be increased while maintaining the same responsivity compared with a device without the back-end DBR [19,20].

 figure: Fig. 4.

Fig. 4. (a) Schematic of the membrane GaInAs p-i-n PD with the back-end DBR. Conceptual diagrams of the membrane GaInAs p-i-n PD with the back-end DBR in the (b) active region and (c) passive region.

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In this study, we analyze and investigate two types of membrane PDs: (1) membrane PD with a back-end DBR in the GaInAs absorption region [Fig. 4(b)], and (2) membrane PD with a back-end DBR in the 155-nm-thick GaInAsP passive region [Fig. 4(c)]. In the former device, the GaInAs DBR region functions simultaneously as an absorption layer and reflection layer.

We also determine the required absorption section length for both types of membrane PDs [Figs. 4(b) and 4(c)] using the transfer matrix method (TMM). Following this, we estimate the 3-dB bandwidth of these membrane PDs, which will be described in the following sections.

3. REQUIRED LENGTH OF THE MEMBRANE PDs FOR EFFICIENT ABSORPTION

In this section, we determine the optimum device length for two types of membrane PDs based on the following criteria: (1) efficient absorption and (2) low reflection power to the laser side. Figure 5 shows the numerical model used for the TMM simulations. The reflectivity (=El(0)) and transmittivity (=Er(L)) of the membrane PD can be expressed as

[Er(L)El(L)]=Mma·(Msm·Ms·Mms·Mm)N·ML[Er(0)El(0)]=[M11M12M21M22][Er(0)El(0)],
where N is the number of grating periods, Er(0) and El(0) denote the input and output power at the left side of the device, respectively, and Er(L) and El(L) denote the input and output power at the right side of the device, respectively. Assuming that the input light enters from the left side of the device, Er(0) and El(L) are set as 1 and 0, respectively. The matrices Mm(s) and Mms(sm) for the grating region are given by
Mm(s)=[ejβm(s)Lm(s)00ejβm(s)Lm(s)],
Mms(sm)=12nm(s)ns(m)[ns(m)+nm(s)ns(m)nm(s)ns(m)nm(s)ns(m)+nm(s)],
where βm(s), nm(s), and Lm(s) represent the effective complex propagation constant, effective complex refractive index, and length for each part of the grating region, respectively. The matrix ML for the absorption region is in the same form as Mm(s) and it can be written as
ML=[ejβabsLabs00ejβabsLabs],
where βabs and Labs represent the effective complex propagation constant and length of the absorption region, respectively. The matrix Mma for the interface between the membrane PD and air is given by
Mma=11R[1RR1]{R=(ns1ns+1)2}.
Based on Eq. (7), the reflectivity, R, and transmittivity, T, are given by
R=|Er(0)El(0)|2=|M21|2|M22|2,
T=|Er(L)Er(0)|2=|M11M22M12M21|2|M22|2=1|M22|2.
First, we calculate the reflectivity, R, and transmittivity, T, as a function of the absorption section length, Labs, and the DBR section length, LDBR. In the simulations, the wavelength of the incident light is assumed to be 1.55 μm, and the grating period Λ, grating depth dg, and duty ratio are set as 288 nm, 50 nm, and 50%, respectively. The refractive indices for InP, GaInAsP, and GaInAs are set as 3.17, 3.34, and 3.62, respectively. The absorption coefficient of the GaInAs is set as 5000cm1.

 figure: Fig. 5.

Fig. 5. Numerical model of the DBR grating structure model used for the TMM simulations.

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Figure 6 shows an example of the simulation results for the device with a stripe width Ws of 0.8 μm (grating coupling coefficient κ=1650cm1). Figures 6(a) and 6(b) show the reflectivity, R, and transmittivity, T, respectively, of the membrane PD with the back-end DBR in the GaInAs absorption section (Type A device). The thick black solid lines indicate the conditions R=30dB and T=30dB in Figs. 6(a) and 6(b), respectively. These conditions are chosen to achieve efficient absorption of the input optical power and prevent instability of the laser transmitter due to the reflected light. Figures 7(a) and 7(b) represent the reflectivity, R, and transmittivity, T, respectively, of the membrane PD with the back-end DBR in the 155-nm-thick GaInAsP passive section (Type B device).

 figure: Fig. 6.

Fig. 6. (a) Reflectivity and (b) transmittivity as a function of the absorption section length and DBR section length for the membrane PD with DBR in the GaInAs absorption region (Type A device).

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 figure: Fig. 7.

Fig. 7. (a) Reflectivity and (b) transmittivity as a function of the absorption section length and DBR section length for the membrane PD with the back-end DBR in the GaInAsP passive section (Type B device).

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By overlaying the simulation results obtained for the reflectivity and transmittivity, we can identify the region where both R and T are less than 30dB. Figure 8 shows the results for the two types of membrane PDs. The total length, L, for the Type A device is given by

L=Labs+LDBR.
In contrast, the total length, L, for the Type B device is given by
L=Labs.
Hence, the required device length for each membrane PD can be estimated by drawing a line given by Eq. (14) in Fig. 8(a) and a line given by Eq. (15) in Fig. 8(b) such that the line passes through the red dot. For the Type A configuration, the required length related to the capacitance, Cj, of the membrane PD is 20.8 μm (Labs=14.2μm, LDBR=6.6μm) whereas the required length for the Type B configuration is Labs=11.8μm. Even though the total length (Labs+LDBR=26.6μm) for the Type B configuration is slightly longer than that for the Type A configuration, the capacitance, Cj, of the Type B device can be significantly reduced and this approach will be effective to increase the RC-limited bandwidth, which will be discussed in the next section.

 figure: Fig. 8.

Fig. 8. Optimum device length as a function of the absorption section length and DBR section length for the (a) Type A and (b) Type B devices.

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By performing the above analysis for devices with various stripe widths, the required length related to the capacitance, Cj (denoted by the device length in Fig. 9), can be determined as a function of Ws, as shown in Fig. 9. For the Type A configuration, the required length is almost constant, where the value is 20–21 μm for Ws>0.8μm, which is 30% shorter than that of the membrane PD without the DBR section. For the Type B configuration, the absorption length is 11–12 μm for Ws>0.8μm, which is 60% shorter than that of the membrane PD without the DBR section. Therefore, it can be deduced that the Type B configuration is more desirable as a membrane PD because it is more effective to decrease the absorption section length and increase the RC-limited bandwidth.

 figure: Fig. 9.

Fig. 9. Required device length as a function of the stripe width.

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4. ESTIMATION OF THE JUNCTION CAPACITANCE AND 3-DB BANDWIDTH

The junction capacitance, Cj, can be roughly estimated by applying the calculated device length and stripe width into the parallel-plate model such as Cj=εGaInAshL/Ws, where εGaInAs=13.5, ε0 is the permittivity of the GaInAs, and h is the thickness of the absorption layer, which is 0.27 μm. The stripe width, Ws, can be considered as the width of the depletion layer because of the full depletion of the absorption layer upon application of the reverse bias voltage.

Figure 10 shows the junction capacitance, Cj, determined as a function of the stripe width, Ws. It can be seen that the junction capacitance for each membrane PD can be significantly reduced with the back-end DBR compared with the conventional membrane PD without 0 DBR. In order to obtain Cj<1fF, the stripe width must fulfill the following criteria: (1) Ws>0.7μm (for Type A device) and (2) Ws>0.5μm (for Type B device).

 figure: Fig. 10.

Fig. 10. Junction capacitance as a function of the stripe width for two types of membrane PDs.

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Based on the simulation results obtained for the junction capacitance, Cj, the 3-dB bandwidth, f3dB, for two types of membrane PDs is calculated by using a simple circuit model, as shown in Fig. 11. The 3-dB bandwidth can match the modulation speed of the membrane laser connected to a high load resistor in order to provide sufficient output voltage. In terms of the high-frequency response, the 3-dB bandwidth of the lateral p-i-n junction PD is limited by the resistance-capacitance delay and the carrier drift time within the intrinsic region. The 3-dB bandwidth f3dB can be expressed as [26]

1f3dB2=1fRC2+1fTT2,
where fRC is the RC bandwidth, and fTT is the transit frequency.

 figure: Fig. 11.

Fig. 11. Numerical model used for the 3-dB bandwidth estimation.

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The RC bandwidth, fRC, can be simply estimated using the first-order RC circuit:

fRC=12π(RL+Rs)Cj,
where RL and Rs represent the load resistance and sheet resistance of the PD, respectively (see Fig. 11). Here, RL is assumed to be 10 kΩ in order to provide sufficient output voltage to the CMOS circuit.

The transit frequency, fTT, is given by [27]

fTT=2πυsat·tanh(μh·ViWs·1υsat)Ws,
where υsat is the hole saturation drift velocity (assuming that the absorption layer is fully depleted), μh is the mobility, and Vi is the bias voltage, which is applied in the intrinsic region of the PD.

We analyze the 3-dB bandwidth of the membrane PD as a function of stripe width, Ws, by using Eqs. (16)–(18). Figures 12(a)12(c) show the results obtained from the simulations, where the Ipd values are 5, 20, and 80 μA, respectively. The applied bias voltage Vb and load resistor RL are fixed at 1V and 10 kΩ, respectively, for the simulations. The theoretical curves indicate that for a small stripe width, the transit frequency surpasses the RC bandwidth because the carrier drift time is short and there is a sufficiently strong electric field in the depletion region. However, for a large stripe width, the junction capacitance decreases, which in turn, increases the RC bandwidth. In addition, the electric field applied to the absorber becomes weak while the bias voltage is fixed and the drift distance increases, which explains why the 3-dB bandwidth is more dependent on the RC bandwidth in this case.

 figure: Fig. 12.

Fig. 12. Theoretical curves of the 3-dB bandwidth for different Ipd values: (a) 5 μA, (b) 20 μA, and (c) 80 μA. Red line, PD with the back-end DBR in the GaInAsP passive region (Type B device); blue line, PD with the back-end DBR in the GaInAs absorption region (Type A device); dashed line, PD without the back-end DBR.

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It can be observed from Fig. 12 that the 3-dB bandwidth is greater than 10 GHz for both devices at an appropriate value of Ws. Assuming that the required output voltage is 200 mV (Ipd=20μA) for the device with the DBR in the GaInAsP passive region (Type B), the maximum 3-dB bandwidth obtained is 17.3 GHz (which is 27% higher than that of the device without the DBR) for Ws=0.7μm. Even in the situation where an output voltage of 800 mV (Ipd=80μA) is required, the maximum 3-dB bandwidth remains at 10.7 GHz for Ws=0.5μm.

Figures 13(a)13(c) show the 3-dB bandwidth, f3dB, and the output voltage, Vout (=RLIpd), as a function of the photocurrent, Ipd, for each membrane PD: (a) PD with the DBR in the GaInAs absorption region (Type A device), (b) PD with the DBR in the passive region (Type B device), and (c) PD without the DBR. The increase of photocurrent Ipd leads to a higher output voltage Vout (=RLIpd). However, at the same time, the 3-dB bandwidth is limited due to the reduction of the bias voltage Vi applied in the intrinsic region of the PD according to the following equation:

Vi=Vb(RL+RS)·Ipd.
In addition, the variation of the photocurrent or the bias voltage applied to the depletion region does not significantly reduce the 3-dB bandwidth for Ws=0.3μm because the strong electric field can be maintained. In contrast, the 3-dB bandwidth can be significantly reduced at higher values of Ipd for Ws>0.8μm because of the lower transit frequency. For the membrane PD with the DBR in the GaInAsP passive region (Type B device), it is estimated that the 3-dB bandwidth is higher than 15 GHz at lower Ipd (30 μA). The 3-dB is also higher than 10 GHz at higher Ipd (60 μA).

 figure: Fig. 13.

Fig. 13. Theoretical curves of the 3-dB bandwidth and output voltage Vout as a function of the photocurrent Ipd for different stripe widths. (a) PD with the back-end DBR in the GaInAs absorption region (Type A device); (b) PD with the back-end DBR in the GaInAsP passive region (Type B device); (c) PD without the back-end DBR.

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5. CONCLUSIONS

In this work, we proposed and investigated two types of GaInAs/InP membrane p-i-n PDs with back-end DBR in which the round-trip light absorption can reduce the area and capacitance of the detecting region.

Based on the analysis using TMM, we obtained the required device length to achieve a reflectivity and transmittivity of less than 30dB. For a stripe width of 0.8 μm, the required length was estimated to be 20.8 and 11.8 μm for the device with the DBR in the GaInAs absorption region (Type A) and the device with the DBR in the GaInAsP passive region (Type B), respectively.

Next, we analyzed the junction capacitance and 3-dB bandwidth for various stripe widths. We obtained a 3-dB bandwidth greater than 10 GHz for the appropriate value of Ws, which is a sufficient speed for intra-chip optical interconnection. Finally, we obtained a maximum 3-dB bandwidth of 17.3 GHz with sufficient output voltage for the device with the DBR in the GaInAsP passive region.

Funding

Japan Society for the Promotion of Science (JSPS) (15H05763, 16H06082); Core Research for Evolutional Science and Technology (CREST) (JPMJCR15N6).

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20. Z. Gu, D. Inoue, T. Amemiya, N. Nishiyama, and S. Arai, “20-Gbps operation of membrane-based GaInAs/InP waveguide-type p-i-n photodiode bonded on Si substrate,” Appl. Phys. Express 11, 022102 (2018). [CrossRef]  

21. C. Debaes, A. Bhatnagar, D. Agarwal, R. Chen, G. A. Keeler, N. C. Helman, H. Thienpont, and D. A. B. Miller, “Receiver-less optical clock injection for clock distribution networks,” IEEE J. Sel. Top. Quantum Electron. 9, 400–409 (2003). [CrossRef]  

22. S. Assefa, F. Xia, W. M. J. Green, C. L. Schow, A. V. Rylyakov, and Y. A. Vlasov, “CMOS-integrated optical receivers for on-chip interconnects,” IEEE J. Sel. Top. Quantum Electron. 16, 1376–1385(2010). [CrossRef]  

23. K. Nozaki, S. Matsuo, K. Takeda, T. Sato, E. Kuramochi, and M. Notomi, “InGaAs nano-photodetectors based on photonic crystal waveguide including ultracompact buried heterostructure,” Opt. Express 21, 19022–19028 (2013). [CrossRef]  

24. K. Nozaki, S. Matsuo, T. Fujii, K. Takeda, M. Ono, A. Shakoor, E. Kuramochi, and M. Notomi, “Photonic-crystal nano-photodetector with ultrasmall capacitance for on-chip light-to-voltage conversion without an amplifier,” Optica 3, 483–492 (2016). [CrossRef]  

25. G. P. Agrawal, Fiber-Optic Communication Systems, 4th ed. (Wiley, 2010).

26. S. Klinger, M. Berroth, M. Kaschel, M. Oehme, and E. Kasper, “Ge-on-Si p-i-n photodiodes with a 3-dB bandwidth of 49 GHz,” IEEE Photonics Technol. Lett. 21, 920–922 (2009). [CrossRef]  

27. J. M. T. Pereira, “Modeling the frequency response of p+InP/nInGaAs/n+InP photodiodes with an arbitrary electric field profile,” COMPEL 26, 1114–1122 (2007). [CrossRef]  

References

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  1. M. Kada, “Development of functionally innovative 3D-integrated circuit (dream chip) technology/high-density 3D-integration technology for multifunctional devices,” in IEEE International Conference on 3D System Integration (IEEE, 2009), pp. 1–6.
  2. V. Suntharalingam, R. Berger, S. Clark, J. Knecht, A. Messier, K. Newcomb, D. Rathman, R. Slattery, A. Soares, C. Stevenson, K. Warner, D. Young, L. P. Ang, B. Mansoorian, and D. Shaver, “A 4-side tileable back illuminated 3D-integrated Mpixel CMOS image sensor,” in IEEE International Solid-State Circuits Conference—Digest of Technical Papers (IEEE, 2009), pp. 38–39.
  3. A. Fazzi, R. Canegallo, L. Ciccarelli, L. Magagni, F. Natali, E. Jung, P. Rolandi, and R. Guerrieri, “3-D capacitive interconnections with mono- and bi-directional capabilities,” IEEE J. Solid-State Circuits 43, 275–284 (2008).
    [Crossref]
  4. K. Niitsu, Y. Shimazaki, Y. Sugimori, Y. Kohama, K. Kasuga, I. Nonomura, M. Saen, S. Komatsu, K. Osada, N. Irie, T. Hattori, A. Hasegawa, and T. Kuroda, “An inductive-coupling link for 3D integration of a 90 nm CMOS processor and a 65 nm CMOS SRAM,” in IEEE International Solid-State Circuits Conference—Digest of Technical Papers (IEEE, 2009), pp. 480–481.
  5. M. Haurylau, G. Chen, H. Chen, J. Zhang, N. A. Nelson, D. H. Albonesi, E. G. Friedman, and P. M. Fauchet, “On-chip optical interconnect roadmap: challenges and critical directions,” IEEE J. Sel. Top. Quantum Electron. 12, 1699–1705 (2006).
    [Crossref]
  6. D. A. B. Miller, “Device requirements for optical interconnects to silicon chips,” Proc. IEEE 97, 1166–1185 (2009).
    [Crossref]
  7. D. Inoue, T. Hiratani, Y. Atsuji, T. Tomiyasu, T. Amemiya, N. Nishiyama, and S. Arai, “Monolithic integration of membrane-based butt-jointed built-in DFB lasers and p-i-n photodiodes bonded on Si substrate,” IEEE J. Sel. Top. Quantum Electron. 21, 1502907 (2015).
    [Crossref]
  8. D. Inoue, T. Hiratani, K. Fukuda, T. Tomiyasu, Z. Gu, T. Amemiya, N. Nishiyama, and S. Arai, “Integrated optical link on Si substrate using membrane distributed-feedback laser and p-i-n photodiode,” IEEE J. Sel. Top. Quantum Electron. 23, 3700208 (2017).
    [Crossref]
  9. S. Arai and T. Amemiya, “Semiconductor membrane lasers and photodiode on Si,” in Silicon Photonics, Vol. 99 of Semiconductors and Semimetals (Elsevier, 2018), pp. 71–95.
  10. D. Inoue, J. Lee, T. Shindo, M. Futami, K. Doi, T. Amemiya, N. Nishiyama, and S. Arai, “Butt-joint built-in (BJB) structure for membrane photonic integration,” in International Conference on Indium Phosphide and Related Materials (IPRM) (2013), pp. 1–2.
  11. S. Arai, N. Nishiyama, T. Maruyama, and T. Okumura, “GaInAsP/InP membrane lasers for optical interconnects,” IEEE J. Sel. Top. Quantum Electron. 17, 1381–1389 (2011).
    [Crossref]
  12. T. Hiratani, T. Shindo, K. Doi, Y. Atsuji, D. Inoue, T. Amemiya, N. Nishiyama, and S. Arai, “Energy cost analysis of membrane distributed-reflector lasers for on-chip optical interconnects,” IEEE J. Sel. Top. Quantum Electron. 21, 1503410 (2015).
    [Crossref]
  13. T. Hiratani, D. Inoue, T. Tomiyasu, Y. Atsuji, K. Fukuda, T. Amemiya, N. Nishiyama, and S. Arai, “Room-temperature continuous-wave operation of membrane distributed-reflector laser,” Appl. Phys. Express 8, 112701 (2015).
    [Crossref]
  14. D. Inoue, T. Hiratani, K. Fukuda, T. Tomiyasu, T. Amemiya, N. Nishiyama, and S. Arai, “High-modulation efficiency operation of GaInAsP/InP membrane distributed feedback laser on Si substrate,” Opt. Express 23, 29024–29031 (2015).
    [Crossref]
  15. D. Inoue, T. Hiratani, K. Fukuda, T. Tomiyasu, T. Amemiya, N. Nishiyama, and S. Arai, “Low-bias current 10 Gbit/s direct modulation of GaInAsP/InP membrane DFB laser on silicon,” Opt. Express 24, 18571–18579 (2016).
    [Crossref]
  16. T. Tomiyasu, T. Hiratani, D. Inoue, N. Nakamura, K. Fukuda, T. Uryu, T. Amemiya, N. Nishiyama, and S. Arai, “High-differential quantum efficiency operation of GaInAsP/InP membrane distributed-reflector laser on Si,” Appl. Phys. Express 10, 062702(2017).
    [Crossref]
  17. T. Hiratani, D. Inoue, T. Tomiyasu, K. Fukuda, T. Amemiya, N. Nishiyama, and S. Arai, “High-efficiency operation of membrane distributed-reflector lasers on silicon substrate,” IEEE J. Sel. Top. Quantum Electron. 23, 3700108 (2017).
    [Crossref]
  18. T. Hiratani, D. Inoue, T. Tomiyasu, K. Fukuda, N. Nakamura, T. Amemiya, N. Nishiyama, and S. Arai, “High efficiency operation of GaInAsP/InP membrane distributed-reflector laser on Si,” IEEE Photonics Technol. Lett. 29, 1832–1835 (2017).
    [Crossref]
  19. Z. Gu, T. Uryu, N. Nakamura, D. Inoue, T. Amemiya, N. Nishiyama, and S. Arai, “On-chip membrane-based GaInAs/InP waveguide-type p-i-n photodiode fabricated on silicon substrate,” Appl. Opt. 56, 7841–7848 (2017).
    [Crossref]
  20. Z. Gu, D. Inoue, T. Amemiya, N. Nishiyama, and S. Arai, “20-Gbps operation of membrane-based GaInAs/InP waveguide-type p-i-n photodiode bonded on Si substrate,” Appl. Phys. Express 11, 022102 (2018).
    [Crossref]
  21. C. Debaes, A. Bhatnagar, D. Agarwal, R. Chen, G. A. Keeler, N. C. Helman, H. Thienpont, and D. A. B. Miller, “Receiver-less optical clock injection for clock distribution networks,” IEEE J. Sel. Top. Quantum Electron. 9, 400–409 (2003).
    [Crossref]
  22. S. Assefa, F. Xia, W. M. J. Green, C. L. Schow, A. V. Rylyakov, and Y. A. Vlasov, “CMOS-integrated optical receivers for on-chip interconnects,” IEEE J. Sel. Top. Quantum Electron. 16, 1376–1385(2010).
    [Crossref]
  23. K. Nozaki, S. Matsuo, K. Takeda, T. Sato, E. Kuramochi, and M. Notomi, “InGaAs nano-photodetectors based on photonic crystal waveguide including ultracompact buried heterostructure,” Opt. Express 21, 19022–19028 (2013).
    [Crossref]
  24. K. Nozaki, S. Matsuo, T. Fujii, K. Takeda, M. Ono, A. Shakoor, E. Kuramochi, and M. Notomi, “Photonic-crystal nano-photodetector with ultrasmall capacitance for on-chip light-to-voltage conversion without an amplifier,” Optica 3, 483–492 (2016).
    [Crossref]
  25. G. P. Agrawal, Fiber-Optic Communication Systems, 4th ed. (Wiley, 2010).
  26. S. Klinger, M. Berroth, M. Kaschel, M. Oehme, and E. Kasper, “Ge-on-Si p-i-n photodiodes with a 3-dB bandwidth of 49 GHz,” IEEE Photonics Technol. Lett. 21, 920–922 (2009).
    [Crossref]
  27. J. M. T. Pereira, “Modeling the frequency response of p+InP/n–InGaAs/n+InP photodiodes with an arbitrary electric field profile,” COMPEL 26, 1114–1122 (2007).
    [Crossref]

2018 (1)

Z. Gu, D. Inoue, T. Amemiya, N. Nishiyama, and S. Arai, “20-Gbps operation of membrane-based GaInAs/InP waveguide-type p-i-n photodiode bonded on Si substrate,” Appl. Phys. Express 11, 022102 (2018).
[Crossref]

2017 (5)

T. Tomiyasu, T. Hiratani, D. Inoue, N. Nakamura, K. Fukuda, T. Uryu, T. Amemiya, N. Nishiyama, and S. Arai, “High-differential quantum efficiency operation of GaInAsP/InP membrane distributed-reflector laser on Si,” Appl. Phys. Express 10, 062702(2017).
[Crossref]

T. Hiratani, D. Inoue, T. Tomiyasu, K. Fukuda, T. Amemiya, N. Nishiyama, and S. Arai, “High-efficiency operation of membrane distributed-reflector lasers on silicon substrate,” IEEE J. Sel. Top. Quantum Electron. 23, 3700108 (2017).
[Crossref]

T. Hiratani, D. Inoue, T. Tomiyasu, K. Fukuda, N. Nakamura, T. Amemiya, N. Nishiyama, and S. Arai, “High efficiency operation of GaInAsP/InP membrane distributed-reflector laser on Si,” IEEE Photonics Technol. Lett. 29, 1832–1835 (2017).
[Crossref]

Z. Gu, T. Uryu, N. Nakamura, D. Inoue, T. Amemiya, N. Nishiyama, and S. Arai, “On-chip membrane-based GaInAs/InP waveguide-type p-i-n photodiode fabricated on silicon substrate,” Appl. Opt. 56, 7841–7848 (2017).
[Crossref]

D. Inoue, T. Hiratani, K. Fukuda, T. Tomiyasu, Z. Gu, T. Amemiya, N. Nishiyama, and S. Arai, “Integrated optical link on Si substrate using membrane distributed-feedback laser and p-i-n photodiode,” IEEE J. Sel. Top. Quantum Electron. 23, 3700208 (2017).
[Crossref]

2016 (2)

2015 (4)

T. Hiratani, T. Shindo, K. Doi, Y. Atsuji, D. Inoue, T. Amemiya, N. Nishiyama, and S. Arai, “Energy cost analysis of membrane distributed-reflector lasers for on-chip optical interconnects,” IEEE J. Sel. Top. Quantum Electron. 21, 1503410 (2015).
[Crossref]

T. Hiratani, D. Inoue, T. Tomiyasu, Y. Atsuji, K. Fukuda, T. Amemiya, N. Nishiyama, and S. Arai, “Room-temperature continuous-wave operation of membrane distributed-reflector laser,” Appl. Phys. Express 8, 112701 (2015).
[Crossref]

D. Inoue, T. Hiratani, K. Fukuda, T. Tomiyasu, T. Amemiya, N. Nishiyama, and S. Arai, “High-modulation efficiency operation of GaInAsP/InP membrane distributed feedback laser on Si substrate,” Opt. Express 23, 29024–29031 (2015).
[Crossref]

D. Inoue, T. Hiratani, Y. Atsuji, T. Tomiyasu, T. Amemiya, N. Nishiyama, and S. Arai, “Monolithic integration of membrane-based butt-jointed built-in DFB lasers and p-i-n photodiodes bonded on Si substrate,” IEEE J. Sel. Top. Quantum Electron. 21, 1502907 (2015).
[Crossref]

2013 (1)

2011 (1)

S. Arai, N. Nishiyama, T. Maruyama, and T. Okumura, “GaInAsP/InP membrane lasers for optical interconnects,” IEEE J. Sel. Top. Quantum Electron. 17, 1381–1389 (2011).
[Crossref]

2010 (1)

S. Assefa, F. Xia, W. M. J. Green, C. L. Schow, A. V. Rylyakov, and Y. A. Vlasov, “CMOS-integrated optical receivers for on-chip interconnects,” IEEE J. Sel. Top. Quantum Electron. 16, 1376–1385(2010).
[Crossref]

2009 (2)

D. A. B. Miller, “Device requirements for optical interconnects to silicon chips,” Proc. IEEE 97, 1166–1185 (2009).
[Crossref]

S. Klinger, M. Berroth, M. Kaschel, M. Oehme, and E. Kasper, “Ge-on-Si p-i-n photodiodes with a 3-dB bandwidth of 49 GHz,” IEEE Photonics Technol. Lett. 21, 920–922 (2009).
[Crossref]

2008 (1)

A. Fazzi, R. Canegallo, L. Ciccarelli, L. Magagni, F. Natali, E. Jung, P. Rolandi, and R. Guerrieri, “3-D capacitive interconnections with mono- and bi-directional capabilities,” IEEE J. Solid-State Circuits 43, 275–284 (2008).
[Crossref]

2007 (1)

J. M. T. Pereira, “Modeling the frequency response of p+InP/n–InGaAs/n+InP photodiodes with an arbitrary electric field profile,” COMPEL 26, 1114–1122 (2007).
[Crossref]

2006 (1)

M. Haurylau, G. Chen, H. Chen, J. Zhang, N. A. Nelson, D. H. Albonesi, E. G. Friedman, and P. M. Fauchet, “On-chip optical interconnect roadmap: challenges and critical directions,” IEEE J. Sel. Top. Quantum Electron. 12, 1699–1705 (2006).
[Crossref]

2003 (1)

C. Debaes, A. Bhatnagar, D. Agarwal, R. Chen, G. A. Keeler, N. C. Helman, H. Thienpont, and D. A. B. Miller, “Receiver-less optical clock injection for clock distribution networks,” IEEE J. Sel. Top. Quantum Electron. 9, 400–409 (2003).
[Crossref]

Agarwal, D.

C. Debaes, A. Bhatnagar, D. Agarwal, R. Chen, G. A. Keeler, N. C. Helman, H. Thienpont, and D. A. B. Miller, “Receiver-less optical clock injection for clock distribution networks,” IEEE J. Sel. Top. Quantum Electron. 9, 400–409 (2003).
[Crossref]

Agrawal, G. P.

G. P. Agrawal, Fiber-Optic Communication Systems, 4th ed. (Wiley, 2010).

Albonesi, D. H.

M. Haurylau, G. Chen, H. Chen, J. Zhang, N. A. Nelson, D. H. Albonesi, E. G. Friedman, and P. M. Fauchet, “On-chip optical interconnect roadmap: challenges and critical directions,” IEEE J. Sel. Top. Quantum Electron. 12, 1699–1705 (2006).
[Crossref]

Amemiya, T.

Z. Gu, D. Inoue, T. Amemiya, N. Nishiyama, and S. Arai, “20-Gbps operation of membrane-based GaInAs/InP waveguide-type p-i-n photodiode bonded on Si substrate,” Appl. Phys. Express 11, 022102 (2018).
[Crossref]

D. Inoue, T. Hiratani, K. Fukuda, T. Tomiyasu, Z. Gu, T. Amemiya, N. Nishiyama, and S. Arai, “Integrated optical link on Si substrate using membrane distributed-feedback laser and p-i-n photodiode,” IEEE J. Sel. Top. Quantum Electron. 23, 3700208 (2017).
[Crossref]

T. Tomiyasu, T. Hiratani, D. Inoue, N. Nakamura, K. Fukuda, T. Uryu, T. Amemiya, N. Nishiyama, and S. Arai, “High-differential quantum efficiency operation of GaInAsP/InP membrane distributed-reflector laser on Si,” Appl. Phys. Express 10, 062702(2017).
[Crossref]

T. Hiratani, D. Inoue, T. Tomiyasu, K. Fukuda, T. Amemiya, N. Nishiyama, and S. Arai, “High-efficiency operation of membrane distributed-reflector lasers on silicon substrate,” IEEE J. Sel. Top. Quantum Electron. 23, 3700108 (2017).
[Crossref]

T. Hiratani, D. Inoue, T. Tomiyasu, K. Fukuda, N. Nakamura, T. Amemiya, N. Nishiyama, and S. Arai, “High efficiency operation of GaInAsP/InP membrane distributed-reflector laser on Si,” IEEE Photonics Technol. Lett. 29, 1832–1835 (2017).
[Crossref]

Z. Gu, T. Uryu, N. Nakamura, D. Inoue, T. Amemiya, N. Nishiyama, and S. Arai, “On-chip membrane-based GaInAs/InP waveguide-type p-i-n photodiode fabricated on silicon substrate,” Appl. Opt. 56, 7841–7848 (2017).
[Crossref]

D. Inoue, T. Hiratani, K. Fukuda, T. Tomiyasu, T. Amemiya, N. Nishiyama, and S. Arai, “Low-bias current 10 Gbit/s direct modulation of GaInAsP/InP membrane DFB laser on silicon,” Opt. Express 24, 18571–18579 (2016).
[Crossref]

T. Hiratani, T. Shindo, K. Doi, Y. Atsuji, D. Inoue, T. Amemiya, N. Nishiyama, and S. Arai, “Energy cost analysis of membrane distributed-reflector lasers for on-chip optical interconnects,” IEEE J. Sel. Top. Quantum Electron. 21, 1503410 (2015).
[Crossref]

T. Hiratani, D. Inoue, T. Tomiyasu, Y. Atsuji, K. Fukuda, T. Amemiya, N. Nishiyama, and S. Arai, “Room-temperature continuous-wave operation of membrane distributed-reflector laser,” Appl. Phys. Express 8, 112701 (2015).
[Crossref]

D. Inoue, T. Hiratani, K. Fukuda, T. Tomiyasu, T. Amemiya, N. Nishiyama, and S. Arai, “High-modulation efficiency operation of GaInAsP/InP membrane distributed feedback laser on Si substrate,” Opt. Express 23, 29024–29031 (2015).
[Crossref]

D. Inoue, T. Hiratani, Y. Atsuji, T. Tomiyasu, T. Amemiya, N. Nishiyama, and S. Arai, “Monolithic integration of membrane-based butt-jointed built-in DFB lasers and p-i-n photodiodes bonded on Si substrate,” IEEE J. Sel. Top. Quantum Electron. 21, 1502907 (2015).
[Crossref]

S. Arai and T. Amemiya, “Semiconductor membrane lasers and photodiode on Si,” in Silicon Photonics, Vol. 99 of Semiconductors and Semimetals (Elsevier, 2018), pp. 71–95.

D. Inoue, J. Lee, T. Shindo, M. Futami, K. Doi, T. Amemiya, N. Nishiyama, and S. Arai, “Butt-joint built-in (BJB) structure for membrane photonic integration,” in International Conference on Indium Phosphide and Related Materials (IPRM) (2013), pp. 1–2.

Ang, L. P.

V. Suntharalingam, R. Berger, S. Clark, J. Knecht, A. Messier, K. Newcomb, D. Rathman, R. Slattery, A. Soares, C. Stevenson, K. Warner, D. Young, L. P. Ang, B. Mansoorian, and D. Shaver, “A 4-side tileable back illuminated 3D-integrated Mpixel CMOS image sensor,” in IEEE International Solid-State Circuits Conference—Digest of Technical Papers (IEEE, 2009), pp. 38–39.

Arai, S.

Z. Gu, D. Inoue, T. Amemiya, N. Nishiyama, and S. Arai, “20-Gbps operation of membrane-based GaInAs/InP waveguide-type p-i-n photodiode bonded on Si substrate,” Appl. Phys. Express 11, 022102 (2018).
[Crossref]

D. Inoue, T. Hiratani, K. Fukuda, T. Tomiyasu, Z. Gu, T. Amemiya, N. Nishiyama, and S. Arai, “Integrated optical link on Si substrate using membrane distributed-feedback laser and p-i-n photodiode,” IEEE J. Sel. Top. Quantum Electron. 23, 3700208 (2017).
[Crossref]

T. Tomiyasu, T. Hiratani, D. Inoue, N. Nakamura, K. Fukuda, T. Uryu, T. Amemiya, N. Nishiyama, and S. Arai, “High-differential quantum efficiency operation of GaInAsP/InP membrane distributed-reflector laser on Si,” Appl. Phys. Express 10, 062702(2017).
[Crossref]

Z. Gu, T. Uryu, N. Nakamura, D. Inoue, T. Amemiya, N. Nishiyama, and S. Arai, “On-chip membrane-based GaInAs/InP waveguide-type p-i-n photodiode fabricated on silicon substrate,” Appl. Opt. 56, 7841–7848 (2017).
[Crossref]

T. Hiratani, D. Inoue, T. Tomiyasu, K. Fukuda, N. Nakamura, T. Amemiya, N. Nishiyama, and S. Arai, “High efficiency operation of GaInAsP/InP membrane distributed-reflector laser on Si,” IEEE Photonics Technol. Lett. 29, 1832–1835 (2017).
[Crossref]

T. Hiratani, D. Inoue, T. Tomiyasu, K. Fukuda, T. Amemiya, N. Nishiyama, and S. Arai, “High-efficiency operation of membrane distributed-reflector lasers on silicon substrate,” IEEE J. Sel. Top. Quantum Electron. 23, 3700108 (2017).
[Crossref]

D. Inoue, T. Hiratani, K. Fukuda, T. Tomiyasu, T. Amemiya, N. Nishiyama, and S. Arai, “Low-bias current 10 Gbit/s direct modulation of GaInAsP/InP membrane DFB laser on silicon,” Opt. Express 24, 18571–18579 (2016).
[Crossref]

D. Inoue, T. Hiratani, K. Fukuda, T. Tomiyasu, T. Amemiya, N. Nishiyama, and S. Arai, “High-modulation efficiency operation of GaInAsP/InP membrane distributed feedback laser on Si substrate,” Opt. Express 23, 29024–29031 (2015).
[Crossref]

T. Hiratani, D. Inoue, T. Tomiyasu, Y. Atsuji, K. Fukuda, T. Amemiya, N. Nishiyama, and S. Arai, “Room-temperature continuous-wave operation of membrane distributed-reflector laser,” Appl. Phys. Express 8, 112701 (2015).
[Crossref]

T. Hiratani, T. Shindo, K. Doi, Y. Atsuji, D. Inoue, T. Amemiya, N. Nishiyama, and S. Arai, “Energy cost analysis of membrane distributed-reflector lasers for on-chip optical interconnects,” IEEE J. Sel. Top. Quantum Electron. 21, 1503410 (2015).
[Crossref]

D. Inoue, T. Hiratani, Y. Atsuji, T. Tomiyasu, T. Amemiya, N. Nishiyama, and S. Arai, “Monolithic integration of membrane-based butt-jointed built-in DFB lasers and p-i-n photodiodes bonded on Si substrate,” IEEE J. Sel. Top. Quantum Electron. 21, 1502907 (2015).
[Crossref]

S. Arai, N. Nishiyama, T. Maruyama, and T. Okumura, “GaInAsP/InP membrane lasers for optical interconnects,” IEEE J. Sel. Top. Quantum Electron. 17, 1381–1389 (2011).
[Crossref]

D. Inoue, J. Lee, T. Shindo, M. Futami, K. Doi, T. Amemiya, N. Nishiyama, and S. Arai, “Butt-joint built-in (BJB) structure for membrane photonic integration,” in International Conference on Indium Phosphide and Related Materials (IPRM) (2013), pp. 1–2.

S. Arai and T. Amemiya, “Semiconductor membrane lasers and photodiode on Si,” in Silicon Photonics, Vol. 99 of Semiconductors and Semimetals (Elsevier, 2018), pp. 71–95.

Assefa, S.

S. Assefa, F. Xia, W. M. J. Green, C. L. Schow, A. V. Rylyakov, and Y. A. Vlasov, “CMOS-integrated optical receivers for on-chip interconnects,” IEEE J. Sel. Top. Quantum Electron. 16, 1376–1385(2010).
[Crossref]

Atsuji, Y.

D. Inoue, T. Hiratani, Y. Atsuji, T. Tomiyasu, T. Amemiya, N. Nishiyama, and S. Arai, “Monolithic integration of membrane-based butt-jointed built-in DFB lasers and p-i-n photodiodes bonded on Si substrate,” IEEE J. Sel. Top. Quantum Electron. 21, 1502907 (2015).
[Crossref]

T. Hiratani, T. Shindo, K. Doi, Y. Atsuji, D. Inoue, T. Amemiya, N. Nishiyama, and S. Arai, “Energy cost analysis of membrane distributed-reflector lasers for on-chip optical interconnects,” IEEE J. Sel. Top. Quantum Electron. 21, 1503410 (2015).
[Crossref]

T. Hiratani, D. Inoue, T. Tomiyasu, Y. Atsuji, K. Fukuda, T. Amemiya, N. Nishiyama, and S. Arai, “Room-temperature continuous-wave operation of membrane distributed-reflector laser,” Appl. Phys. Express 8, 112701 (2015).
[Crossref]

Berger, R.

V. Suntharalingam, R. Berger, S. Clark, J. Knecht, A. Messier, K. Newcomb, D. Rathman, R. Slattery, A. Soares, C. Stevenson, K. Warner, D. Young, L. P. Ang, B. Mansoorian, and D. Shaver, “A 4-side tileable back illuminated 3D-integrated Mpixel CMOS image sensor,” in IEEE International Solid-State Circuits Conference—Digest of Technical Papers (IEEE, 2009), pp. 38–39.

Berroth, M.

S. Klinger, M. Berroth, M. Kaschel, M. Oehme, and E. Kasper, “Ge-on-Si p-i-n photodiodes with a 3-dB bandwidth of 49 GHz,” IEEE Photonics Technol. Lett. 21, 920–922 (2009).
[Crossref]

Bhatnagar, A.

C. Debaes, A. Bhatnagar, D. Agarwal, R. Chen, G. A. Keeler, N. C. Helman, H. Thienpont, and D. A. B. Miller, “Receiver-less optical clock injection for clock distribution networks,” IEEE J. Sel. Top. Quantum Electron. 9, 400–409 (2003).
[Crossref]

Canegallo, R.

A. Fazzi, R. Canegallo, L. Ciccarelli, L. Magagni, F. Natali, E. Jung, P. Rolandi, and R. Guerrieri, “3-D capacitive interconnections with mono- and bi-directional capabilities,” IEEE J. Solid-State Circuits 43, 275–284 (2008).
[Crossref]

Chen, G.

M. Haurylau, G. Chen, H. Chen, J. Zhang, N. A. Nelson, D. H. Albonesi, E. G. Friedman, and P. M. Fauchet, “On-chip optical interconnect roadmap: challenges and critical directions,” IEEE J. Sel. Top. Quantum Electron. 12, 1699–1705 (2006).
[Crossref]

Chen, H.

M. Haurylau, G. Chen, H. Chen, J. Zhang, N. A. Nelson, D. H. Albonesi, E. G. Friedman, and P. M. Fauchet, “On-chip optical interconnect roadmap: challenges and critical directions,” IEEE J. Sel. Top. Quantum Electron. 12, 1699–1705 (2006).
[Crossref]

Chen, R.

C. Debaes, A. Bhatnagar, D. Agarwal, R. Chen, G. A. Keeler, N. C. Helman, H. Thienpont, and D. A. B. Miller, “Receiver-less optical clock injection for clock distribution networks,” IEEE J. Sel. Top. Quantum Electron. 9, 400–409 (2003).
[Crossref]

Ciccarelli, L.

A. Fazzi, R. Canegallo, L. Ciccarelli, L. Magagni, F. Natali, E. Jung, P. Rolandi, and R. Guerrieri, “3-D capacitive interconnections with mono- and bi-directional capabilities,” IEEE J. Solid-State Circuits 43, 275–284 (2008).
[Crossref]

Clark, S.

V. Suntharalingam, R. Berger, S. Clark, J. Knecht, A. Messier, K. Newcomb, D. Rathman, R. Slattery, A. Soares, C. Stevenson, K. Warner, D. Young, L. P. Ang, B. Mansoorian, and D. Shaver, “A 4-side tileable back illuminated 3D-integrated Mpixel CMOS image sensor,” in IEEE International Solid-State Circuits Conference—Digest of Technical Papers (IEEE, 2009), pp. 38–39.

Debaes, C.

C. Debaes, A. Bhatnagar, D. Agarwal, R. Chen, G. A. Keeler, N. C. Helman, H. Thienpont, and D. A. B. Miller, “Receiver-less optical clock injection for clock distribution networks,” IEEE J. Sel. Top. Quantum Electron. 9, 400–409 (2003).
[Crossref]

Doi, K.

T. Hiratani, T. Shindo, K. Doi, Y. Atsuji, D. Inoue, T. Amemiya, N. Nishiyama, and S. Arai, “Energy cost analysis of membrane distributed-reflector lasers for on-chip optical interconnects,” IEEE J. Sel. Top. Quantum Electron. 21, 1503410 (2015).
[Crossref]

D. Inoue, J. Lee, T. Shindo, M. Futami, K. Doi, T. Amemiya, N. Nishiyama, and S. Arai, “Butt-joint built-in (BJB) structure for membrane photonic integration,” in International Conference on Indium Phosphide and Related Materials (IPRM) (2013), pp. 1–2.

Fauchet, P. M.

M. Haurylau, G. Chen, H. Chen, J. Zhang, N. A. Nelson, D. H. Albonesi, E. G. Friedman, and P. M. Fauchet, “On-chip optical interconnect roadmap: challenges and critical directions,” IEEE J. Sel. Top. Quantum Electron. 12, 1699–1705 (2006).
[Crossref]

Fazzi, A.

A. Fazzi, R. Canegallo, L. Ciccarelli, L. Magagni, F. Natali, E. Jung, P. Rolandi, and R. Guerrieri, “3-D capacitive interconnections with mono- and bi-directional capabilities,” IEEE J. Solid-State Circuits 43, 275–284 (2008).
[Crossref]

Friedman, E. G.

M. Haurylau, G. Chen, H. Chen, J. Zhang, N. A. Nelson, D. H. Albonesi, E. G. Friedman, and P. M. Fauchet, “On-chip optical interconnect roadmap: challenges and critical directions,” IEEE J. Sel. Top. Quantum Electron. 12, 1699–1705 (2006).
[Crossref]

Fujii, T.

Fukuda, K.

D. Inoue, T. Hiratani, K. Fukuda, T. Tomiyasu, Z. Gu, T. Amemiya, N. Nishiyama, and S. Arai, “Integrated optical link on Si substrate using membrane distributed-feedback laser and p-i-n photodiode,” IEEE J. Sel. Top. Quantum Electron. 23, 3700208 (2017).
[Crossref]

T. Tomiyasu, T. Hiratani, D. Inoue, N. Nakamura, K. Fukuda, T. Uryu, T. Amemiya, N. Nishiyama, and S. Arai, “High-differential quantum efficiency operation of GaInAsP/InP membrane distributed-reflector laser on Si,” Appl. Phys. Express 10, 062702(2017).
[Crossref]

T. Hiratani, D. Inoue, T. Tomiyasu, K. Fukuda, N. Nakamura, T. Amemiya, N. Nishiyama, and S. Arai, “High efficiency operation of GaInAsP/InP membrane distributed-reflector laser on Si,” IEEE Photonics Technol. Lett. 29, 1832–1835 (2017).
[Crossref]

T. Hiratani, D. Inoue, T. Tomiyasu, K. Fukuda, T. Amemiya, N. Nishiyama, and S. Arai, “High-efficiency operation of membrane distributed-reflector lasers on silicon substrate,” IEEE J. Sel. Top. Quantum Electron. 23, 3700108 (2017).
[Crossref]

D. Inoue, T. Hiratani, K. Fukuda, T. Tomiyasu, T. Amemiya, N. Nishiyama, and S. Arai, “Low-bias current 10 Gbit/s direct modulation of GaInAsP/InP membrane DFB laser on silicon,” Opt. Express 24, 18571–18579 (2016).
[Crossref]

T. Hiratani, D. Inoue, T. Tomiyasu, Y. Atsuji, K. Fukuda, T. Amemiya, N. Nishiyama, and S. Arai, “Room-temperature continuous-wave operation of membrane distributed-reflector laser,” Appl. Phys. Express 8, 112701 (2015).
[Crossref]

D. Inoue, T. Hiratani, K. Fukuda, T. Tomiyasu, T. Amemiya, N. Nishiyama, and S. Arai, “High-modulation efficiency operation of GaInAsP/InP membrane distributed feedback laser on Si substrate,” Opt. Express 23, 29024–29031 (2015).
[Crossref]

Futami, M.

D. Inoue, J. Lee, T. Shindo, M. Futami, K. Doi, T. Amemiya, N. Nishiyama, and S. Arai, “Butt-joint built-in (BJB) structure for membrane photonic integration,” in International Conference on Indium Phosphide and Related Materials (IPRM) (2013), pp. 1–2.

Green, W. M. J.

S. Assefa, F. Xia, W. M. J. Green, C. L. Schow, A. V. Rylyakov, and Y. A. Vlasov, “CMOS-integrated optical receivers for on-chip interconnects,” IEEE J. Sel. Top. Quantum Electron. 16, 1376–1385(2010).
[Crossref]

Gu, Z.

Z. Gu, D. Inoue, T. Amemiya, N. Nishiyama, and S. Arai, “20-Gbps operation of membrane-based GaInAs/InP waveguide-type p-i-n photodiode bonded on Si substrate,” Appl. Phys. Express 11, 022102 (2018).
[Crossref]

Z. Gu, T. Uryu, N. Nakamura, D. Inoue, T. Amemiya, N. Nishiyama, and S. Arai, “On-chip membrane-based GaInAs/InP waveguide-type p-i-n photodiode fabricated on silicon substrate,” Appl. Opt. 56, 7841–7848 (2017).
[Crossref]

D. Inoue, T. Hiratani, K. Fukuda, T. Tomiyasu, Z. Gu, T. Amemiya, N. Nishiyama, and S. Arai, “Integrated optical link on Si substrate using membrane distributed-feedback laser and p-i-n photodiode,” IEEE J. Sel. Top. Quantum Electron. 23, 3700208 (2017).
[Crossref]

Guerrieri, R.

A. Fazzi, R. Canegallo, L. Ciccarelli, L. Magagni, F. Natali, E. Jung, P. Rolandi, and R. Guerrieri, “3-D capacitive interconnections with mono- and bi-directional capabilities,” IEEE J. Solid-State Circuits 43, 275–284 (2008).
[Crossref]

Hasegawa, A.

K. Niitsu, Y. Shimazaki, Y. Sugimori, Y. Kohama, K. Kasuga, I. Nonomura, M. Saen, S. Komatsu, K. Osada, N. Irie, T. Hattori, A. Hasegawa, and T. Kuroda, “An inductive-coupling link for 3D integration of a 90 nm CMOS processor and a 65 nm CMOS SRAM,” in IEEE International Solid-State Circuits Conference—Digest of Technical Papers (IEEE, 2009), pp. 480–481.

Hattori, T.

K. Niitsu, Y. Shimazaki, Y. Sugimori, Y. Kohama, K. Kasuga, I. Nonomura, M. Saen, S. Komatsu, K. Osada, N. Irie, T. Hattori, A. Hasegawa, and T. Kuroda, “An inductive-coupling link for 3D integration of a 90 nm CMOS processor and a 65 nm CMOS SRAM,” in IEEE International Solid-State Circuits Conference—Digest of Technical Papers (IEEE, 2009), pp. 480–481.

Haurylau, M.

M. Haurylau, G. Chen, H. Chen, J. Zhang, N. A. Nelson, D. H. Albonesi, E. G. Friedman, and P. M. Fauchet, “On-chip optical interconnect roadmap: challenges and critical directions,” IEEE J. Sel. Top. Quantum Electron. 12, 1699–1705 (2006).
[Crossref]

Helman, N. C.

C. Debaes, A. Bhatnagar, D. Agarwal, R. Chen, G. A. Keeler, N. C. Helman, H. Thienpont, and D. A. B. Miller, “Receiver-less optical clock injection for clock distribution networks,” IEEE J. Sel. Top. Quantum Electron. 9, 400–409 (2003).
[Crossref]

Hiratani, T.

D. Inoue, T. Hiratani, K. Fukuda, T. Tomiyasu, Z. Gu, T. Amemiya, N. Nishiyama, and S. Arai, “Integrated optical link on Si substrate using membrane distributed-feedback laser and p-i-n photodiode,” IEEE J. Sel. Top. Quantum Electron. 23, 3700208 (2017).
[Crossref]

T. Hiratani, D. Inoue, T. Tomiyasu, K. Fukuda, N. Nakamura, T. Amemiya, N. Nishiyama, and S. Arai, “High efficiency operation of GaInAsP/InP membrane distributed-reflector laser on Si,” IEEE Photonics Technol. Lett. 29, 1832–1835 (2017).
[Crossref]

T. Tomiyasu, T. Hiratani, D. Inoue, N. Nakamura, K. Fukuda, T. Uryu, T. Amemiya, N. Nishiyama, and S. Arai, “High-differential quantum efficiency operation of GaInAsP/InP membrane distributed-reflector laser on Si,” Appl. Phys. Express 10, 062702(2017).
[Crossref]

T. Hiratani, D. Inoue, T. Tomiyasu, K. Fukuda, T. Amemiya, N. Nishiyama, and S. Arai, “High-efficiency operation of membrane distributed-reflector lasers on silicon substrate,” IEEE J. Sel. Top. Quantum Electron. 23, 3700108 (2017).
[Crossref]

D. Inoue, T. Hiratani, K. Fukuda, T. Tomiyasu, T. Amemiya, N. Nishiyama, and S. Arai, “Low-bias current 10 Gbit/s direct modulation of GaInAsP/InP membrane DFB laser on silicon,” Opt. Express 24, 18571–18579 (2016).
[Crossref]

D. Inoue, T. Hiratani, K. Fukuda, T. Tomiyasu, T. Amemiya, N. Nishiyama, and S. Arai, “High-modulation efficiency operation of GaInAsP/InP membrane distributed feedback laser on Si substrate,” Opt. Express 23, 29024–29031 (2015).
[Crossref]

T. Hiratani, T. Shindo, K. Doi, Y. Atsuji, D. Inoue, T. Amemiya, N. Nishiyama, and S. Arai, “Energy cost analysis of membrane distributed-reflector lasers for on-chip optical interconnects,” IEEE J. Sel. Top. Quantum Electron. 21, 1503410 (2015).
[Crossref]

T. Hiratani, D. Inoue, T. Tomiyasu, Y. Atsuji, K. Fukuda, T. Amemiya, N. Nishiyama, and S. Arai, “Room-temperature continuous-wave operation of membrane distributed-reflector laser,” Appl. Phys. Express 8, 112701 (2015).
[Crossref]

D. Inoue, T. Hiratani, Y. Atsuji, T. Tomiyasu, T. Amemiya, N. Nishiyama, and S. Arai, “Monolithic integration of membrane-based butt-jointed built-in DFB lasers and p-i-n photodiodes bonded on Si substrate,” IEEE J. Sel. Top. Quantum Electron. 21, 1502907 (2015).
[Crossref]

Inoue, D.

Z. Gu, D. Inoue, T. Amemiya, N. Nishiyama, and S. Arai, “20-Gbps operation of membrane-based GaInAs/InP waveguide-type p-i-n photodiode bonded on Si substrate,” Appl. Phys. Express 11, 022102 (2018).
[Crossref]

T. Hiratani, D. Inoue, T. Tomiyasu, K. Fukuda, N. Nakamura, T. Amemiya, N. Nishiyama, and S. Arai, “High efficiency operation of GaInAsP/InP membrane distributed-reflector laser on Si,” IEEE Photonics Technol. Lett. 29, 1832–1835 (2017).
[Crossref]

T. Hiratani, D. Inoue, T. Tomiyasu, K. Fukuda, T. Amemiya, N. Nishiyama, and S. Arai, “High-efficiency operation of membrane distributed-reflector lasers on silicon substrate,” IEEE J. Sel. Top. Quantum Electron. 23, 3700108 (2017).
[Crossref]

T. Tomiyasu, T. Hiratani, D. Inoue, N. Nakamura, K. Fukuda, T. Uryu, T. Amemiya, N. Nishiyama, and S. Arai, “High-differential quantum efficiency operation of GaInAsP/InP membrane distributed-reflector laser on Si,” Appl. Phys. Express 10, 062702(2017).
[Crossref]

D. Inoue, T. Hiratani, K. Fukuda, T. Tomiyasu, Z. Gu, T. Amemiya, N. Nishiyama, and S. Arai, “Integrated optical link on Si substrate using membrane distributed-feedback laser and p-i-n photodiode,” IEEE J. Sel. Top. Quantum Electron. 23, 3700208 (2017).
[Crossref]

Z. Gu, T. Uryu, N. Nakamura, D. Inoue, T. Amemiya, N. Nishiyama, and S. Arai, “On-chip membrane-based GaInAs/InP waveguide-type p-i-n photodiode fabricated on silicon substrate,” Appl. Opt. 56, 7841–7848 (2017).
[Crossref]

D. Inoue, T. Hiratani, K. Fukuda, T. Tomiyasu, T. Amemiya, N. Nishiyama, and S. Arai, “Low-bias current 10 Gbit/s direct modulation of GaInAsP/InP membrane DFB laser on silicon,” Opt. Express 24, 18571–18579 (2016).
[Crossref]

D. Inoue, T. Hiratani, K. Fukuda, T. Tomiyasu, T. Amemiya, N. Nishiyama, and S. Arai, “High-modulation efficiency operation of GaInAsP/InP membrane distributed feedback laser on Si substrate,” Opt. Express 23, 29024–29031 (2015).
[Crossref]

T. Hiratani, D. Inoue, T. Tomiyasu, Y. Atsuji, K. Fukuda, T. Amemiya, N. Nishiyama, and S. Arai, “Room-temperature continuous-wave operation of membrane distributed-reflector laser,” Appl. Phys. Express 8, 112701 (2015).
[Crossref]

T. Hiratani, T. Shindo, K. Doi, Y. Atsuji, D. Inoue, T. Amemiya, N. Nishiyama, and S. Arai, “Energy cost analysis of membrane distributed-reflector lasers for on-chip optical interconnects,” IEEE J. Sel. Top. Quantum Electron. 21, 1503410 (2015).
[Crossref]

D. Inoue, T. Hiratani, Y. Atsuji, T. Tomiyasu, T. Amemiya, N. Nishiyama, and S. Arai, “Monolithic integration of membrane-based butt-jointed built-in DFB lasers and p-i-n photodiodes bonded on Si substrate,” IEEE J. Sel. Top. Quantum Electron. 21, 1502907 (2015).
[Crossref]

D. Inoue, J. Lee, T. Shindo, M. Futami, K. Doi, T. Amemiya, N. Nishiyama, and S. Arai, “Butt-joint built-in (BJB) structure for membrane photonic integration,” in International Conference on Indium Phosphide and Related Materials (IPRM) (2013), pp. 1–2.

Irie, N.

K. Niitsu, Y. Shimazaki, Y. Sugimori, Y. Kohama, K. Kasuga, I. Nonomura, M. Saen, S. Komatsu, K. Osada, N. Irie, T. Hattori, A. Hasegawa, and T. Kuroda, “An inductive-coupling link for 3D integration of a 90 nm CMOS processor and a 65 nm CMOS SRAM,” in IEEE International Solid-State Circuits Conference—Digest of Technical Papers (IEEE, 2009), pp. 480–481.

Jung, E.

A. Fazzi, R. Canegallo, L. Ciccarelli, L. Magagni, F. Natali, E. Jung, P. Rolandi, and R. Guerrieri, “3-D capacitive interconnections with mono- and bi-directional capabilities,” IEEE J. Solid-State Circuits 43, 275–284 (2008).
[Crossref]

Kada, M.

M. Kada, “Development of functionally innovative 3D-integrated circuit (dream chip) technology/high-density 3D-integration technology for multifunctional devices,” in IEEE International Conference on 3D System Integration (IEEE, 2009), pp. 1–6.

Kaschel, M.

S. Klinger, M. Berroth, M. Kaschel, M. Oehme, and E. Kasper, “Ge-on-Si p-i-n photodiodes with a 3-dB bandwidth of 49 GHz,” IEEE Photonics Technol. Lett. 21, 920–922 (2009).
[Crossref]

Kasper, E.

S. Klinger, M. Berroth, M. Kaschel, M. Oehme, and E. Kasper, “Ge-on-Si p-i-n photodiodes with a 3-dB bandwidth of 49 GHz,” IEEE Photonics Technol. Lett. 21, 920–922 (2009).
[Crossref]

Kasuga, K.

K. Niitsu, Y. Shimazaki, Y. Sugimori, Y. Kohama, K. Kasuga, I. Nonomura, M. Saen, S. Komatsu, K. Osada, N. Irie, T. Hattori, A. Hasegawa, and T. Kuroda, “An inductive-coupling link for 3D integration of a 90 nm CMOS processor and a 65 nm CMOS SRAM,” in IEEE International Solid-State Circuits Conference—Digest of Technical Papers (IEEE, 2009), pp. 480–481.

Keeler, G. A.

C. Debaes, A. Bhatnagar, D. Agarwal, R. Chen, G. A. Keeler, N. C. Helman, H. Thienpont, and D. A. B. Miller, “Receiver-less optical clock injection for clock distribution networks,” IEEE J. Sel. Top. Quantum Electron. 9, 400–409 (2003).
[Crossref]

Klinger, S.

S. Klinger, M. Berroth, M. Kaschel, M. Oehme, and E. Kasper, “Ge-on-Si p-i-n photodiodes with a 3-dB bandwidth of 49 GHz,” IEEE Photonics Technol. Lett. 21, 920–922 (2009).
[Crossref]

Knecht, J.

V. Suntharalingam, R. Berger, S. Clark, J. Knecht, A. Messier, K. Newcomb, D. Rathman, R. Slattery, A. Soares, C. Stevenson, K. Warner, D. Young, L. P. Ang, B. Mansoorian, and D. Shaver, “A 4-side tileable back illuminated 3D-integrated Mpixel CMOS image sensor,” in IEEE International Solid-State Circuits Conference—Digest of Technical Papers (IEEE, 2009), pp. 38–39.

Kohama, Y.

K. Niitsu, Y. Shimazaki, Y. Sugimori, Y. Kohama, K. Kasuga, I. Nonomura, M. Saen, S. Komatsu, K. Osada, N. Irie, T. Hattori, A. Hasegawa, and T. Kuroda, “An inductive-coupling link for 3D integration of a 90 nm CMOS processor and a 65 nm CMOS SRAM,” in IEEE International Solid-State Circuits Conference—Digest of Technical Papers (IEEE, 2009), pp. 480–481.

Komatsu, S.

K. Niitsu, Y. Shimazaki, Y. Sugimori, Y. Kohama, K. Kasuga, I. Nonomura, M. Saen, S. Komatsu, K. Osada, N. Irie, T. Hattori, A. Hasegawa, and T. Kuroda, “An inductive-coupling link for 3D integration of a 90 nm CMOS processor and a 65 nm CMOS SRAM,” in IEEE International Solid-State Circuits Conference—Digest of Technical Papers (IEEE, 2009), pp. 480–481.

Kuramochi, E.

Kuroda, T.

K. Niitsu, Y. Shimazaki, Y. Sugimori, Y. Kohama, K. Kasuga, I. Nonomura, M. Saen, S. Komatsu, K. Osada, N. Irie, T. Hattori, A. Hasegawa, and T. Kuroda, “An inductive-coupling link for 3D integration of a 90 nm CMOS processor and a 65 nm CMOS SRAM,” in IEEE International Solid-State Circuits Conference—Digest of Technical Papers (IEEE, 2009), pp. 480–481.

Lee, J.

D. Inoue, J. Lee, T. Shindo, M. Futami, K. Doi, T. Amemiya, N. Nishiyama, and S. Arai, “Butt-joint built-in (BJB) structure for membrane photonic integration,” in International Conference on Indium Phosphide and Related Materials (IPRM) (2013), pp. 1–2.

Magagni, L.

A. Fazzi, R. Canegallo, L. Ciccarelli, L. Magagni, F. Natali, E. Jung, P. Rolandi, and R. Guerrieri, “3-D capacitive interconnections with mono- and bi-directional capabilities,” IEEE J. Solid-State Circuits 43, 275–284 (2008).
[Crossref]

Mansoorian, B.

V. Suntharalingam, R. Berger, S. Clark, J. Knecht, A. Messier, K. Newcomb, D. Rathman, R. Slattery, A. Soares, C. Stevenson, K. Warner, D. Young, L. P. Ang, B. Mansoorian, and D. Shaver, “A 4-side tileable back illuminated 3D-integrated Mpixel CMOS image sensor,” in IEEE International Solid-State Circuits Conference—Digest of Technical Papers (IEEE, 2009), pp. 38–39.

Maruyama, T.

S. Arai, N. Nishiyama, T. Maruyama, and T. Okumura, “GaInAsP/InP membrane lasers for optical interconnects,” IEEE J. Sel. Top. Quantum Electron. 17, 1381–1389 (2011).
[Crossref]

Matsuo, S.

Messier, A.

V. Suntharalingam, R. Berger, S. Clark, J. Knecht, A. Messier, K. Newcomb, D. Rathman, R. Slattery, A. Soares, C. Stevenson, K. Warner, D. Young, L. P. Ang, B. Mansoorian, and D. Shaver, “A 4-side tileable back illuminated 3D-integrated Mpixel CMOS image sensor,” in IEEE International Solid-State Circuits Conference—Digest of Technical Papers (IEEE, 2009), pp. 38–39.

Miller, D. A. B.

D. A. B. Miller, “Device requirements for optical interconnects to silicon chips,” Proc. IEEE 97, 1166–1185 (2009).
[Crossref]

C. Debaes, A. Bhatnagar, D. Agarwal, R. Chen, G. A. Keeler, N. C. Helman, H. Thienpont, and D. A. B. Miller, “Receiver-less optical clock injection for clock distribution networks,” IEEE J. Sel. Top. Quantum Electron. 9, 400–409 (2003).
[Crossref]

Nakamura, N.

T. Tomiyasu, T. Hiratani, D. Inoue, N. Nakamura, K. Fukuda, T. Uryu, T. Amemiya, N. Nishiyama, and S. Arai, “High-differential quantum efficiency operation of GaInAsP/InP membrane distributed-reflector laser on Si,” Appl. Phys. Express 10, 062702(2017).
[Crossref]

T. Hiratani, D. Inoue, T. Tomiyasu, K. Fukuda, N. Nakamura, T. Amemiya, N. Nishiyama, and S. Arai, “High efficiency operation of GaInAsP/InP membrane distributed-reflector laser on Si,” IEEE Photonics Technol. Lett. 29, 1832–1835 (2017).
[Crossref]

Z. Gu, T. Uryu, N. Nakamura, D. Inoue, T. Amemiya, N. Nishiyama, and S. Arai, “On-chip membrane-based GaInAs/InP waveguide-type p-i-n photodiode fabricated on silicon substrate,” Appl. Opt. 56, 7841–7848 (2017).
[Crossref]

Natali, F.

A. Fazzi, R. Canegallo, L. Ciccarelli, L. Magagni, F. Natali, E. Jung, P. Rolandi, and R. Guerrieri, “3-D capacitive interconnections with mono- and bi-directional capabilities,” IEEE J. Solid-State Circuits 43, 275–284 (2008).
[Crossref]

Nelson, N. A.

M. Haurylau, G. Chen, H. Chen, J. Zhang, N. A. Nelson, D. H. Albonesi, E. G. Friedman, and P. M. Fauchet, “On-chip optical interconnect roadmap: challenges and critical directions,” IEEE J. Sel. Top. Quantum Electron. 12, 1699–1705 (2006).
[Crossref]

Newcomb, K.

V. Suntharalingam, R. Berger, S. Clark, J. Knecht, A. Messier, K. Newcomb, D. Rathman, R. Slattery, A. Soares, C. Stevenson, K. Warner, D. Young, L. P. Ang, B. Mansoorian, and D. Shaver, “A 4-side tileable back illuminated 3D-integrated Mpixel CMOS image sensor,” in IEEE International Solid-State Circuits Conference—Digest of Technical Papers (IEEE, 2009), pp. 38–39.

Niitsu, K.

K. Niitsu, Y. Shimazaki, Y. Sugimori, Y. Kohama, K. Kasuga, I. Nonomura, M. Saen, S. Komatsu, K. Osada, N. Irie, T. Hattori, A. Hasegawa, and T. Kuroda, “An inductive-coupling link for 3D integration of a 90 nm CMOS processor and a 65 nm CMOS SRAM,” in IEEE International Solid-State Circuits Conference—Digest of Technical Papers (IEEE, 2009), pp. 480–481.

Nishiyama, N.

Z. Gu, D. Inoue, T. Amemiya, N. Nishiyama, and S. Arai, “20-Gbps operation of membrane-based GaInAs/InP waveguide-type p-i-n photodiode bonded on Si substrate,” Appl. Phys. Express 11, 022102 (2018).
[Crossref]

D. Inoue, T. Hiratani, K. Fukuda, T. Tomiyasu, Z. Gu, T. Amemiya, N. Nishiyama, and S. Arai, “Integrated optical link on Si substrate using membrane distributed-feedback laser and p-i-n photodiode,” IEEE J. Sel. Top. Quantum Electron. 23, 3700208 (2017).
[Crossref]

Z. Gu, T. Uryu, N. Nakamura, D. Inoue, T. Amemiya, N. Nishiyama, and S. Arai, “On-chip membrane-based GaInAs/InP waveguide-type p-i-n photodiode fabricated on silicon substrate,” Appl. Opt. 56, 7841–7848 (2017).
[Crossref]

T. Hiratani, D. Inoue, T. Tomiyasu, K. Fukuda, N. Nakamura, T. Amemiya, N. Nishiyama, and S. Arai, “High efficiency operation of GaInAsP/InP membrane distributed-reflector laser on Si,” IEEE Photonics Technol. Lett. 29, 1832–1835 (2017).
[Crossref]

T. Hiratani, D. Inoue, T. Tomiyasu, K. Fukuda, T. Amemiya, N. Nishiyama, and S. Arai, “High-efficiency operation of membrane distributed-reflector lasers on silicon substrate,” IEEE J. Sel. Top. Quantum Electron. 23, 3700108 (2017).
[Crossref]

T. Tomiyasu, T. Hiratani, D. Inoue, N. Nakamura, K. Fukuda, T. Uryu, T. Amemiya, N. Nishiyama, and S. Arai, “High-differential quantum efficiency operation of GaInAsP/InP membrane distributed-reflector laser on Si,” Appl. Phys. Express 10, 062702(2017).
[Crossref]

D. Inoue, T. Hiratani, K. Fukuda, T. Tomiyasu, T. Amemiya, N. Nishiyama, and S. Arai, “Low-bias current 10 Gbit/s direct modulation of GaInAsP/InP membrane DFB laser on silicon,” Opt. Express 24, 18571–18579 (2016).
[Crossref]

T. Hiratani, T. Shindo, K. Doi, Y. Atsuji, D. Inoue, T. Amemiya, N. Nishiyama, and S. Arai, “Energy cost analysis of membrane distributed-reflector lasers for on-chip optical interconnects,” IEEE J. Sel. Top. Quantum Electron. 21, 1503410 (2015).
[Crossref]

T. Hiratani, D. Inoue, T. Tomiyasu, Y. Atsuji, K. Fukuda, T. Amemiya, N. Nishiyama, and S. Arai, “Room-temperature continuous-wave operation of membrane distributed-reflector laser,” Appl. Phys. Express 8, 112701 (2015).
[Crossref]

D. Inoue, T. Hiratani, K. Fukuda, T. Tomiyasu, T. Amemiya, N. Nishiyama, and S. Arai, “High-modulation efficiency operation of GaInAsP/InP membrane distributed feedback laser on Si substrate,” Opt. Express 23, 29024–29031 (2015).
[Crossref]

D. Inoue, T. Hiratani, Y. Atsuji, T. Tomiyasu, T. Amemiya, N. Nishiyama, and S. Arai, “Monolithic integration of membrane-based butt-jointed built-in DFB lasers and p-i-n photodiodes bonded on Si substrate,” IEEE J. Sel. Top. Quantum Electron. 21, 1502907 (2015).
[Crossref]

S. Arai, N. Nishiyama, T. Maruyama, and T. Okumura, “GaInAsP/InP membrane lasers for optical interconnects,” IEEE J. Sel. Top. Quantum Electron. 17, 1381–1389 (2011).
[Crossref]

D. Inoue, J. Lee, T. Shindo, M. Futami, K. Doi, T. Amemiya, N. Nishiyama, and S. Arai, “Butt-joint built-in (BJB) structure for membrane photonic integration,” in International Conference on Indium Phosphide and Related Materials (IPRM) (2013), pp. 1–2.

Nonomura, I.

K. Niitsu, Y. Shimazaki, Y. Sugimori, Y. Kohama, K. Kasuga, I. Nonomura, M. Saen, S. Komatsu, K. Osada, N. Irie, T. Hattori, A. Hasegawa, and T. Kuroda, “An inductive-coupling link for 3D integration of a 90 nm CMOS processor and a 65 nm CMOS SRAM,” in IEEE International Solid-State Circuits Conference—Digest of Technical Papers (IEEE, 2009), pp. 480–481.

Notomi, M.

Nozaki, K.

Oehme, M.

S. Klinger, M. Berroth, M. Kaschel, M. Oehme, and E. Kasper, “Ge-on-Si p-i-n photodiodes with a 3-dB bandwidth of 49 GHz,” IEEE Photonics Technol. Lett. 21, 920–922 (2009).
[Crossref]

Okumura, T.

S. Arai, N. Nishiyama, T. Maruyama, and T. Okumura, “GaInAsP/InP membrane lasers for optical interconnects,” IEEE J. Sel. Top. Quantum Electron. 17, 1381–1389 (2011).
[Crossref]

Ono, M.

Osada, K.

K. Niitsu, Y. Shimazaki, Y. Sugimori, Y. Kohama, K. Kasuga, I. Nonomura, M. Saen, S. Komatsu, K. Osada, N. Irie, T. Hattori, A. Hasegawa, and T. Kuroda, “An inductive-coupling link for 3D integration of a 90 nm CMOS processor and a 65 nm CMOS SRAM,” in IEEE International Solid-State Circuits Conference—Digest of Technical Papers (IEEE, 2009), pp. 480–481.

Pereira, J. M. T.

J. M. T. Pereira, “Modeling the frequency response of p+InP/n–InGaAs/n+InP photodiodes with an arbitrary electric field profile,” COMPEL 26, 1114–1122 (2007).
[Crossref]

Rathman, D.

V. Suntharalingam, R. Berger, S. Clark, J. Knecht, A. Messier, K. Newcomb, D. Rathman, R. Slattery, A. Soares, C. Stevenson, K. Warner, D. Young, L. P. Ang, B. Mansoorian, and D. Shaver, “A 4-side tileable back illuminated 3D-integrated Mpixel CMOS image sensor,” in IEEE International Solid-State Circuits Conference—Digest of Technical Papers (IEEE, 2009), pp. 38–39.

Rolandi, P.

A. Fazzi, R. Canegallo, L. Ciccarelli, L. Magagni, F. Natali, E. Jung, P. Rolandi, and R. Guerrieri, “3-D capacitive interconnections with mono- and bi-directional capabilities,” IEEE J. Solid-State Circuits 43, 275–284 (2008).
[Crossref]

Rylyakov, A. V.

S. Assefa, F. Xia, W. M. J. Green, C. L. Schow, A. V. Rylyakov, and Y. A. Vlasov, “CMOS-integrated optical receivers for on-chip interconnects,” IEEE J. Sel. Top. Quantum Electron. 16, 1376–1385(2010).
[Crossref]

Saen, M.

K. Niitsu, Y. Shimazaki, Y. Sugimori, Y. Kohama, K. Kasuga, I. Nonomura, M. Saen, S. Komatsu, K. Osada, N. Irie, T. Hattori, A. Hasegawa, and T. Kuroda, “An inductive-coupling link for 3D integration of a 90 nm CMOS processor and a 65 nm CMOS SRAM,” in IEEE International Solid-State Circuits Conference—Digest of Technical Papers (IEEE, 2009), pp. 480–481.

Sato, T.

Schow, C. L.

S. Assefa, F. Xia, W. M. J. Green, C. L. Schow, A. V. Rylyakov, and Y. A. Vlasov, “CMOS-integrated optical receivers for on-chip interconnects,” IEEE J. Sel. Top. Quantum Electron. 16, 1376–1385(2010).
[Crossref]

Shakoor, A.

Shaver, D.

V. Suntharalingam, R. Berger, S. Clark, J. Knecht, A. Messier, K. Newcomb, D. Rathman, R. Slattery, A. Soares, C. Stevenson, K. Warner, D. Young, L. P. Ang, B. Mansoorian, and D. Shaver, “A 4-side tileable back illuminated 3D-integrated Mpixel CMOS image sensor,” in IEEE International Solid-State Circuits Conference—Digest of Technical Papers (IEEE, 2009), pp. 38–39.

Shimazaki, Y.

K. Niitsu, Y. Shimazaki, Y. Sugimori, Y. Kohama, K. Kasuga, I. Nonomura, M. Saen, S. Komatsu, K. Osada, N. Irie, T. Hattori, A. Hasegawa, and T. Kuroda, “An inductive-coupling link for 3D integration of a 90 nm CMOS processor and a 65 nm CMOS SRAM,” in IEEE International Solid-State Circuits Conference—Digest of Technical Papers (IEEE, 2009), pp. 480–481.

Shindo, T.

T. Hiratani, T. Shindo, K. Doi, Y. Atsuji, D. Inoue, T. Amemiya, N. Nishiyama, and S. Arai, “Energy cost analysis of membrane distributed-reflector lasers for on-chip optical interconnects,” IEEE J. Sel. Top. Quantum Electron. 21, 1503410 (2015).
[Crossref]

D. Inoue, J. Lee, T. Shindo, M. Futami, K. Doi, T. Amemiya, N. Nishiyama, and S. Arai, “Butt-joint built-in (BJB) structure for membrane photonic integration,” in International Conference on Indium Phosphide and Related Materials (IPRM) (2013), pp. 1–2.

Slattery, R.

V. Suntharalingam, R. Berger, S. Clark, J. Knecht, A. Messier, K. Newcomb, D. Rathman, R. Slattery, A. Soares, C. Stevenson, K. Warner, D. Young, L. P. Ang, B. Mansoorian, and D. Shaver, “A 4-side tileable back illuminated 3D-integrated Mpixel CMOS image sensor,” in IEEE International Solid-State Circuits Conference—Digest of Technical Papers (IEEE, 2009), pp. 38–39.

Soares, A.

V. Suntharalingam, R. Berger, S. Clark, J. Knecht, A. Messier, K. Newcomb, D. Rathman, R. Slattery, A. Soares, C. Stevenson, K. Warner, D. Young, L. P. Ang, B. Mansoorian, and D. Shaver, “A 4-side tileable back illuminated 3D-integrated Mpixel CMOS image sensor,” in IEEE International Solid-State Circuits Conference—Digest of Technical Papers (IEEE, 2009), pp. 38–39.

Stevenson, C.

V. Suntharalingam, R. Berger, S. Clark, J. Knecht, A. Messier, K. Newcomb, D. Rathman, R. Slattery, A. Soares, C. Stevenson, K. Warner, D. Young, L. P. Ang, B. Mansoorian, and D. Shaver, “A 4-side tileable back illuminated 3D-integrated Mpixel CMOS image sensor,” in IEEE International Solid-State Circuits Conference—Digest of Technical Papers (IEEE, 2009), pp. 38–39.

Sugimori, Y.

K. Niitsu, Y. Shimazaki, Y. Sugimori, Y. Kohama, K. Kasuga, I. Nonomura, M. Saen, S. Komatsu, K. Osada, N. Irie, T. Hattori, A. Hasegawa, and T. Kuroda, “An inductive-coupling link for 3D integration of a 90 nm CMOS processor and a 65 nm CMOS SRAM,” in IEEE International Solid-State Circuits Conference—Digest of Technical Papers (IEEE, 2009), pp. 480–481.

Suntharalingam, V.

V. Suntharalingam, R. Berger, S. Clark, J. Knecht, A. Messier, K. Newcomb, D. Rathman, R. Slattery, A. Soares, C. Stevenson, K. Warner, D. Young, L. P. Ang, B. Mansoorian, and D. Shaver, “A 4-side tileable back illuminated 3D-integrated Mpixel CMOS image sensor,” in IEEE International Solid-State Circuits Conference—Digest of Technical Papers (IEEE, 2009), pp. 38–39.

Takeda, K.

Thienpont, H.

C. Debaes, A. Bhatnagar, D. Agarwal, R. Chen, G. A. Keeler, N. C. Helman, H. Thienpont, and D. A. B. Miller, “Receiver-less optical clock injection for clock distribution networks,” IEEE J. Sel. Top. Quantum Electron. 9, 400–409 (2003).
[Crossref]

Tomiyasu, T.

D. Inoue, T. Hiratani, K. Fukuda, T. Tomiyasu, Z. Gu, T. Amemiya, N. Nishiyama, and S. Arai, “Integrated optical link on Si substrate using membrane distributed-feedback laser and p-i-n photodiode,” IEEE J. Sel. Top. Quantum Electron. 23, 3700208 (2017).
[Crossref]

T. Tomiyasu, T. Hiratani, D. Inoue, N. Nakamura, K. Fukuda, T. Uryu, T. Amemiya, N. Nishiyama, and S. Arai, “High-differential quantum efficiency operation of GaInAsP/InP membrane distributed-reflector laser on Si,” Appl. Phys. Express 10, 062702(2017).
[Crossref]

T. Hiratani, D. Inoue, T. Tomiyasu, K. Fukuda, T. Amemiya, N. Nishiyama, and S. Arai, “High-efficiency operation of membrane distributed-reflector lasers on silicon substrate,” IEEE J. Sel. Top. Quantum Electron. 23, 3700108 (2017).
[Crossref]

T. Hiratani, D. Inoue, T. Tomiyasu, K. Fukuda, N. Nakamura, T. Amemiya, N. Nishiyama, and S. Arai, “High efficiency operation of GaInAsP/InP membrane distributed-reflector laser on Si,” IEEE Photonics Technol. Lett. 29, 1832–1835 (2017).
[Crossref]

D. Inoue, T. Hiratani, K. Fukuda, T. Tomiyasu, T. Amemiya, N. Nishiyama, and S. Arai, “Low-bias current 10 Gbit/s direct modulation of GaInAsP/InP membrane DFB laser on silicon,” Opt. Express 24, 18571–18579 (2016).
[Crossref]

D. Inoue, T. Hiratani, K. Fukuda, T. Tomiyasu, T. Amemiya, N. Nishiyama, and S. Arai, “High-modulation efficiency operation of GaInAsP/InP membrane distributed feedback laser on Si substrate,” Opt. Express 23, 29024–29031 (2015).
[Crossref]

T. Hiratani, D. Inoue, T. Tomiyasu, Y. Atsuji, K. Fukuda, T. Amemiya, N. Nishiyama, and S. Arai, “Room-temperature continuous-wave operation of membrane distributed-reflector laser,” Appl. Phys. Express 8, 112701 (2015).
[Crossref]

D. Inoue, T. Hiratani, Y. Atsuji, T. Tomiyasu, T. Amemiya, N. Nishiyama, and S. Arai, “Monolithic integration of membrane-based butt-jointed built-in DFB lasers and p-i-n photodiodes bonded on Si substrate,” IEEE J. Sel. Top. Quantum Electron. 21, 1502907 (2015).
[Crossref]

Uryu, T.

Z. Gu, T. Uryu, N. Nakamura, D. Inoue, T. Amemiya, N. Nishiyama, and S. Arai, “On-chip membrane-based GaInAs/InP waveguide-type p-i-n photodiode fabricated on silicon substrate,” Appl. Opt. 56, 7841–7848 (2017).
[Crossref]

T. Tomiyasu, T. Hiratani, D. Inoue, N. Nakamura, K. Fukuda, T. Uryu, T. Amemiya, N. Nishiyama, and S. Arai, “High-differential quantum efficiency operation of GaInAsP/InP membrane distributed-reflector laser on Si,” Appl. Phys. Express 10, 062702(2017).
[Crossref]

Vlasov, Y. A.

S. Assefa, F. Xia, W. M. J. Green, C. L. Schow, A. V. Rylyakov, and Y. A. Vlasov, “CMOS-integrated optical receivers for on-chip interconnects,” IEEE J. Sel. Top. Quantum Electron. 16, 1376–1385(2010).
[Crossref]

Warner, K.

V. Suntharalingam, R. Berger, S. Clark, J. Knecht, A. Messier, K. Newcomb, D. Rathman, R. Slattery, A. Soares, C. Stevenson, K. Warner, D. Young, L. P. Ang, B. Mansoorian, and D. Shaver, “A 4-side tileable back illuminated 3D-integrated Mpixel CMOS image sensor,” in IEEE International Solid-State Circuits Conference—Digest of Technical Papers (IEEE, 2009), pp. 38–39.

Xia, F.

S. Assefa, F. Xia, W. M. J. Green, C. L. Schow, A. V. Rylyakov, and Y. A. Vlasov, “CMOS-integrated optical receivers for on-chip interconnects,” IEEE J. Sel. Top. Quantum Electron. 16, 1376–1385(2010).
[Crossref]

Young, D.

V. Suntharalingam, R. Berger, S. Clark, J. Knecht, A. Messier, K. Newcomb, D. Rathman, R. Slattery, A. Soares, C. Stevenson, K. Warner, D. Young, L. P. Ang, B. Mansoorian, and D. Shaver, “A 4-side tileable back illuminated 3D-integrated Mpixel CMOS image sensor,” in IEEE International Solid-State Circuits Conference—Digest of Technical Papers (IEEE, 2009), pp. 38–39.

Zhang, J.

M. Haurylau, G. Chen, H. Chen, J. Zhang, N. A. Nelson, D. H. Albonesi, E. G. Friedman, and P. M. Fauchet, “On-chip optical interconnect roadmap: challenges and critical directions,” IEEE J. Sel. Top. Quantum Electron. 12, 1699–1705 (2006).
[Crossref]

Appl. Opt. (1)

Appl. Phys. Express (3)

Z. Gu, D. Inoue, T. Amemiya, N. Nishiyama, and S. Arai, “20-Gbps operation of membrane-based GaInAs/InP waveguide-type p-i-n photodiode bonded on Si substrate,” Appl. Phys. Express 11, 022102 (2018).
[Crossref]

T. Hiratani, D. Inoue, T. Tomiyasu, Y. Atsuji, K. Fukuda, T. Amemiya, N. Nishiyama, and S. Arai, “Room-temperature continuous-wave operation of membrane distributed-reflector laser,” Appl. Phys. Express 8, 112701 (2015).
[Crossref]

T. Tomiyasu, T. Hiratani, D. Inoue, N. Nakamura, K. Fukuda, T. Uryu, T. Amemiya, N. Nishiyama, and S. Arai, “High-differential quantum efficiency operation of GaInAsP/InP membrane distributed-reflector laser on Si,” Appl. Phys. Express 10, 062702(2017).
[Crossref]

COMPEL (1)

J. M. T. Pereira, “Modeling the frequency response of p+InP/n–InGaAs/n+InP photodiodes with an arbitrary electric field profile,” COMPEL 26, 1114–1122 (2007).
[Crossref]

IEEE J. Sel. Top. Quantum Electron. (8)

C. Debaes, A. Bhatnagar, D. Agarwal, R. Chen, G. A. Keeler, N. C. Helman, H. Thienpont, and D. A. B. Miller, “Receiver-less optical clock injection for clock distribution networks,” IEEE J. Sel. Top. Quantum Electron. 9, 400–409 (2003).
[Crossref]

S. Assefa, F. Xia, W. M. J. Green, C. L. Schow, A. V. Rylyakov, and Y. A. Vlasov, “CMOS-integrated optical receivers for on-chip interconnects,” IEEE J. Sel. Top. Quantum Electron. 16, 1376–1385(2010).
[Crossref]

T. Hiratani, D. Inoue, T. Tomiyasu, K. Fukuda, T. Amemiya, N. Nishiyama, and S. Arai, “High-efficiency operation of membrane distributed-reflector lasers on silicon substrate,” IEEE J. Sel. Top. Quantum Electron. 23, 3700108 (2017).
[Crossref]

M. Haurylau, G. Chen, H. Chen, J. Zhang, N. A. Nelson, D. H. Albonesi, E. G. Friedman, and P. M. Fauchet, “On-chip optical interconnect roadmap: challenges and critical directions,” IEEE J. Sel. Top. Quantum Electron. 12, 1699–1705 (2006).
[Crossref]

S. Arai, N. Nishiyama, T. Maruyama, and T. Okumura, “GaInAsP/InP membrane lasers for optical interconnects,” IEEE J. Sel. Top. Quantum Electron. 17, 1381–1389 (2011).
[Crossref]

T. Hiratani, T. Shindo, K. Doi, Y. Atsuji, D. Inoue, T. Amemiya, N. Nishiyama, and S. Arai, “Energy cost analysis of membrane distributed-reflector lasers for on-chip optical interconnects,” IEEE J. Sel. Top. Quantum Electron. 21, 1503410 (2015).
[Crossref]

D. Inoue, T. Hiratani, Y. Atsuji, T. Tomiyasu, T. Amemiya, N. Nishiyama, and S. Arai, “Monolithic integration of membrane-based butt-jointed built-in DFB lasers and p-i-n photodiodes bonded on Si substrate,” IEEE J. Sel. Top. Quantum Electron. 21, 1502907 (2015).
[Crossref]

D. Inoue, T. Hiratani, K. Fukuda, T. Tomiyasu, Z. Gu, T. Amemiya, N. Nishiyama, and S. Arai, “Integrated optical link on Si substrate using membrane distributed-feedback laser and p-i-n photodiode,” IEEE J. Sel. Top. Quantum Electron. 23, 3700208 (2017).
[Crossref]

IEEE J. Solid-State Circuits (1)

A. Fazzi, R. Canegallo, L. Ciccarelli, L. Magagni, F. Natali, E. Jung, P. Rolandi, and R. Guerrieri, “3-D capacitive interconnections with mono- and bi-directional capabilities,” IEEE J. Solid-State Circuits 43, 275–284 (2008).
[Crossref]

IEEE Photonics Technol. Lett. (2)

T. Hiratani, D. Inoue, T. Tomiyasu, K. Fukuda, N. Nakamura, T. Amemiya, N. Nishiyama, and S. Arai, “High efficiency operation of GaInAsP/InP membrane distributed-reflector laser on Si,” IEEE Photonics Technol. Lett. 29, 1832–1835 (2017).
[Crossref]

S. Klinger, M. Berroth, M. Kaschel, M. Oehme, and E. Kasper, “Ge-on-Si p-i-n photodiodes with a 3-dB bandwidth of 49 GHz,” IEEE Photonics Technol. Lett. 21, 920–922 (2009).
[Crossref]

Opt. Express (3)

Optica (1)

Proc. IEEE (1)

D. A. B. Miller, “Device requirements for optical interconnects to silicon chips,” Proc. IEEE 97, 1166–1185 (2009).
[Crossref]

Other (6)

K. Niitsu, Y. Shimazaki, Y. Sugimori, Y. Kohama, K. Kasuga, I. Nonomura, M. Saen, S. Komatsu, K. Osada, N. Irie, T. Hattori, A. Hasegawa, and T. Kuroda, “An inductive-coupling link for 3D integration of a 90 nm CMOS processor and a 65 nm CMOS SRAM,” in IEEE International Solid-State Circuits Conference—Digest of Technical Papers (IEEE, 2009), pp. 480–481.

M. Kada, “Development of functionally innovative 3D-integrated circuit (dream chip) technology/high-density 3D-integration technology for multifunctional devices,” in IEEE International Conference on 3D System Integration (IEEE, 2009), pp. 1–6.

V. Suntharalingam, R. Berger, S. Clark, J. Knecht, A. Messier, K. Newcomb, D. Rathman, R. Slattery, A. Soares, C. Stevenson, K. Warner, D. Young, L. P. Ang, B. Mansoorian, and D. Shaver, “A 4-side tileable back illuminated 3D-integrated Mpixel CMOS image sensor,” in IEEE International Solid-State Circuits Conference—Digest of Technical Papers (IEEE, 2009), pp. 38–39.

S. Arai and T. Amemiya, “Semiconductor membrane lasers and photodiode on Si,” in Silicon Photonics, Vol. 99 of Semiconductors and Semimetals (Elsevier, 2018), pp. 71–95.

D. Inoue, J. Lee, T. Shindo, M. Futami, K. Doi, T. Amemiya, N. Nishiyama, and S. Arai, “Butt-joint built-in (BJB) structure for membrane photonic integration,” in International Conference on Indium Phosphide and Related Materials (IPRM) (2013), pp. 1–2.

G. P. Agrawal, Fiber-Optic Communication Systems, 4th ed. (Wiley, 2010).

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Figures (13)

Fig. 1.
Fig. 1. Conceptual diagram of an MPIC bonded on Si-based CMOS LSI circuit.
Fig. 2.
Fig. 2. (a) Simplified schematic of the membrane interconnection system. (b) Equivalent circuit of the receiverless PD.
Fig. 3.
Fig. 3. (a) Relationship between R L and C j used to determine the required bandwidth. (b) Received power requirement of the membrane PD for a data rate of 10 Gbps (indicated by the red line) and required output power of the laser (indicated by the black line) as a function of the load resistance, R L .
Fig. 4.
Fig. 4. (a) Schematic of the membrane GaInAs p - i - n PD with the back-end DBR. Conceptual diagrams of the membrane GaInAs p - i - n PD with the back-end DBR in the (b) active region and (c) passive region.
Fig. 5.
Fig. 5. Numerical model of the DBR grating structure model used for the TMM simulations.
Fig. 6.
Fig. 6. (a) Reflectivity and (b) transmittivity as a function of the absorption section length and DBR section length for the membrane PD with DBR in the GaInAs absorption region (Type A device).
Fig. 7.
Fig. 7. (a) Reflectivity and (b) transmittivity as a function of the absorption section length and DBR section length for the membrane PD with the back-end DBR in the GaInAsP passive section (Type B device).
Fig. 8.
Fig. 8. Optimum device length as a function of the absorption section length and DBR section length for the (a) Type A and (b) Type B devices.
Fig. 9.
Fig. 9. Required device length as a function of the stripe width.
Fig. 10.
Fig. 10. Junction capacitance as a function of the stripe width for two types of membrane PDs.
Fig. 11.
Fig. 11. Numerical model used for the 3-dB bandwidth estimation.
Fig. 12.
Fig. 12. Theoretical curves of the 3-dB bandwidth for different I pd values: (a) 5 μA, (b) 20 μA, and (c) 80 μA. Red line, PD with the back-end DBR in the GaInAsP passive region (Type B device); blue line, PD with the back-end DBR in the GaInAs absorption region (Type A device); dashed line, PD without the back-end DBR.
Fig. 13.
Fig. 13. Theoretical curves of the 3-dB bandwidth and output voltage V out as a function of the photocurrent I pd for different stripe widths. (a) PD with the back-end DBR in the GaInAs absorption region (Type A device); (b) PD with the back-end DBR in the GaInAsP passive region (Type B device); (c) PD without the back-end DBR.

Equations (19)

Equations on this page are rendered with MathJax. Learn more.

BER = 1 2 erfc ( SNR 2 2 ) ,
SNR = 4 Q 2 ,
Q = I 1 I 0 σ 1 + σ 0 ,
SNR thermal = R L R esp 2 P in 2 4 k B T emp f 4 Q 2 ,
SNR shot = R esp P in 2 q f Q 2 ,
V out = P in × R esp × R L .
[ E r ( L ) E l ( L ) ] = M ma · ( M sm · M s · M ms · M m ) N · M L [ E r ( 0 ) E l ( 0 ) ] = [ M 11 M 12 M 21 M 22 ] [ E r ( 0 ) E l ( 0 ) ] ,
M m ( s ) = [ e j β m ( s ) L m ( s ) 0 0 e j β m ( s ) L m ( s ) ] ,
M ms ( sm ) = 1 2 n m ( s ) n s ( m ) [ n s ( m ) + n m ( s ) n s ( m ) n m ( s ) n s ( m ) n m ( s ) n s ( m ) + n m ( s ) ] ,
M L = [ e j β abs L abs 0 0 e j β abs L abs ] ,
M ma = 1 1 R [ 1 R R 1 ] { R = ( n s 1 n s + 1 ) 2 } .
R = | E r ( 0 ) E l ( 0 ) | 2 = | M 21 | 2 | M 22 | 2 ,
T = | E r ( L ) E r ( 0 ) | 2 = | M 11 M 22 M 12 M 21 | 2 | M 22 | 2 = 1 | M 22 | 2 .
L = L abs + L DBR .
L = L abs .
1 f 3 dB 2 = 1 f RC 2 + 1 f TT 2 ,
f RC = 1 2 π ( R L + R s ) C j ,
f TT = 2 π υ sat · tanh ( μ h · V i W s · 1 υ sat ) W s ,
V i = V b ( R L + R S ) · I pd .

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