Abstract

The overall performance of modern computing systems is increasingly determined by the characteristics of the interconnection network used to provide communication links between on-chip cores and off-chip memory. Photonic technology has been proposed as an alternative to traditional electronic interconnects because of its advantages in bandwidth density, latency, and power efficiency. Circuit-switched photonic interconnect topologies take advantage of the optical spectrum to create high-bandwidth transmission links through the transmission of data channels on multiple parallel wavelengths; however, this technique suffers from low path diversity and high setup time overhead, which induces high network resource contention, unfairness, and long latencies. This work improves upon the circuit-switching paradigm by introducing the use of on-chip wavelength-selective spatial routing to produce multiple logical communication layers on a single physical plane. This technique yields higher path diversity in photonic interconnection networks, demonstrating as much as 764% saturation bandwidth improvement with synthetic traffic and as much as 89% improvement in execution time and energy dissipation for traffic from scientific application traces.

© 2012 OSA

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2012 (1)

A. B. Kahng, B. Li, L.-S. Peh, and K. Samadi, “ORION 2.0: A power-area simulator for interconnection networks,” IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 20, no. 1, pp. 191–196, Jan.2012.

2011 (3)

A. Biberman, K. Preston, G. Hendry, N. Sherwood-Droz, J. Chan, J. S. Levy, M. Lipson, and K. Bergman, “Photonic network-on-chip architectures using multilayer deposited silicon materials for high-performance chip multiprocessors,” ACM J. Emerging Technol. Comput. Syst., vol. 7, pp. 7:1–7:25, July2011.

J. Chan, G. Hendry, K. Bergman, and L. Carloni, “Physical-layer modeling and system-level design of chip-scale photonic interconnection networks,” IEEE Trans. Comput.-Aided Des., vol. 30, no. 10, pp. 1507–1520, Oct.2011.
[CrossRef]

J. Feng, Q. Li, and Z. Zhou, “Single ring interferometer configuration with doubled free-spectral range,” IEEE Photon. Technol. Lett., vol. 23, no. 2, pp. 79–81, Jan.2011.
[CrossRef]

2010 (1)

2009 (2)

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. Holzwarth, M. Popovic, H. Li, H. Smith, J. Hoyt, F. Kartner, R. Ram, V. Stojanovic, and K. Asanovic, “Building many-core processor-to-DRAM networks with monolithic CMOS silicon photonics,” IEEE Micro, vol. 29, no. 4, pp. 8–21, July–Aug.2009.
[CrossRef]

H. L. R. Lira, S. Manipatruni, and M. Lipson, “Broadband hitless silicon electro-optic switch for on-chip optical networks,” Opt. Express, vol. 17, no. 25, pp. 22271–22280, Dec.2009.
[CrossRef] [PubMed]

2008 (4)

M. Gnan, S. Thorns, D. Macintyre, R. De La Rue, and M. Sorel, “Fabrication of low-loss photonic wires in silicon-on-insulator using hydrogen silsesquioxane electron-beam resist,” Electron. Lett., vol. 44, no. 2, pp. 115–116, Jan.2008.
[CrossRef]

B. Lee, A. Biberman, P. Dong, M. Lipson, and K. Bergman, “All-optical comb switch for multiwavelength message routing in silicon photonic networks,” IEEE Photon. Technol. Lett., vol. 20, no. 10, pp. 767–769, May2008.
[CrossRef]

A. Shacham, K. Bergman, and L. Carloni, “Photonic networks-on-chip for future generations of chip multiprocessors,” IEEE Trans. Comput., vol. 57, no. 9, pp. 1246–1260, Sept.2008.
[CrossRef]

Q. Xu, D. Fattal, and R. G. Beausoleil, “Silicon microring resonators with 1.5-µm radius,” Opt. Express, vol. 16, no. 6, pp. 4309–4315, Mar.2008.
[CrossRef] [PubMed]

2007 (2)

N. Kirman, M. Kirman, R. K. Dokania, J. F. Martinez, A. B. Apsel, M. A. Watkins, and D. H. Albonesi, “On-chip optical technology in future bus-based multicore designs,” IEEE Micro, vol. 27, no. 1, pp. 56–66, 2007.
[CrossRef]

W. Bogaerts, P. Dumon, D. V. Thourhout, and R. Baets, “Low-loss, low-cross-talk crossings for silicon-on-insulator nanophotonic waveguides,” Opt. Lett., vol. 32, no. 19, pp. 2801–2803, 2007.
[CrossRef] [PubMed]

2006 (2)

2003 (1)

2002 (2)

Y. Yanagase, S. Suzuki, Y. Kokubun, and S. T. Chu, “Box-like filter response and expansion of FSR by a vertically triple coupled microring resonator filter,” J. Lightwave Technol., vol. 20, no. 8, pp. 1525–1529, Aug.2002.
[CrossRef]

Z. Lin, S. Ethier, T. S. Hahm, and W. M. Tang, “Size scaling of turbulent transport in magnetically confined plasmas,” Phys. Rev. Lett., vol. 88, no. 19, 195004, Apr.2002.
[CrossRef] [PubMed]

2000 (1)

A. Canning, L. Wang, A. Williamson, and A. Zunger, “Parallel empirical pseudopotential electronic structure calculations for million atom systems,” J. Comput. Phys., vol. 160, no. 1, pp. 29–41, 2000.
[CrossRef]

1999 (1)

X. Yuan, R. Melhem, and R. Gupta, “Distributed path reservation algorithms for multiplexed all-optical interconnection networks,” IEEE Trans. Comput., vol. 48, no. 12, pp. 1355–1363, Dec.1999.
[CrossRef]

1998 (1)

B. Little, J. Foresi, G. Steinmeyer, E. Thoen, S. Chu, H. Haus, E. Ippen, L. Kimerling, and W. Greene, “Ultra-compact Si-SiO2 microring resonator optical channel dropping filters,” IEEE Photon. Technol. Lett., vol. 10, no. 4, pp. 549–551, Apr.1998.
[CrossRef]

1997 (1)

C. Qiao and R. Melhem, “Reducing communication latency with path multiplexing in optically interconnected multiprocessor systems,” IEEE Trans. Parallel Distrib. Syst., vol. 8, no. 2, pp. 97–108, Feb.1997.
[CrossRef]

Abdollahi, M.

S. Koohi, M. Abdollahi, and S. Hessabi, “All-optical wavelength-routed NoC based on a novel hierarchical topology,” in 5th IEEE/ACM Int. Symp. on Networks on Chip (NoCS), May 2011, pp. 97–104.

Ahn, J. H.

D. Vantrease, R. Schreiber, M. Monchiero, M. McLaren, N. P. Jouppi, M. Fiorentino, A. Davis, N. Binkert, R. G. Beausoleil, and J. H. Ahn, “Corona: System implications of emerging nanophotonic technology,” in Proc. of the 35th Annu. Int. Symp. on Computer Architecture (ISCA), June 2008, pp. 153–164.

Albonesi, D. H.

N. Kirman, M. Kirman, R. K. Dokania, J. F. Martinez, A. B. Apsel, M. A. Watkins, and D. H. Albonesi, “On-chip optical technology in future bus-based multicore designs,” IEEE Micro, vol. 27, no. 1, pp. 56–66, 2007.
[CrossRef]

M. J. Cianchetti, J. C. Kerekes, and D. H. Albonesi, “Phastlane: a rapid transit optical routing network,” in Proc. of the 36th Annu. Int. Symp. on Computer Architecture (ISCA), 2009, pp. 441–450.

Almeida, V. R.

Apsel, A. B.

N. Kirman, M. Kirman, R. K. Dokania, J. F. Martinez, A. B. Apsel, M. A. Watkins, and D. H. Albonesi, “On-chip optical technology in future bus-based multicore designs,” IEEE Micro, vol. 27, no. 1, pp. 56–66, 2007.
[CrossRef]

Asanovic, K.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. Holzwarth, M. Popovic, H. Li, H. Smith, J. Hoyt, F. Kartner, R. Ram, V. Stojanovic, and K. Asanovic, “Building many-core processor-to-DRAM networks with monolithic CMOS silicon photonics,” IEEE Micro, vol. 29, no. 4, pp. 8–21, July–Aug.2009.
[CrossRef]

Assefa, S.

S. Assefa, B. G. Lee, C. Schow, W. M. Green, A. Rylyakov, R. A. John, and Y. A. Vlasov, “20 Gbps receiver based on germanium photodetector hybrid-integrated with 90 nm CMOS amplifier,” in CLEO 2011—Laser Applications to Photonic Applications, 2011, PDPB11.

Baets, R.

Batten, C.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. Holzwarth, M. Popovic, H. Li, H. Smith, J. Hoyt, F. Kartner, R. Ram, V. Stojanovic, and K. Asanovic, “Building many-core processor-to-DRAM networks with monolithic CMOS silicon photonics,” IEEE Micro, vol. 29, no. 4, pp. 8–21, July–Aug.2009.
[CrossRef]

Beausoleil, R. G.

Q. Xu, D. Fattal, and R. G. Beausoleil, “Silicon microring resonators with 1.5-µm radius,” Opt. Express, vol. 16, no. 6, pp. 4309–4315, Mar.2008.
[CrossRef] [PubMed]

D. Vantrease, R. Schreiber, M. Monchiero, M. McLaren, N. P. Jouppi, M. Fiorentino, A. Davis, N. Binkert, R. G. Beausoleil, and J. H. Ahn, “Corona: System implications of emerging nanophotonic technology,” in Proc. of the 35th Annu. Int. Symp. on Computer Architecture (ISCA), June 2008, pp. 153–164.

Bergman, K.

J. Chan, G. Hendry, K. Bergman, and L. Carloni, “Physical-layer modeling and system-level design of chip-scale photonic interconnection networks,” IEEE Trans. Comput.-Aided Des., vol. 30, no. 10, pp. 1507–1520, Oct.2011.
[CrossRef]

A. Biberman, K. Preston, G. Hendry, N. Sherwood-Droz, J. Chan, J. S. Levy, M. Lipson, and K. Bergman, “Photonic network-on-chip architectures using multilayer deposited silicon materials for high-performance chip multiprocessors,” ACM J. Emerging Technol. Comput. Syst., vol. 7, pp. 7:1–7:25, July2011.

J. Chan, G. Hendry, A. Biberman, and K. Bergman, “Architectural exploration of chip-scale photonic interconnection network designs using physical-layer analysis,” J. Lightwave Technol., vol. 28, no. 9, pp. 1305–1315, May2010.
[CrossRef]

B. Lee, A. Biberman, P. Dong, M. Lipson, and K. Bergman, “All-optical comb switch for multiwavelength message routing in silicon photonic networks,” IEEE Photon. Technol. Lett., vol. 20, no. 10, pp. 767–769, May2008.
[CrossRef]

A. Shacham, K. Bergman, and L. Carloni, “Photonic networks-on-chip for future generations of chip multiprocessors,” IEEE Trans. Comput., vol. 57, no. 9, pp. 1246–1260, Sept.2008.
[CrossRef]

G. Hendry, J. Chan, S. Kamil, L. Oliker, J. Shalf, L. Carloni, and K. Bergman, “Silicon nanophotonic network-on-chip using TDM arbitration,” in 2010 IEEE 18th Annu. Symp. on High Performance Interconnects (HOTI), Aug. 2010, pp. 88–95.

G. Hendry, S. Kamil, A. Biberman, J. Chan, B. Lee, M. Mohiyuddin, A. Jain, K. Bergman, L. Carloni, J. Kubiatowicz, L. Oliker, and J. Shalf, “Analysis of photonic networks for a chip multiprocessor using scientific applications,” in 3rd ACM/IEEE Int. Symp. on Networks-on-Chip (NOCS), May 2009, pp. 104–113.

N. Ophir, K. Padmaraju, A. Biberman, L. Chen, K. Preston, M. Lipson, and K. Bergman, “First demonstration of error-free operation of a full silicon on-chip photonic link,” in Optical Fiber Communication Conf., 2011, OWZ3.

J. Chan, N. Ophir, C. P. Lai, A. Biberman, H. L. R. Lira, M. Lipson, and K. Bergman, “Data transmission using wavelength-selective spatial routing for photonic interconnection networks,” in Optical Fiber Communication Conf., Mar. 2011.

Biberman, A.

A. Biberman, K. Preston, G. Hendry, N. Sherwood-Droz, J. Chan, J. S. Levy, M. Lipson, and K. Bergman, “Photonic network-on-chip architectures using multilayer deposited silicon materials for high-performance chip multiprocessors,” ACM J. Emerging Technol. Comput. Syst., vol. 7, pp. 7:1–7:25, July2011.

J. Chan, G. Hendry, A. Biberman, and K. Bergman, “Architectural exploration of chip-scale photonic interconnection network designs using physical-layer analysis,” J. Lightwave Technol., vol. 28, no. 9, pp. 1305–1315, May2010.
[CrossRef]

B. Lee, A. Biberman, P. Dong, M. Lipson, and K. Bergman, “All-optical comb switch for multiwavelength message routing in silicon photonic networks,” IEEE Photon. Technol. Lett., vol. 20, no. 10, pp. 767–769, May2008.
[CrossRef]

N. Ophir, K. Padmaraju, A. Biberman, L. Chen, K. Preston, M. Lipson, and K. Bergman, “First demonstration of error-free operation of a full silicon on-chip photonic link,” in Optical Fiber Communication Conf., 2011, OWZ3.

J. Chan, N. Ophir, C. P. Lai, A. Biberman, H. L. R. Lira, M. Lipson, and K. Bergman, “Data transmission using wavelength-selective spatial routing for photonic interconnection networks,” in Optical Fiber Communication Conf., Mar. 2011.

G. Hendry, S. Kamil, A. Biberman, J. Chan, B. Lee, M. Mohiyuddin, A. Jain, K. Bergman, L. Carloni, J. Kubiatowicz, L. Oliker, and J. Shalf, “Analysis of photonic networks for a chip multiprocessor using scientific applications,” in 3rd ACM/IEEE Int. Symp. on Networks-on-Chip (NOCS), May 2009, pp. 104–113.

Binkert, N.

D. Vantrease, R. Schreiber, M. Monchiero, M. McLaren, N. P. Jouppi, M. Fiorentino, A. Davis, N. Binkert, R. G. Beausoleil, and J. H. Ahn, “Corona: System implications of emerging nanophotonic technology,” in Proc. of the 35th Annu. Int. Symp. on Computer Architecture (ISCA), June 2008, pp. 153–164.

Bogaerts, W.

Borrill, J.

J. Borrill, J. Carter, L. Oliker, and D. Skinner, “Integrated performance monitoring of a cosmology application on leading HEC platforms,” in Proc. of the 2005 Int. Conf. on Parallel Processing, 2005, pp. 119–128.

Canning, A.

A. Canning, L. Wang, A. Williamson, and A. Zunger, “Parallel empirical pseudopotential electronic structure calculations for million atom systems,” J. Comput. Phys., vol. 160, no. 1, pp. 29–41, 2000.
[CrossRef]

Carloni, L.

J. Chan, G. Hendry, K. Bergman, and L. Carloni, “Physical-layer modeling and system-level design of chip-scale photonic interconnection networks,” IEEE Trans. Comput.-Aided Des., vol. 30, no. 10, pp. 1507–1520, Oct.2011.
[CrossRef]

A. Shacham, K. Bergman, and L. Carloni, “Photonic networks-on-chip for future generations of chip multiprocessors,” IEEE Trans. Comput., vol. 57, no. 9, pp. 1246–1260, Sept.2008.
[CrossRef]

G. Hendry, J. Chan, S. Kamil, L. Oliker, J. Shalf, L. Carloni, and K. Bergman, “Silicon nanophotonic network-on-chip using TDM arbitration,” in 2010 IEEE 18th Annu. Symp. on High Performance Interconnects (HOTI), Aug. 2010, pp. 88–95.

G. Hendry, S. Kamil, A. Biberman, J. Chan, B. Lee, M. Mohiyuddin, A. Jain, K. Bergman, L. Carloni, J. Kubiatowicz, L. Oliker, and J. Shalf, “Analysis of photonic networks for a chip multiprocessor using scientific applications,” in 3rd ACM/IEEE Int. Symp. on Networks-on-Chip (NOCS), May 2009, pp. 104–113.

Carter, J.

J. Borrill, J. Carter, L. Oliker, and D. Skinner, “Integrated performance monitoring of a cosmology application on leading HEC platforms,” in Proc. of the 2005 Int. Conf. on Parallel Processing, 2005, pp. 119–128.

Chan, J.

J. Chan, G. Hendry, K. Bergman, and L. Carloni, “Physical-layer modeling and system-level design of chip-scale photonic interconnection networks,” IEEE Trans. Comput.-Aided Des., vol. 30, no. 10, pp. 1507–1520, Oct.2011.
[CrossRef]

A. Biberman, K. Preston, G. Hendry, N. Sherwood-Droz, J. Chan, J. S. Levy, M. Lipson, and K. Bergman, “Photonic network-on-chip architectures using multilayer deposited silicon materials for high-performance chip multiprocessors,” ACM J. Emerging Technol. Comput. Syst., vol. 7, pp. 7:1–7:25, July2011.

J. Chan, G. Hendry, A. Biberman, and K. Bergman, “Architectural exploration of chip-scale photonic interconnection network designs using physical-layer analysis,” J. Lightwave Technol., vol. 28, no. 9, pp. 1305–1315, May2010.
[CrossRef]

J. Chan, N. Ophir, C. P. Lai, A. Biberman, H. L. R. Lira, M. Lipson, and K. Bergman, “Data transmission using wavelength-selective spatial routing for photonic interconnection networks,” in Optical Fiber Communication Conf., Mar. 2011.

G. Hendry, S. Kamil, A. Biberman, J. Chan, B. Lee, M. Mohiyuddin, A. Jain, K. Bergman, L. Carloni, J. Kubiatowicz, L. Oliker, and J. Shalf, “Analysis of photonic networks for a chip multiprocessor using scientific applications,” in 3rd ACM/IEEE Int. Symp. on Networks-on-Chip (NOCS), May 2009, pp. 104–113.

G. Hendry, J. Chan, S. Kamil, L. Oliker, J. Shalf, L. Carloni, and K. Bergman, “Silicon nanophotonic network-on-chip using TDM arbitration,” in 2010 IEEE 18th Annu. Symp. on High Performance Interconnects (HOTI), Aug. 2010, pp. 88–95.

Chen, L.

N. Ophir, K. Padmaraju, A. Biberman, L. Chen, K. Preston, M. Lipson, and K. Bergman, “First demonstration of error-free operation of a full silicon on-chip photonic link,” in Optical Fiber Communication Conf., 2011, OWZ3.

Chu, S.

B. Little, J. Foresi, G. Steinmeyer, E. Thoen, S. Chu, H. Haus, E. Ippen, L. Kimerling, and W. Greene, “Ultra-compact Si-SiO2 microring resonator optical channel dropping filters,” IEEE Photon. Technol. Lett., vol. 10, no. 4, pp. 549–551, Apr.1998.
[CrossRef]

Chu, S. T.

Cianchetti, M. J.

M. J. Cianchetti, J. C. Kerekes, and D. H. Albonesi, “Phastlane: a rapid transit optical routing network,” in Proc. of the 36th Annu. Int. Symp. on Computer Architecture (ISCA), 2009, pp. 441–450.

Davis, A.

D. Vantrease, R. Schreiber, M. Monchiero, M. McLaren, N. P. Jouppi, M. Fiorentino, A. Davis, N. Binkert, R. G. Beausoleil, and J. H. Ahn, “Corona: System implications of emerging nanophotonic technology,” in Proc. of the 35th Annu. Int. Symp. on Computer Architecture (ISCA), June 2008, pp. 153–164.

De La Rue, R.

M. Gnan, S. Thorns, D. Macintyre, R. De La Rue, and M. Sorel, “Fabrication of low-loss photonic wires in silicon-on-insulator using hydrogen silsesquioxane electron-beam resist,” Electron. Lett., vol. 44, no. 2, pp. 115–116, Jan.2008.
[CrossRef]

Dokania, R. K.

N. Kirman, M. Kirman, R. K. Dokania, J. F. Martinez, A. B. Apsel, M. A. Watkins, and D. H. Albonesi, “On-chip optical technology in future bus-based multicore designs,” IEEE Micro, vol. 27, no. 1, pp. 56–66, 2007.
[CrossRef]

Dong, P.

B. Lee, A. Biberman, P. Dong, M. Lipson, and K. Bergman, “All-optical comb switch for multiwavelength message routing in silicon photonic networks,” IEEE Photon. Technol. Lett., vol. 20, no. 10, pp. 767–769, May2008.
[CrossRef]

Dumon, P.

Ethier, S.

Z. Lin, S. Ethier, T. S. Hahm, and W. M. Tang, “Size scaling of turbulent transport in magnetically confined plasmas,” Phys. Rev. Lett., vol. 88, no. 19, 195004, Apr.2002.
[CrossRef] [PubMed]

Fattal, D.

Feng, J.

J. Feng, Q. Li, and Z. Zhou, “Single ring interferometer configuration with doubled free-spectral range,” IEEE Photon. Technol. Lett., vol. 23, no. 2, pp. 79–81, Jan.2011.
[CrossRef]

Fiorentino, M.

D. Vantrease, R. Schreiber, M. Monchiero, M. McLaren, N. P. Jouppi, M. Fiorentino, A. Davis, N. Binkert, R. G. Beausoleil, and J. H. Ahn, “Corona: System implications of emerging nanophotonic technology,” in Proc. of the 35th Annu. Int. Symp. on Computer Architecture (ISCA), June 2008, pp. 153–164.

Foresi, J.

B. Little, J. Foresi, G. Steinmeyer, E. Thoen, S. Chu, H. Haus, E. Ippen, L. Kimerling, and W. Greene, “Ultra-compact Si-SiO2 microring resonator optical channel dropping filters,” IEEE Photon. Technol. Lett., vol. 10, no. 4, pp. 549–551, Apr.1998.
[CrossRef]

Garcia, J.

J. Garcia, A. Martinez, and J. Marti, “Optical add-drop multiplexer with FSR higher than 140 nm using ring resonators and photonic bandgap structures,” in 5th IEEE Int. Conf. on Group IV Photonics, Sept. 2008, pp. 82–84.

Gnan, M.

M. Gnan, S. Thorns, D. Macintyre, R. De La Rue, and M. Sorel, “Fabrication of low-loss photonic wires in silicon-on-insulator using hydrogen silsesquioxane electron-beam resist,” Electron. Lett., vol. 44, no. 2, pp. 115–116, Jan.2008.
[CrossRef]

Green, W. M.

S. Assefa, B. G. Lee, C. Schow, W. M. Green, A. Rylyakov, R. A. John, and Y. A. Vlasov, “20 Gbps receiver based on germanium photodetector hybrid-integrated with 90 nm CMOS amplifier,” in CLEO 2011—Laser Applications to Photonic Applications, 2011, PDPB11.

Greene, W.

B. Little, J. Foresi, G. Steinmeyer, E. Thoen, S. Chu, H. Haus, E. Ippen, L. Kimerling, and W. Greene, “Ultra-compact Si-SiO2 microring resonator optical channel dropping filters,” IEEE Photon. Technol. Lett., vol. 10, no. 4, pp. 549–551, Apr.1998.
[CrossRef]

Gupta, R.

X. Yuan, R. Melhem, and R. Gupta, “Distributed path reservation algorithms for multiplexed all-optical interconnection networks,” IEEE Trans. Comput., vol. 48, no. 12, pp. 1355–1363, Dec.1999.
[CrossRef]

Hahm, T. S.

Z. Lin, S. Ethier, T. S. Hahm, and W. M. Tang, “Size scaling of turbulent transport in magnetically confined plasmas,” Phys. Rev. Lett., vol. 88, no. 19, 195004, Apr.2002.
[CrossRef] [PubMed]

Haus, H.

B. Little, J. Foresi, G. Steinmeyer, E. Thoen, S. Chu, H. Haus, E. Ippen, L. Kimerling, and W. Greene, “Ultra-compact Si-SiO2 microring resonator optical channel dropping filters,” IEEE Photon. Technol. Lett., vol. 10, no. 4, pp. 549–551, Apr.1998.
[CrossRef]

Hendry, G.

A. Biberman, K. Preston, G. Hendry, N. Sherwood-Droz, J. Chan, J. S. Levy, M. Lipson, and K. Bergman, “Photonic network-on-chip architectures using multilayer deposited silicon materials for high-performance chip multiprocessors,” ACM J. Emerging Technol. Comput. Syst., vol. 7, pp. 7:1–7:25, July2011.

J. Chan, G. Hendry, K. Bergman, and L. Carloni, “Physical-layer modeling and system-level design of chip-scale photonic interconnection networks,” IEEE Trans. Comput.-Aided Des., vol. 30, no. 10, pp. 1507–1520, Oct.2011.
[CrossRef]

J. Chan, G. Hendry, A. Biberman, and K. Bergman, “Architectural exploration of chip-scale photonic interconnection network designs using physical-layer analysis,” J. Lightwave Technol., vol. 28, no. 9, pp. 1305–1315, May2010.
[CrossRef]

G. Hendry, S. Kamil, A. Biberman, J. Chan, B. Lee, M. Mohiyuddin, A. Jain, K. Bergman, L. Carloni, J. Kubiatowicz, L. Oliker, and J. Shalf, “Analysis of photonic networks for a chip multiprocessor using scientific applications,” in 3rd ACM/IEEE Int. Symp. on Networks-on-Chip (NOCS), May 2009, pp. 104–113.

G. Hendry, J. Chan, S. Kamil, L. Oliker, J. Shalf, L. Carloni, and K. Bergman, “Silicon nanophotonic network-on-chip using TDM arbitration,” in 2010 IEEE 18th Annu. Symp. on High Performance Interconnects (HOTI), Aug. 2010, pp. 88–95.

Hessabi, S.

S. Koohi, M. Abdollahi, and S. Hessabi, “All-optical wavelength-routed NoC based on a novel hierarchical topology,” in 5th IEEE/ACM Int. Symp. on Networks on Chip (NoCS), May 2011, pp. 97–104.

Holzwarth, C.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. Holzwarth, M. Popovic, H. Li, H. Smith, J. Hoyt, F. Kartner, R. Ram, V. Stojanovic, and K. Asanovic, “Building many-core processor-to-DRAM networks with monolithic CMOS silicon photonics,” IEEE Micro, vol. 29, no. 4, pp. 8–21, July–Aug.2009.
[CrossRef]

Hoyt, J.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. Holzwarth, M. Popovic, H. Li, H. Smith, J. Hoyt, F. Kartner, R. Ram, V. Stojanovic, and K. Asanovic, “Building many-core processor-to-DRAM networks with monolithic CMOS silicon photonics,” IEEE Micro, vol. 29, no. 4, pp. 8–21, July–Aug.2009.
[CrossRef]

Ippen, E.

B. Little, J. Foresi, G. Steinmeyer, E. Thoen, S. Chu, H. Haus, E. Ippen, L. Kimerling, and W. Greene, “Ultra-compact Si-SiO2 microring resonator optical channel dropping filters,” IEEE Photon. Technol. Lett., vol. 10, no. 4, pp. 549–551, Apr.1998.
[CrossRef]

Jain, A.

G. Hendry, S. Kamil, A. Biberman, J. Chan, B. Lee, M. Mohiyuddin, A. Jain, K. Bergman, L. Carloni, J. Kubiatowicz, L. Oliker, and J. Shalf, “Analysis of photonic networks for a chip multiprocessor using scientific applications,” in 3rd ACM/IEEE Int. Symp. on Networks-on-Chip (NOCS), May 2009, pp. 104–113.

John, R. A.

S. Assefa, B. G. Lee, C. Schow, W. M. Green, A. Rylyakov, R. A. John, and Y. A. Vlasov, “20 Gbps receiver based on germanium photodetector hybrid-integrated with 90 nm CMOS amplifier,” in CLEO 2011—Laser Applications to Photonic Applications, 2011, PDPB11.

Joshi, A.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. Holzwarth, M. Popovic, H. Li, H. Smith, J. Hoyt, F. Kartner, R. Ram, V. Stojanovic, and K. Asanovic, “Building many-core processor-to-DRAM networks with monolithic CMOS silicon photonics,” IEEE Micro, vol. 29, no. 4, pp. 8–21, July–Aug.2009.
[CrossRef]

Jouppi, N. P.

D. Vantrease, R. Schreiber, M. Monchiero, M. McLaren, N. P. Jouppi, M. Fiorentino, A. Davis, N. Binkert, R. G. Beausoleil, and J. H. Ahn, “Corona: System implications of emerging nanophotonic technology,” in Proc. of the 35th Annu. Int. Symp. on Computer Architecture (ISCA), June 2008, pp. 153–164.

Kahng, A. B.

A. B. Kahng, B. Li, L.-S. Peh, and K. Samadi, “ORION 2.0: A power-area simulator for interconnection networks,” IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 20, no. 1, pp. 191–196, Jan.2012.

Kamil, S.

G. Hendry, S. Kamil, A. Biberman, J. Chan, B. Lee, M. Mohiyuddin, A. Jain, K. Bergman, L. Carloni, J. Kubiatowicz, L. Oliker, and J. Shalf, “Analysis of photonic networks for a chip multiprocessor using scientific applications,” in 3rd ACM/IEEE Int. Symp. on Networks-on-Chip (NOCS), May 2009, pp. 104–113.

G. Hendry, J. Chan, S. Kamil, L. Oliker, J. Shalf, L. Carloni, and K. Bergman, “Silicon nanophotonic network-on-chip using TDM arbitration,” in 2010 IEEE 18th Annu. Symp. on High Performance Interconnects (HOTI), Aug. 2010, pp. 88–95.

Kartner, F.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. Holzwarth, M. Popovic, H. Li, H. Smith, J. Hoyt, F. Kartner, R. Ram, V. Stojanovic, and K. Asanovic, “Building many-core processor-to-DRAM networks with monolithic CMOS silicon photonics,” IEEE Micro, vol. 29, no. 4, pp. 8–21, July–Aug.2009.
[CrossRef]

Kerekes, J. C.

M. J. Cianchetti, J. C. Kerekes, and D. H. Albonesi, “Phastlane: a rapid transit optical routing network,” in Proc. of the 36th Annu. Int. Symp. on Computer Architecture (ISCA), 2009, pp. 441–450.

Khilo, A.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. Holzwarth, M. Popovic, H. Li, H. Smith, J. Hoyt, F. Kartner, R. Ram, V. Stojanovic, and K. Asanovic, “Building many-core processor-to-DRAM networks with monolithic CMOS silicon photonics,” IEEE Micro, vol. 29, no. 4, pp. 8–21, July–Aug.2009.
[CrossRef]

Kimerling, L.

B. Little, J. Foresi, G. Steinmeyer, E. Thoen, S. Chu, H. Haus, E. Ippen, L. Kimerling, and W. Greene, “Ultra-compact Si-SiO2 microring resonator optical channel dropping filters,” IEEE Photon. Technol. Lett., vol. 10, no. 4, pp. 549–551, Apr.1998.
[CrossRef]

Kirman, M.

N. Kirman, M. Kirman, R. K. Dokania, J. F. Martinez, A. B. Apsel, M. A. Watkins, and D. H. Albonesi, “On-chip optical technology in future bus-based multicore designs,” IEEE Micro, vol. 27, no. 1, pp. 56–66, 2007.
[CrossRef]

Kirman, N.

N. Kirman, M. Kirman, R. K. Dokania, J. F. Martinez, A. B. Apsel, M. A. Watkins, and D. H. Albonesi, “On-chip optical technology in future bus-based multicore designs,” IEEE Micro, vol. 27, no. 1, pp. 56–66, 2007.
[CrossRef]

Kokubun, Y.

Koohi, S.

S. Koohi, M. Abdollahi, and S. Hessabi, “All-optical wavelength-routed NoC based on a novel hierarchical topology,” in 5th IEEE/ACM Int. Symp. on Networks on Chip (NoCS), May 2011, pp. 97–104.

Kubiatowicz, J.

G. Hendry, S. Kamil, A. Biberman, J. Chan, B. Lee, M. Mohiyuddin, A. Jain, K. Bergman, L. Carloni, J. Kubiatowicz, L. Oliker, and J. Shalf, “Analysis of photonic networks for a chip multiprocessor using scientific applications,” in 3rd ACM/IEEE Int. Symp. on Networks-on-Chip (NOCS), May 2009, pp. 104–113.

Lai, C. P.

J. Chan, N. Ophir, C. P. Lai, A. Biberman, H. L. R. Lira, M. Lipson, and K. Bergman, “Data transmission using wavelength-selective spatial routing for photonic interconnection networks,” in Optical Fiber Communication Conf., Mar. 2011.

Lee, B.

B. Lee, A. Biberman, P. Dong, M. Lipson, and K. Bergman, “All-optical comb switch for multiwavelength message routing in silicon photonic networks,” IEEE Photon. Technol. Lett., vol. 20, no. 10, pp. 767–769, May2008.
[CrossRef]

G. Hendry, S. Kamil, A. Biberman, J. Chan, B. Lee, M. Mohiyuddin, A. Jain, K. Bergman, L. Carloni, J. Kubiatowicz, L. Oliker, and J. Shalf, “Analysis of photonic networks for a chip multiprocessor using scientific applications,” in 3rd ACM/IEEE Int. Symp. on Networks-on-Chip (NOCS), May 2009, pp. 104–113.

Lee, B. G.

S. Assefa, B. G. Lee, C. Schow, W. M. Green, A. Rylyakov, R. A. John, and Y. A. Vlasov, “20 Gbps receiver based on germanium photodetector hybrid-integrated with 90 nm CMOS amplifier,” in CLEO 2011—Laser Applications to Photonic Applications, 2011, PDPB11.

Lentine, A.

M. Watts, D. Trotter, R. Young, and A. Lentine, “Ultralow power silicon microdisk modulators and switches,” in 5th IEEE Int. Conf. on Group IV Photonics, Sept. 2008, pp. 4–6.

Levy, J.

K. Preston, N. Sherwood-Droz, J. Levy, and M. Lipson, “Performance guidelines for WDM interconnects based on silicon microring resonators,” in Conf. on Lasers and Electro-Optics (CLEO), May 2011.

Levy, J. S.

A. Biberman, K. Preston, G. Hendry, N. Sherwood-Droz, J. Chan, J. S. Levy, M. Lipson, and K. Bergman, “Photonic network-on-chip architectures using multilayer deposited silicon materials for high-performance chip multiprocessors,” ACM J. Emerging Technol. Comput. Syst., vol. 7, pp. 7:1–7:25, July2011.

Li, B.

A. B. Kahng, B. Li, L.-S. Peh, and K. Samadi, “ORION 2.0: A power-area simulator for interconnection networks,” IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 20, no. 1, pp. 191–196, Jan.2012.

Li, H.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. Holzwarth, M. Popovic, H. Li, H. Smith, J. Hoyt, F. Kartner, R. Ram, V. Stojanovic, and K. Asanovic, “Building many-core processor-to-DRAM networks with monolithic CMOS silicon photonics,” IEEE Micro, vol. 29, no. 4, pp. 8–21, July–Aug.2009.
[CrossRef]

Li, Q.

J. Feng, Q. Li, and Z. Zhou, “Single ring interferometer configuration with doubled free-spectral range,” IEEE Photon. Technol. Lett., vol. 23, no. 2, pp. 79–81, Jan.2011.
[CrossRef]

Lin, Z.

Z. Lin, S. Ethier, T. S. Hahm, and W. M. Tang, “Size scaling of turbulent transport in magnetically confined plasmas,” Phys. Rev. Lett., vol. 88, no. 19, 195004, Apr.2002.
[CrossRef] [PubMed]

Lipson, M.

A. Biberman, K. Preston, G. Hendry, N. Sherwood-Droz, J. Chan, J. S. Levy, M. Lipson, and K. Bergman, “Photonic network-on-chip architectures using multilayer deposited silicon materials for high-performance chip multiprocessors,” ACM J. Emerging Technol. Comput. Syst., vol. 7, pp. 7:1–7:25, July2011.

H. L. R. Lira, S. Manipatruni, and M. Lipson, “Broadband hitless silicon electro-optic switch for on-chip optical networks,” Opt. Express, vol. 17, no. 25, pp. 22271–22280, Dec.2009.
[CrossRef] [PubMed]

B. Lee, A. Biberman, P. Dong, M. Lipson, and K. Bergman, “All-optical comb switch for multiwavelength message routing in silicon photonic networks,” IEEE Photon. Technol. Lett., vol. 20, no. 10, pp. 767–769, May2008.
[CrossRef]

V. R. Almeida, R. R. Panepucci, and M. Lipson, “Nanotaper for compact mode conversion,” Opt. Lett., vol. 28, no. 15, pp. 1302–1304, Aug.2003.
[CrossRef] [PubMed]

S. Manipatruni, Q. Xu, B. Schmidt, J. Shakya, and M. Lipson, “High speed carrier injection 18 Gb/s silicon micro-ring electro-optic modulator,” in 20th Annu. Meeting of the IEEE Lasers and Electro-Optics Society (LEOS), Oct. 2007, pp. 537–538.

J. Chan, N. Ophir, C. P. Lai, A. Biberman, H. L. R. Lira, M. Lipson, and K. Bergman, “Data transmission using wavelength-selective spatial routing for photonic interconnection networks,” in Optical Fiber Communication Conf., Mar. 2011.

N. Ophir, K. Padmaraju, A. Biberman, L. Chen, K. Preston, M. Lipson, and K. Bergman, “First demonstration of error-free operation of a full silicon on-chip photonic link,” in Optical Fiber Communication Conf., 2011, OWZ3.

K. Preston, N. Sherwood-Droz, J. Levy, and M. Lipson, “Performance guidelines for WDM interconnects based on silicon microring resonators,” in Conf. on Lasers and Electro-Optics (CLEO), May 2011.

Lira, H. L. R.

H. L. R. Lira, S. Manipatruni, and M. Lipson, “Broadband hitless silicon electro-optic switch for on-chip optical networks,” Opt. Express, vol. 17, no. 25, pp. 22271–22280, Dec.2009.
[CrossRef] [PubMed]

J. Chan, N. Ophir, C. P. Lai, A. Biberman, H. L. R. Lira, M. Lipson, and K. Bergman, “Data transmission using wavelength-selective spatial routing for photonic interconnection networks,” in Optical Fiber Communication Conf., Mar. 2011.

Little, B.

B. Little, J. Foresi, G. Steinmeyer, E. Thoen, S. Chu, H. Haus, E. Ippen, L. Kimerling, and W. Greene, “Ultra-compact Si-SiO2 microring resonator optical channel dropping filters,” IEEE Photon. Technol. Lett., vol. 10, no. 4, pp. 549–551, Apr.1998.
[CrossRef]

Macintyre, D.

M. Gnan, S. Thorns, D. Macintyre, R. De La Rue, and M. Sorel, “Fabrication of low-loss photonic wires in silicon-on-insulator using hydrogen silsesquioxane electron-beam resist,” Electron. Lett., vol. 44, no. 2, pp. 115–116, Jan.2008.
[CrossRef]

Manipatruni, S.

H. L. R. Lira, S. Manipatruni, and M. Lipson, “Broadband hitless silicon electro-optic switch for on-chip optical networks,” Opt. Express, vol. 17, no. 25, pp. 22271–22280, Dec.2009.
[CrossRef] [PubMed]

S. Manipatruni, Q. Xu, B. Schmidt, J. Shakya, and M. Lipson, “High speed carrier injection 18 Gb/s silicon micro-ring electro-optic modulator,” in 20th Annu. Meeting of the IEEE Lasers and Electro-Optics Society (LEOS), Oct. 2007, pp. 537–538.

Marti, J.

J. Garcia, A. Martinez, and J. Marti, “Optical add-drop multiplexer with FSR higher than 140 nm using ring resonators and photonic bandgap structures,” in 5th IEEE Int. Conf. on Group IV Photonics, Sept. 2008, pp. 82–84.

Martinez, A.

J. Garcia, A. Martinez, and J. Marti, “Optical add-drop multiplexer with FSR higher than 140 nm using ring resonators and photonic bandgap structures,” in 5th IEEE Int. Conf. on Group IV Photonics, Sept. 2008, pp. 82–84.

Martinez, J. F.

N. Kirman, M. Kirman, R. K. Dokania, J. F. Martinez, A. B. Apsel, M. A. Watkins, and D. H. Albonesi, “On-chip optical technology in future bus-based multicore designs,” IEEE Micro, vol. 27, no. 1, pp. 56–66, 2007.
[CrossRef]

McLaren, M.

D. Vantrease, R. Schreiber, M. Monchiero, M. McLaren, N. P. Jouppi, M. Fiorentino, A. Davis, N. Binkert, R. G. Beausoleil, and J. H. Ahn, “Corona: System implications of emerging nanophotonic technology,” in Proc. of the 35th Annu. Int. Symp. on Computer Architecture (ISCA), June 2008, pp. 153–164.

Melhem, R.

X. Yuan, R. Melhem, and R. Gupta, “Distributed path reservation algorithms for multiplexed all-optical interconnection networks,” IEEE Trans. Comput., vol. 48, no. 12, pp. 1355–1363, Dec.1999.
[CrossRef]

C. Qiao and R. Melhem, “Reducing communication latency with path multiplexing in optically interconnected multiprocessor systems,” IEEE Trans. Parallel Distrib. Syst., vol. 8, no. 2, pp. 97–108, Feb.1997.
[CrossRef]

Mohiyuddin, M.

G. Hendry, S. Kamil, A. Biberman, J. Chan, B. Lee, M. Mohiyuddin, A. Jain, K. Bergman, L. Carloni, J. Kubiatowicz, L. Oliker, and J. Shalf, “Analysis of photonic networks for a chip multiprocessor using scientific applications,” in 3rd ACM/IEEE Int. Symp. on Networks-on-Chip (NOCS), May 2009, pp. 104–113.

Monchiero, M.

D. Vantrease, R. Schreiber, M. Monchiero, M. McLaren, N. P. Jouppi, M. Fiorentino, A. Davis, N. Binkert, R. G. Beausoleil, and J. H. Ahn, “Corona: System implications of emerging nanophotonic technology,” in Proc. of the 35th Annu. Int. Symp. on Computer Architecture (ISCA), June 2008, pp. 153–164.

Moss, B.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. Holzwarth, M. Popovic, H. Li, H. Smith, J. Hoyt, F. Kartner, R. Ram, V. Stojanovic, and K. Asanovic, “Building many-core processor-to-DRAM networks with monolithic CMOS silicon photonics,” IEEE Micro, vol. 29, no. 4, pp. 8–21, July–Aug.2009.
[CrossRef]

Oliker, L.

G. Hendry, S. Kamil, A. Biberman, J. Chan, B. Lee, M. Mohiyuddin, A. Jain, K. Bergman, L. Carloni, J. Kubiatowicz, L. Oliker, and J. Shalf, “Analysis of photonic networks for a chip multiprocessor using scientific applications,” in 3rd ACM/IEEE Int. Symp. on Networks-on-Chip (NOCS), May 2009, pp. 104–113.

G. Hendry, J. Chan, S. Kamil, L. Oliker, J. Shalf, L. Carloni, and K. Bergman, “Silicon nanophotonic network-on-chip using TDM arbitration,” in 2010 IEEE 18th Annu. Symp. on High Performance Interconnects (HOTI), Aug. 2010, pp. 88–95.

J. Borrill, J. Carter, L. Oliker, and D. Skinner, “Integrated performance monitoring of a cosmology application on leading HEC platforms,” in Proc. of the 2005 Int. Conf. on Parallel Processing, 2005, pp. 119–128.

Ophir, N.

N. Ophir, K. Padmaraju, A. Biberman, L. Chen, K. Preston, M. Lipson, and K. Bergman, “First demonstration of error-free operation of a full silicon on-chip photonic link,” in Optical Fiber Communication Conf., 2011, OWZ3.

J. Chan, N. Ophir, C. P. Lai, A. Biberman, H. L. R. Lira, M. Lipson, and K. Bergman, “Data transmission using wavelength-selective spatial routing for photonic interconnection networks,” in Optical Fiber Communication Conf., Mar. 2011.

Orcutt, J.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. Holzwarth, M. Popovic, H. Li, H. Smith, J. Hoyt, F. Kartner, R. Ram, V. Stojanovic, and K. Asanovic, “Building many-core processor-to-DRAM networks with monolithic CMOS silicon photonics,” IEEE Micro, vol. 29, no. 4, pp. 8–21, July–Aug.2009.
[CrossRef]

Padmaraju, K.

N. Ophir, K. Padmaraju, A. Biberman, L. Chen, K. Preston, M. Lipson, and K. Bergman, “First demonstration of error-free operation of a full silicon on-chip photonic link,” in Optical Fiber Communication Conf., 2011, OWZ3.

Panepucci, R. R.

Peh, L.-S.

A. B. Kahng, B. Li, L.-S. Peh, and K. Samadi, “ORION 2.0: A power-area simulator for interconnection networks,” IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 20, no. 1, pp. 191–196, Jan.2012.

Popovic, M.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. Holzwarth, M. Popovic, H. Li, H. Smith, J. Hoyt, F. Kartner, R. Ram, V. Stojanovic, and K. Asanovic, “Building many-core processor-to-DRAM networks with monolithic CMOS silicon photonics,” IEEE Micro, vol. 29, no. 4, pp. 8–21, July–Aug.2009.
[CrossRef]

Preston, K.

A. Biberman, K. Preston, G. Hendry, N. Sherwood-Droz, J. Chan, J. S. Levy, M. Lipson, and K. Bergman, “Photonic network-on-chip architectures using multilayer deposited silicon materials for high-performance chip multiprocessors,” ACM J. Emerging Technol. Comput. Syst., vol. 7, pp. 7:1–7:25, July2011.

K. Preston, N. Sherwood-Droz, J. Levy, and M. Lipson, “Performance guidelines for WDM interconnects based on silicon microring resonators,” in Conf. on Lasers and Electro-Optics (CLEO), May 2011.

N. Ophir, K. Padmaraju, A. Biberman, L. Chen, K. Preston, M. Lipson, and K. Bergman, “First demonstration of error-free operation of a full silicon on-chip photonic link,” in Optical Fiber Communication Conf., 2011, OWZ3.

Qiao, C.

C. Qiao and R. Melhem, “Reducing communication latency with path multiplexing in optically interconnected multiprocessor systems,” IEEE Trans. Parallel Distrib. Syst., vol. 8, no. 2, pp. 97–108, Feb.1997.
[CrossRef]

Ram, R.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. Holzwarth, M. Popovic, H. Li, H. Smith, J. Hoyt, F. Kartner, R. Ram, V. Stojanovic, and K. Asanovic, “Building many-core processor-to-DRAM networks with monolithic CMOS silicon photonics,” IEEE Micro, vol. 29, no. 4, pp. 8–21, July–Aug.2009.
[CrossRef]

Roelkens, G.

Rylyakov, A.

S. Assefa, B. G. Lee, C. Schow, W. M. Green, A. Rylyakov, R. A. John, and Y. A. Vlasov, “20 Gbps receiver based on germanium photodetector hybrid-integrated with 90 nm CMOS amplifier,” in CLEO 2011—Laser Applications to Photonic Applications, 2011, PDPB11.

Samadi, K.

A. B. Kahng, B. Li, L.-S. Peh, and K. Samadi, “ORION 2.0: A power-area simulator for interconnection networks,” IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 20, no. 1, pp. 191–196, Jan.2012.

Schmidt, B.

S. Manipatruni, Q. Xu, B. Schmidt, J. Shakya, and M. Lipson, “High speed carrier injection 18 Gb/s silicon micro-ring electro-optic modulator,” in 20th Annu. Meeting of the IEEE Lasers and Electro-Optics Society (LEOS), Oct. 2007, pp. 537–538.

Schow, C.

S. Assefa, B. G. Lee, C. Schow, W. M. Green, A. Rylyakov, R. A. John, and Y. A. Vlasov, “20 Gbps receiver based on germanium photodetector hybrid-integrated with 90 nm CMOS amplifier,” in CLEO 2011—Laser Applications to Photonic Applications, 2011, PDPB11.

Schreiber, R.

D. Vantrease, R. Schreiber, M. Monchiero, M. McLaren, N. P. Jouppi, M. Fiorentino, A. Davis, N. Binkert, R. G. Beausoleil, and J. H. Ahn, “Corona: System implications of emerging nanophotonic technology,” in Proc. of the 35th Annu. Int. Symp. on Computer Architecture (ISCA), June 2008, pp. 153–164.

Sekaric, L.

F. Xia, L. Sekaric, and Y. Vlasov, “Ultracompact optical buffers on a silicon chip,” Nat. Photonics, vol. 1, pp. 65–71, 2006.
[CrossRef]

Shacham, A.

A. Shacham, K. Bergman, and L. Carloni, “Photonic networks-on-chip for future generations of chip multiprocessors,” IEEE Trans. Comput., vol. 57, no. 9, pp. 1246–1260, Sept.2008.
[CrossRef]

Shakya, J.

S. Manipatruni, Q. Xu, B. Schmidt, J. Shakya, and M. Lipson, “High speed carrier injection 18 Gb/s silicon micro-ring electro-optic modulator,” in 20th Annu. Meeting of the IEEE Lasers and Electro-Optics Society (LEOS), Oct. 2007, pp. 537–538.

Shalf, J.

G. Hendry, J. Chan, S. Kamil, L. Oliker, J. Shalf, L. Carloni, and K. Bergman, “Silicon nanophotonic network-on-chip using TDM arbitration,” in 2010 IEEE 18th Annu. Symp. on High Performance Interconnects (HOTI), Aug. 2010, pp. 88–95.

G. Hendry, S. Kamil, A. Biberman, J. Chan, B. Lee, M. Mohiyuddin, A. Jain, K. Bergman, L. Carloni, J. Kubiatowicz, L. Oliker, and J. Shalf, “Analysis of photonic networks for a chip multiprocessor using scientific applications,” in 3rd ACM/IEEE Int. Symp. on Networks-on-Chip (NOCS), May 2009, pp. 104–113.

Sherwood-Droz, N.

A. Biberman, K. Preston, G. Hendry, N. Sherwood-Droz, J. Chan, J. S. Levy, M. Lipson, and K. Bergman, “Photonic network-on-chip architectures using multilayer deposited silicon materials for high-performance chip multiprocessors,” ACM J. Emerging Technol. Comput. Syst., vol. 7, pp. 7:1–7:25, July2011.

K. Preston, N. Sherwood-Droz, J. Levy, and M. Lipson, “Performance guidelines for WDM interconnects based on silicon microring resonators,” in Conf. on Lasers and Electro-Optics (CLEO), May 2011.

Skinner, D.

J. Borrill, J. Carter, L. Oliker, and D. Skinner, “Integrated performance monitoring of a cosmology application on leading HEC platforms,” in Proc. of the 2005 Int. Conf. on Parallel Processing, 2005, pp. 119–128.

Smith, H.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. Holzwarth, M. Popovic, H. Li, H. Smith, J. Hoyt, F. Kartner, R. Ram, V. Stojanovic, and K. Asanovic, “Building many-core processor-to-DRAM networks with monolithic CMOS silicon photonics,” IEEE Micro, vol. 29, no. 4, pp. 8–21, July–Aug.2009.
[CrossRef]

Sorel, M.

M. Gnan, S. Thorns, D. Macintyre, R. De La Rue, and M. Sorel, “Fabrication of low-loss photonic wires in silicon-on-insulator using hydrogen silsesquioxane electron-beam resist,” Electron. Lett., vol. 44, no. 2, pp. 115–116, Jan.2008.
[CrossRef]

Steinmeyer, G.

B. Little, J. Foresi, G. Steinmeyer, E. Thoen, S. Chu, H. Haus, E. Ippen, L. Kimerling, and W. Greene, “Ultra-compact Si-SiO2 microring resonator optical channel dropping filters,” IEEE Photon. Technol. Lett., vol. 10, no. 4, pp. 549–551, Apr.1998.
[CrossRef]

Stojanovic, V.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. Holzwarth, M. Popovic, H. Li, H. Smith, J. Hoyt, F. Kartner, R. Ram, V. Stojanovic, and K. Asanovic, “Building many-core processor-to-DRAM networks with monolithic CMOS silicon photonics,” IEEE Micro, vol. 29, no. 4, pp. 8–21, July–Aug.2009.
[CrossRef]

Suzuki, S.

Tang, W. M.

Z. Lin, S. Ethier, T. S. Hahm, and W. M. Tang, “Size scaling of turbulent transport in magnetically confined plasmas,” Phys. Rev. Lett., vol. 88, no. 19, 195004, Apr.2002.
[CrossRef] [PubMed]

Thoen, E.

B. Little, J. Foresi, G. Steinmeyer, E. Thoen, S. Chu, H. Haus, E. Ippen, L. Kimerling, and W. Greene, “Ultra-compact Si-SiO2 microring resonator optical channel dropping filters,” IEEE Photon. Technol. Lett., vol. 10, no. 4, pp. 549–551, Apr.1998.
[CrossRef]

Thorns, S.

M. Gnan, S. Thorns, D. Macintyre, R. De La Rue, and M. Sorel, “Fabrication of low-loss photonic wires in silicon-on-insulator using hydrogen silsesquioxane electron-beam resist,” Electron. Lett., vol. 44, no. 2, pp. 115–116, Jan.2008.
[CrossRef]

Thourhout, D. V.

Trotter, D.

M. Watts, D. Trotter, R. Young, and A. Lentine, “Ultralow power silicon microdisk modulators and switches,” in 5th IEEE Int. Conf. on Group IV Photonics, Sept. 2008, pp. 4–6.

Vantrease, D.

D. Vantrease, R. Schreiber, M. Monchiero, M. McLaren, N. P. Jouppi, M. Fiorentino, A. Davis, N. Binkert, R. G. Beausoleil, and J. H. Ahn, “Corona: System implications of emerging nanophotonic technology,” in Proc. of the 35th Annu. Int. Symp. on Computer Architecture (ISCA), June 2008, pp. 153–164.

Vlasov, Y.

F. Xia, L. Sekaric, and Y. Vlasov, “Ultracompact optical buffers on a silicon chip,” Nat. Photonics, vol. 1, pp. 65–71, 2006.
[CrossRef]

Vlasov, Y. A.

S. Assefa, B. G. Lee, C. Schow, W. M. Green, A. Rylyakov, R. A. John, and Y. A. Vlasov, “20 Gbps receiver based on germanium photodetector hybrid-integrated with 90 nm CMOS amplifier,” in CLEO 2011—Laser Applications to Photonic Applications, 2011, PDPB11.

Wang, L.

A. Canning, L. Wang, A. Williamson, and A. Zunger, “Parallel empirical pseudopotential electronic structure calculations for million atom systems,” J. Comput. Phys., vol. 160, no. 1, pp. 29–41, 2000.
[CrossRef]

Watkins, M. A.

N. Kirman, M. Kirman, R. K. Dokania, J. F. Martinez, A. B. Apsel, M. A. Watkins, and D. H. Albonesi, “On-chip optical technology in future bus-based multicore designs,” IEEE Micro, vol. 27, no. 1, pp. 56–66, 2007.
[CrossRef]

Watts, M.

M. Watts, D. Trotter, R. Young, and A. Lentine, “Ultralow power silicon microdisk modulators and switches,” in 5th IEEE Int. Conf. on Group IV Photonics, Sept. 2008, pp. 4–6.

Williamson, A.

A. Canning, L. Wang, A. Williamson, and A. Zunger, “Parallel empirical pseudopotential electronic structure calculations for million atom systems,” J. Comput. Phys., vol. 160, no. 1, pp. 29–41, 2000.
[CrossRef]

Xia, F.

F. Xia, L. Sekaric, and Y. Vlasov, “Ultracompact optical buffers on a silicon chip,” Nat. Photonics, vol. 1, pp. 65–71, 2006.
[CrossRef]

Xu, Q.

Q. Xu, D. Fattal, and R. G. Beausoleil, “Silicon microring resonators with 1.5-µm radius,” Opt. Express, vol. 16, no. 6, pp. 4309–4315, Mar.2008.
[CrossRef] [PubMed]

S. Manipatruni, Q. Xu, B. Schmidt, J. Shakya, and M. Lipson, “High speed carrier injection 18 Gb/s silicon micro-ring electro-optic modulator,” in 20th Annu. Meeting of the IEEE Lasers and Electro-Optics Society (LEOS), Oct. 2007, pp. 537–538.

Yanagase, Y.

Young, R.

M. Watts, D. Trotter, R. Young, and A. Lentine, “Ultralow power silicon microdisk modulators and switches,” in 5th IEEE Int. Conf. on Group IV Photonics, Sept. 2008, pp. 4–6.

Yuan, X.

X. Yuan, R. Melhem, and R. Gupta, “Distributed path reservation algorithms for multiplexed all-optical interconnection networks,” IEEE Trans. Comput., vol. 48, no. 12, pp. 1355–1363, Dec.1999.
[CrossRef]

Zhou, Z.

J. Feng, Q. Li, and Z. Zhou, “Single ring interferometer configuration with doubled free-spectral range,” IEEE Photon. Technol. Lett., vol. 23, no. 2, pp. 79–81, Jan.2011.
[CrossRef]

Zunger, A.

A. Canning, L. Wang, A. Williamson, and A. Zunger, “Parallel empirical pseudopotential electronic structure calculations for million atom systems,” J. Comput. Phys., vol. 160, no. 1, pp. 29–41, 2000.
[CrossRef]

ACM J. Emerging Technol. Comput. Syst. (1)

A. Biberman, K. Preston, G. Hendry, N. Sherwood-Droz, J. Chan, J. S. Levy, M. Lipson, and K. Bergman, “Photonic network-on-chip architectures using multilayer deposited silicon materials for high-performance chip multiprocessors,” ACM J. Emerging Technol. Comput. Syst., vol. 7, pp. 7:1–7:25, July2011.

Electron. Lett. (1)

M. Gnan, S. Thorns, D. Macintyre, R. De La Rue, and M. Sorel, “Fabrication of low-loss photonic wires in silicon-on-insulator using hydrogen silsesquioxane electron-beam resist,” Electron. Lett., vol. 44, no. 2, pp. 115–116, Jan.2008.
[CrossRef]

IEEE Micro (2)

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. Holzwarth, M. Popovic, H. Li, H. Smith, J. Hoyt, F. Kartner, R. Ram, V. Stojanovic, and K. Asanovic, “Building many-core processor-to-DRAM networks with monolithic CMOS silicon photonics,” IEEE Micro, vol. 29, no. 4, pp. 8–21, July–Aug.2009.
[CrossRef]

N. Kirman, M. Kirman, R. K. Dokania, J. F. Martinez, A. B. Apsel, M. A. Watkins, and D. H. Albonesi, “On-chip optical technology in future bus-based multicore designs,” IEEE Micro, vol. 27, no. 1, pp. 56–66, 2007.
[CrossRef]

IEEE Photon. Technol. Lett. (3)

B. Little, J. Foresi, G. Steinmeyer, E. Thoen, S. Chu, H. Haus, E. Ippen, L. Kimerling, and W. Greene, “Ultra-compact Si-SiO2 microring resonator optical channel dropping filters,” IEEE Photon. Technol. Lett., vol. 10, no. 4, pp. 549–551, Apr.1998.
[CrossRef]

B. Lee, A. Biberman, P. Dong, M. Lipson, and K. Bergman, “All-optical comb switch for multiwavelength message routing in silicon photonic networks,” IEEE Photon. Technol. Lett., vol. 20, no. 10, pp. 767–769, May2008.
[CrossRef]

J. Feng, Q. Li, and Z. Zhou, “Single ring interferometer configuration with doubled free-spectral range,” IEEE Photon. Technol. Lett., vol. 23, no. 2, pp. 79–81, Jan.2011.
[CrossRef]

IEEE Trans. Comput. (2)

A. Shacham, K. Bergman, and L. Carloni, “Photonic networks-on-chip for future generations of chip multiprocessors,” IEEE Trans. Comput., vol. 57, no. 9, pp. 1246–1260, Sept.2008.
[CrossRef]

X. Yuan, R. Melhem, and R. Gupta, “Distributed path reservation algorithms for multiplexed all-optical interconnection networks,” IEEE Trans. Comput., vol. 48, no. 12, pp. 1355–1363, Dec.1999.
[CrossRef]

IEEE Trans. Comput.-Aided Des. (1)

J. Chan, G. Hendry, K. Bergman, and L. Carloni, “Physical-layer modeling and system-level design of chip-scale photonic interconnection networks,” IEEE Trans. Comput.-Aided Des., vol. 30, no. 10, pp. 1507–1520, Oct.2011.
[CrossRef]

IEEE Trans. Parallel Distrib. Syst. (1)

C. Qiao and R. Melhem, “Reducing communication latency with path multiplexing in optically interconnected multiprocessor systems,” IEEE Trans. Parallel Distrib. Syst., vol. 8, no. 2, pp. 97–108, Feb.1997.
[CrossRef]

IEEE Trans. Very Large Scale Integr. (VLSI) Syst. (1)

A. B. Kahng, B. Li, L.-S. Peh, and K. Samadi, “ORION 2.0: A power-area simulator for interconnection networks,” IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 20, no. 1, pp. 191–196, Jan.2012.

J. Comput. Phys. (1)

A. Canning, L. Wang, A. Williamson, and A. Zunger, “Parallel empirical pseudopotential electronic structure calculations for million atom systems,” J. Comput. Phys., vol. 160, no. 1, pp. 29–41, 2000.
[CrossRef]

J. Lightwave Technol. (2)

Nat. Photonics (1)

F. Xia, L. Sekaric, and Y. Vlasov, “Ultracompact optical buffers on a silicon chip,” Nat. Photonics, vol. 1, pp. 65–71, 2006.
[CrossRef]

Opt. Express (3)

Opt. Lett. (2)

Phys. Rev. Lett. (1)

Z. Lin, S. Ethier, T. S. Hahm, and W. M. Tang, “Size scaling of turbulent transport in magnetically confined plasmas,” Phys. Rev. Lett., vol. 88, no. 19, 195004, Apr.2002.
[CrossRef] [PubMed]

Other (14)

J. Borrill, J. Carter, L. Oliker, and D. Skinner, “Integrated performance monitoring of a cosmology application on leading HEC platforms,” in Proc. of the 2005 Int. Conf. on Parallel Processing, 2005, pp. 119–128.

Cactus Computational Toolkit [Online]. Available: http://www.cactuscode.org/.

M. Watts, D. Trotter, R. Young, and A. Lentine, “Ultralow power silicon microdisk modulators and switches,” in 5th IEEE Int. Conf. on Group IV Photonics, Sept. 2008, pp. 4–6.

J. Chan, N. Ophir, C. P. Lai, A. Biberman, H. L. R. Lira, M. Lipson, and K. Bergman, “Data transmission using wavelength-selective spatial routing for photonic interconnection networks,” in Optical Fiber Communication Conf., Mar. 2011.

G. Hendry, S. Kamil, A. Biberman, J. Chan, B. Lee, M. Mohiyuddin, A. Jain, K. Bergman, L. Carloni, J. Kubiatowicz, L. Oliker, and J. Shalf, “Analysis of photonic networks for a chip multiprocessor using scientific applications,” in 3rd ACM/IEEE Int. Symp. on Networks-on-Chip (NOCS), May 2009, pp. 104–113.

G. Hendry, J. Chan, S. Kamil, L. Oliker, J. Shalf, L. Carloni, and K. Bergman, “Silicon nanophotonic network-on-chip using TDM arbitration,” in 2010 IEEE 18th Annu. Symp. on High Performance Interconnects (HOTI), Aug. 2010, pp. 88–95.

M. J. Cianchetti, J. C. Kerekes, and D. H. Albonesi, “Phastlane: a rapid transit optical routing network,” in Proc. of the 36th Annu. Int. Symp. on Computer Architecture (ISCA), 2009, pp. 441–450.

D. Vantrease, R. Schreiber, M. Monchiero, M. McLaren, N. P. Jouppi, M. Fiorentino, A. Davis, N. Binkert, R. G. Beausoleil, and J. H. Ahn, “Corona: System implications of emerging nanophotonic technology,” in Proc. of the 35th Annu. Int. Symp. on Computer Architecture (ISCA), June 2008, pp. 153–164.

S. Koohi, M. Abdollahi, and S. Hessabi, “All-optical wavelength-routed NoC based on a novel hierarchical topology,” in 5th IEEE/ACM Int. Symp. on Networks on Chip (NoCS), May 2011, pp. 97–104.

J. Garcia, A. Martinez, and J. Marti, “Optical add-drop multiplexer with FSR higher than 140 nm using ring resonators and photonic bandgap structures,” in 5th IEEE Int. Conf. on Group IV Photonics, Sept. 2008, pp. 82–84.

S. Assefa, B. G. Lee, C. Schow, W. M. Green, A. Rylyakov, R. A. John, and Y. A. Vlasov, “20 Gbps receiver based on germanium photodetector hybrid-integrated with 90 nm CMOS amplifier,” in CLEO 2011—Laser Applications to Photonic Applications, 2011, PDPB11.

N. Ophir, K. Padmaraju, A. Biberman, L. Chen, K. Preston, M. Lipson, and K. Bergman, “First demonstration of error-free operation of a full silicon on-chip photonic link,” in Optical Fiber Communication Conf., 2011, OWZ3.

S. Manipatruni, Q. Xu, B. Schmidt, J. Shakya, and M. Lipson, “High speed carrier injection 18 Gb/s silicon micro-ring electro-optic modulator,” in 20th Annu. Meeting of the IEEE Lasers and Electro-Optics Society (LEOS), Oct. 2007, pp. 537–538.

K. Preston, N. Sherwood-Droz, J. Levy, and M. Lipson, “Performance guidelines for WDM interconnects based on silicon microring resonators,” in Conf. on Lasers and Electro-Optics (CLEO), May 2011.

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Figures (15)

Fig. 1
Fig. 1

(Color online) Ring resonator functional characteristics. (a) Off-resonance wavelength with a single waveguide. (b) On-resonance wavelength with a single waveguide. (c) On-resonance wavelength with secondary waveguide. (d) Transmission spectra of a long FSR ring resonator. (e) Transmission spectra of a short FSR ring resonator. The solid and dotted spectra in (d) and (e) show the influence of electro-optic control on the resonances of the ring while in an electrically unbiased and biased state.

Fig. 2
Fig. 2

(Color online) Routing technique design space based on three arbitration domains: time, wavelength, and space.

Fig. 3
Fig. 3

(Color online) (a) Spectral placement of two WDM partitions (each containing three wavelength channels), with respect to the spectrum of an electro-optic broadband ring switch. (b)–(e) Four possible routing configurations for a two-partition router.

Fig. 4
Fig. 4

(Color online) The WSSR gateway architecture with concentrating processing cores.

Fig. 5
Fig. 5

Example timing diagram of the circuit-switching and WSSR allocation protocol. A path provisioning request is initially blocked, but is successful upon re-attempt.

Fig. 6
Fig. 6

Example timing diagram of the WSSR allocation protocol. If a single path provisioning request is attempted with multiple partitions, a path setup request can partially block on a particular partition while being successful on another partition.

Fig. 7
Fig. 7

(Color online) Schematic of the TorusNX topology. ‘G’ blocks represent gateway photonic switches and ‘X’ blocks represent 4 × 4 non-blocking photonic switches. Lines indicate bidirectional links which are composed of two waveguides that are used for counter-propagating lightwaves.

Fig. 8
Fig. 8

(Color online) Schematic of the TorusNX photonic routers configured with two WDM partitions: (a) gateway switch and (b) 4 × 4 non-blocking photonic switch.

Fig. 9
Fig. 9

(Color online) Insertion loss analysis of the TorusNX topology for varying levels of partitioning. Column plots correspond to worst-case insertion loss per component among all possible network paths (left-vertical axis). The line plot corresponds to the greatest total network-level insertion loss path among all possible network paths (right-vertical axis). The lossiest path does not necessarily correspond with the sum of the worst-case losses per component.

Fig. 10
Fig. 10

(Color online) Photonic router footprint for varying number of rings (which corresponds to the number of WDM partitions enabled by the router). Legend indicates the ring diameter for the single-ring case.

Fig. 11
Fig. 11

(Color online) Destination blocking probability in a non-blocking network for varying number of interleaved channels. The limit of each blocking probability as N is superimposed on the right of the plot.

Fig. 12
Fig. 12

(Color online) Average latency versus offered throughput for varying number of WDM partitions, message sizes, and number of wavelength channels. Electronic mesh performance is shown as a dotted line.

Fig. 13
Fig. 13

Traffic pattern plots for the four scientific applications being considered. The left axis represents the source thread ID, and the bottom axis represents the destination thread ID. White blocks represent no communication load while darker shades of gray represent increased traffic load between the associated source–destination pair.

Fig. 14
Fig. 14

(Color online) Total simulation time required to complete each application trace. Columns indicate the average resulting time, and error bars indicate one standard deviation of the sampled data.

Fig. 15
Fig. 15

(Color online) Network-level energy efficiency from each application trace. Columns indicate the average resulting energy efficiency, and error bars indicate one standard deviation of the sampled data.

Tables (4)

Tables Icon

Table I Insertion Loss Parameters

Tables Icon

Table II Application Trace Characteristics

Tables Icon

Table III Optical Device Power Parameters

Tables Icon

Table IV Application Trace Results Summary

Equations (3)

Equations on this page are rendered with MathJax. Learn more.

P a = N 2 N 1 N 2 .
P C = 1 i = 0 C 1 C i P a C i 1 P a i .
L C = lim N P C = 1 1 e C .