Abstract

Future data centers will require novel, scalable memory architectures capable of sustaining high bandwidths while still achieving low memory access latencies. Electronic interconnects cannot meet the challenges presented by the need for multi-terabit off-chip memory data paths. In this work, the electronic bus between main memory and its host processor is replaced with a circuit-switched optical interconnection network. We investigate the impact of our optically connected memory system on large-scale architectures and experimentally validate the protocol using field-programmable gate array based processor nodes and a custom-designed memory controller. The processor communicates all-optically with multiple synchronous dynamic random access memory nodes using 4 × 2.5-Gb/s wavelength-striped payloads, operating error free with bit-error rates less than 1012.

© 2011 OSA

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2009

2006

2001

R. Ho, W. Mai, and M. A. Horowitz, "The future of wires," Proc. IEEE 89, (4), 490‒504 (2001).
[CrossRef]

1995

W. A. Wulf and S. A. McKee, "Hitting the memory wall: implications of the obvious," ACM SIGARCH Comput. Archit. News 23, (1), 20‒24 (1995).
[CrossRef]

1965

J. W. Cooley and J. W. Tukey, "An algorithm for the machine calculation of complex Fourier series," Math. Comput. 19, 297‒301 (1965).
[CrossRef]

Akella, V.

A. Hadke, T. Benavides, S. J. B. Yoo, R. Amirtharajah, and V. Akella, "OCDIMM: scaling the DRAM memory wall using WDM based optical interconnects," Int. Symp. on High-Performance Interconnects, Aug. 2008.

Amirtharajah, R.

A. Hadke, T. Benavides, S. J. B. Yoo, R. Amirtharajah, and V. Akella, "OCDIMM: scaling the DRAM memory wall using WDM based optical interconnects," Int. Symp. on High-Performance Interconnects, Aug. 2008.

Asghari, M.

H. D. Thacker, Y. Luo, J. Shi, I. Shubin, J. Lexau, X. Zheng, G. Li, J. Yao, J. Costa, T. Pinguet, A. Mekis, P. Dong, S. Liao, D. Feng, M. Asghari, R. Ho, K. Raj, J. G. Mitchell, A. V. Krishnamoorthy, and J. E. Cunningham, "Flip-chip integrated silicon photonic bridge chips for sub-picojoule per bit optical links," Electronic Components and Technology Conf. (ECTC), June 2010, pp. 240‒246.

Assefa, S.

B. G. Lee, F. E. Doany, S. Assefa, W. M. J. Green, M. Yang, C. L. Schow, C. V. Jahnes, S. Zhang, J. Singer, V. I. Kopp, J. A. Kash, and Y. A. Vlasov, "20-µm-pitch eight-channel monolithic fiber array coupling 160 Gb/s/channel to silicon nanophotonic chip," Opt. Fiber Commun. Conf. (OFC 2011), Mar. 2010, San Diego, CA, PDPA4.

Bagheri, H.

A. F. Benner, D. M. Kuchta, P. K. Pepeljugoski, R. A. Budd, G. Hougham, B. V. Fasano, K. Marston, H. Bagheri, E. J. Seminaro, X. Hui, D. Meadowcroft, M. H. Fields, L. McColloch, M. Robinson, F. W. Miller, R. Kaneshiro, R. Granger, D. Childers, and E. Childers, "Optics for high-performance servers and supercomputers," Opt. Fiber Commun. Conf. (OFC 2010), Mar. 2010, San Diego, CA, OTuH1.

Barkerm, K. J.

K. J. Barkerm, A. Benner, R. Hoare, A. Hoisie, A. K. Jones, D. J. Kerbyson, D. Li, R. Melhem, R. Rajamony, E. Schenfeld, S. Shao, C. Stunkel, and P. Walker, "On the feasibility of optical circuit switching for high performance computing systems," Supercomputing (SC), Nov. 2005.

Batten, C.

S. Beamer, C. Sun, Y. J. Kwon, A. Joshi, C. Batten, and V. Stojanovic, "Re-architecting DRAM memory systems with monolithically integrated silicon photonics," 37th Int. Symp. on Computer Architecture (ISCA-37), June 2010.

Beamer, S.

S. Beamer, C. Sun, Y. J. Kwon, A. Joshi, C. Batten, and V. Stojanovic, "Re-architecting DRAM memory systems with monolithically integrated silicon photonics," 37th Int. Symp. on Computer Architecture (ISCA-37), June 2010.

Benavides, T.

A. Hadke, T. Benavides, S. J. B. Yoo, R. Amirtharajah, and V. Akella, "OCDIMM: scaling the DRAM memory wall using WDM based optical interconnects," Int. Symp. on High-Performance Interconnects, Aug. 2008.

Benner, A.

K. J. Barkerm, A. Benner, R. Hoare, A. Hoisie, A. K. Jones, D. J. Kerbyson, D. Li, R. Melhem, R. Rajamony, E. Schenfeld, S. Shao, C. Stunkel, and P. Walker, "On the feasibility of optical circuit switching for high performance computing systems," Supercomputing (SC), Nov. 2005.

Benner, A. F.

A. F. Benner, D. M. Kuchta, P. K. Pepeljugoski, R. A. Budd, G. Hougham, B. V. Fasano, K. Marston, H. Bagheri, E. J. Seminaro, X. Hui, D. Meadowcroft, M. H. Fields, L. McColloch, M. Robinson, F. W. Miller, R. Kaneshiro, R. Granger, D. Childers, and E. Childers, "Optics for high-performance servers and supercomputers," Opt. Fiber Commun. Conf. (OFC 2010), Mar. 2010, San Diego, CA, OTuH1.

Bergman, K.

O. Liboiron-Ladouceur, B. A. Small, and K. Bergman, "Physical layer scalability of WDM optical packet interconnection networks," J. Lightwave Technol. 24, (1), 262‒270 (2006).
[CrossRef]

C. P. Lai, D. Brunina, and K. Bergman, "Demonstration of 8 × 40-Gb/s wavelength-striped packet switching in a multi-terabit capacity optical network test-bed," 23rd Annu. Meeting of the IEEE Photonics Society, Nov. 2010, Denver, CO, ThQ 2.

K. Bergman, S. Borkar, D. Campbell, W. Carlson, W. Dally, M. Denneau, P. Franzon, W. Harrod, J. Hiller, S. Karp, S. Keckler, D. Klein, R. Lucas, M. Richards, A. Scarpelli, S. Scott, A. Snavely, T. Sterling, R. S. Williams, K. Yelick, and P. Kogge, Exascale computing study: technology challenges in achieving exascale systems, [Online]. Available: http://www.cse.nd.edu/Reports/2008/TR-2008-13.pdf.

D. Brunina, C. P. Lai, A. S. Garg, and K. Bergman, "First experimental demonstration of optically-connected SDRAM across a transparent optical network test-bed," 23rd Annu. Meeting of the IEEE Photonics Society, Nov. 2010, Denver, CO, ThI 1.

D. Brunina, C. P. Lai, A. S. Garg, and K. Bergman, "Wavelength-striped multicasting of optically-connected memory for large-scale computing systems," Opt. Fiber Commun. Conf. (OFC 2011), Mar. 2011, Los Angeles, CA, OWH4.

G. Hendry, E. Robinson, V. Gleyzer, J. Chan, L. P. Carloni, N. Bliss, and K. Bergman, "Circuit-switched memory access in photonic interconnection networks for high-performance embedded computing," Supercomputing (SC), Nov. 2010.

Bliss, N.

G. Hendry, E. Robinson, V. Gleyzer, J. Chan, L. P. Carloni, N. Bliss, and K. Bergman, "Circuit-switched memory access in photonic interconnection networks for high-performance embedded computing," Supercomputing (SC), Nov. 2010.

Borkar, S.

K. Bergman, S. Borkar, D. Campbell, W. Carlson, W. Dally, M. Denneau, P. Franzon, W. Harrod, J. Hiller, S. Karp, S. Keckler, D. Klein, R. Lucas, M. Richards, A. Scarpelli, S. Scott, A. Snavely, T. Sterling, R. S. Williams, K. Yelick, and P. Kogge, Exascale computing study: technology challenges in achieving exascale systems, [Online]. Available: http://www.cse.nd.edu/Reports/2008/TR-2008-13.pdf.

Brunina, D.

D. Brunina, C. P. Lai, A. S. Garg, and K. Bergman, "First experimental demonstration of optically-connected SDRAM across a transparent optical network test-bed," 23rd Annu. Meeting of the IEEE Photonics Society, Nov. 2010, Denver, CO, ThI 1.

C. P. Lai, D. Brunina, and K. Bergman, "Demonstration of 8 × 40-Gb/s wavelength-striped packet switching in a multi-terabit capacity optical network test-bed," 23rd Annu. Meeting of the IEEE Photonics Society, Nov. 2010, Denver, CO, ThQ 2.

D. Brunina, C. P. Lai, A. S. Garg, and K. Bergman, "Wavelength-striped multicasting of optically-connected memory for large-scale computing systems," Opt. Fiber Commun. Conf. (OFC 2011), Mar. 2011, Los Angeles, CA, OWH4.

Budd, R. A.

A. F. Benner, D. M. Kuchta, P. K. Pepeljugoski, R. A. Budd, G. Hougham, B. V. Fasano, K. Marston, H. Bagheri, E. J. Seminaro, X. Hui, D. Meadowcroft, M. H. Fields, L. McColloch, M. Robinson, F. W. Miller, R. Kaneshiro, R. Granger, D. Childers, and E. Childers, "Optics for high-performance servers and supercomputers," Opt. Fiber Commun. Conf. (OFC 2010), Mar. 2010, San Diego, CA, OTuH1.

Burger, D.

W. Lin, S. K. Reinhardt, and D. Burger, "Reducing DRAM latencies with an integrated memory hierarchy design," Proc. of the Int. Symp. on High-Performance Computer Architecture (HPCA), 2001, pp. 301‒312.

Campbell, D.

K. Bergman, S. Borkar, D. Campbell, W. Carlson, W. Dally, M. Denneau, P. Franzon, W. Harrod, J. Hiller, S. Karp, S. Keckler, D. Klein, R. Lucas, M. Richards, A. Scarpelli, S. Scott, A. Snavely, T. Sterling, R. S. Williams, K. Yelick, and P. Kogge, Exascale computing study: technology challenges in achieving exascale systems, [Online]. Available: http://www.cse.nd.edu/Reports/2008/TR-2008-13.pdf.

Carloni, L. P.

G. Hendry, E. Robinson, V. Gleyzer, J. Chan, L. P. Carloni, N. Bliss, and K. Bergman, "Circuit-switched memory access in photonic interconnection networks for high-performance embedded computing," Supercomputing (SC), Nov. 2010.

Carlson, W.

W. Carlson, T. El-Ghazawi, B. Numrich, and K. Yelick, "Programming in the partitioned global address space model," Supercomputing 2003, [Online]. Available: http://www.gwu.edu/upc/tutorials.html.

K. Bergman, S. Borkar, D. Campbell, W. Carlson, W. Dally, M. Denneau, P. Franzon, W. Harrod, J. Hiller, S. Karp, S. Keckler, D. Klein, R. Lucas, M. Richards, A. Scarpelli, S. Scott, A. Snavely, T. Sterling, R. S. Williams, K. Yelick, and P. Kogge, Exascale computing study: technology challenges in achieving exascale systems, [Online]. Available: http://www.cse.nd.edu/Reports/2008/TR-2008-13.pdf.

Chan, J.

G. Hendry, E. Robinson, V. Gleyzer, J. Chan, L. P. Carloni, N. Bliss, and K. Bergman, "Circuit-switched memory access in photonic interconnection networks for high-performance embedded computing," Supercomputing (SC), Nov. 2010.

Chen, L.

Childers, D.

A. F. Benner, D. M. Kuchta, P. K. Pepeljugoski, R. A. Budd, G. Hougham, B. V. Fasano, K. Marston, H. Bagheri, E. J. Seminaro, X. Hui, D. Meadowcroft, M. H. Fields, L. McColloch, M. Robinson, F. W. Miller, R. Kaneshiro, R. Granger, D. Childers, and E. Childers, "Optics for high-performance servers and supercomputers," Opt. Fiber Commun. Conf. (OFC 2010), Mar. 2010, San Diego, CA, OTuH1.

Childers, E.

A. F. Benner, D. M. Kuchta, P. K. Pepeljugoski, R. A. Budd, G. Hougham, B. V. Fasano, K. Marston, H. Bagheri, E. J. Seminaro, X. Hui, D. Meadowcroft, M. H. Fields, L. McColloch, M. Robinson, F. W. Miller, R. Kaneshiro, R. Granger, D. Childers, and E. Childers, "Optics for high-performance servers and supercomputers," Opt. Fiber Commun. Conf. (OFC 2010), Mar. 2010, San Diego, CA, OTuH1.

Cooley, J. W.

J. W. Cooley and J. W. Tukey, "An algorithm for the machine calculation of complex Fourier series," Math. Comput. 19, 297‒301 (1965).
[CrossRef]

Costa, J.

H. D. Thacker, Y. Luo, J. Shi, I. Shubin, J. Lexau, X. Zheng, G. Li, J. Yao, J. Costa, T. Pinguet, A. Mekis, P. Dong, S. Liao, D. Feng, M. Asghari, R. Ho, K. Raj, J. G. Mitchell, A. V. Krishnamoorthy, and J. E. Cunningham, "Flip-chip integrated silicon photonic bridge chips for sub-picojoule per bit optical links," Electronic Components and Technology Conf. (ECTC), June 2010, pp. 240‒246.

Cunningham, J. E.

H. D. Thacker, Y. Luo, J. Shi, I. Shubin, J. Lexau, X. Zheng, G. Li, J. Yao, J. Costa, T. Pinguet, A. Mekis, P. Dong, S. Liao, D. Feng, M. Asghari, R. Ho, K. Raj, J. G. Mitchell, A. V. Krishnamoorthy, and J. E. Cunningham, "Flip-chip integrated silicon photonic bridge chips for sub-picojoule per bit optical links," Electronic Components and Technology Conf. (ECTC), June 2010, pp. 240‒246.

Dally, W.

K. Bergman, S. Borkar, D. Campbell, W. Carlson, W. Dally, M. Denneau, P. Franzon, W. Harrod, J. Hiller, S. Karp, S. Keckler, D. Klein, R. Lucas, M. Richards, A. Scarpelli, S. Scott, A. Snavely, T. Sterling, R. S. Williams, K. Yelick, and P. Kogge, Exascale computing study: technology challenges in achieving exascale systems, [Online]. Available: http://www.cse.nd.edu/Reports/2008/TR-2008-13.pdf.

Dally, W. J.

S. Rixner, W. J. Dally, U. J. Kapasi, P. Mattson, and J. D. Owens, "Memory access scheduling," Proc. of the 27th Int. Symp. on Computer Architecture, 2000, pp. 128‒138.

Denneau, M.

K. Bergman, S. Borkar, D. Campbell, W. Carlson, W. Dally, M. Denneau, P. Franzon, W. Harrod, J. Hiller, S. Karp, S. Keckler, D. Klein, R. Lucas, M. Richards, A. Scarpelli, S. Scott, A. Snavely, T. Sterling, R. S. Williams, K. Yelick, and P. Kogge, Exascale computing study: technology challenges in achieving exascale systems, [Online]. Available: http://www.cse.nd.edu/Reports/2008/TR-2008-13.pdf.

Doany, F. E.

B. G. Lee, F. E. Doany, S. Assefa, W. M. J. Green, M. Yang, C. L. Schow, C. V. Jahnes, S. Zhang, J. Singer, V. I. Kopp, J. A. Kash, and Y. A. Vlasov, "20-µm-pitch eight-channel monolithic fiber array coupling 160 Gb/s/channel to silicon nanophotonic chip," Opt. Fiber Commun. Conf. (OFC 2011), Mar. 2010, San Diego, CA, PDPA4.

Doi, Y.

N. Nedovic, A. Kristensson, S. Parikh, S. Reddy, W. Walker, S. McLeod, N. Tzartzanis, H. Tamura, K. Kanda, T. Yamamoto, S. Matsubara, M. Kibune, Y. Doi, S. Ide, Y. Tsunoda, T. Yamabana, T. Shibasaki, Y. Tomita, T. Hamada, M. Sugawara, J. Ogawa, T. Ikeuchi, and N. Kuwata, "A 2 × 22.3 Gb/s SFI5.2 SerDes in 65 nm CMOS," Compound Semiconductor Integrated Circuit Symp., 2009 (CISC 2009), 11–14 Oct. 2009, pp. 1‒4.

Dong, P.

H. D. Thacker, Y. Luo, J. Shi, I. Shubin, J. Lexau, X. Zheng, G. Li, J. Yao, J. Costa, T. Pinguet, A. Mekis, P. Dong, S. Liao, D. Feng, M. Asghari, R. Ho, K. Raj, J. G. Mitchell, A. V. Krishnamoorthy, and J. E. Cunningham, "Flip-chip integrated silicon photonic bridge chips for sub-picojoule per bit optical links," Electronic Components and Technology Conf. (ECTC), June 2010, pp. 240‒246.

El-Ghazawi, T.

W. Carlson, T. El-Ghazawi, B. Numrich, and K. Yelick, "Programming in the partitioned global address space model," Supercomputing 2003, [Online]. Available: http://www.gwu.edu/upc/tutorials.html.

Fasano, B. V.

A. F. Benner, D. M. Kuchta, P. K. Pepeljugoski, R. A. Budd, G. Hougham, B. V. Fasano, K. Marston, H. Bagheri, E. J. Seminaro, X. Hui, D. Meadowcroft, M. H. Fields, L. McColloch, M. Robinson, F. W. Miller, R. Kaneshiro, R. Granger, D. Childers, and E. Childers, "Optics for high-performance servers and supercomputers," Opt. Fiber Commun. Conf. (OFC 2010), Mar. 2010, San Diego, CA, OTuH1.

Feng, D.

H. D. Thacker, Y. Luo, J. Shi, I. Shubin, J. Lexau, X. Zheng, G. Li, J. Yao, J. Costa, T. Pinguet, A. Mekis, P. Dong, S. Liao, D. Feng, M. Asghari, R. Ho, K. Raj, J. G. Mitchell, A. V. Krishnamoorthy, and J. E. Cunningham, "Flip-chip integrated silicon photonic bridge chips for sub-picojoule per bit optical links," Electronic Components and Technology Conf. (ECTC), June 2010, pp. 240‒246.

Fields, M. H.

A. F. Benner, D. M. Kuchta, P. K. Pepeljugoski, R. A. Budd, G. Hougham, B. V. Fasano, K. Marston, H. Bagheri, E. J. Seminaro, X. Hui, D. Meadowcroft, M. H. Fields, L. McColloch, M. Robinson, F. W. Miller, R. Kaneshiro, R. Granger, D. Childers, and E. Childers, "Optics for high-performance servers and supercomputers," Opt. Fiber Commun. Conf. (OFC 2010), Mar. 2010, San Diego, CA, OTuH1.

Franzon, P.

K. Bergman, S. Borkar, D. Campbell, W. Carlson, W. Dally, M. Denneau, P. Franzon, W. Harrod, J. Hiller, S. Karp, S. Keckler, D. Klein, R. Lucas, M. Richards, A. Scarpelli, S. Scott, A. Snavely, T. Sterling, R. S. Williams, K. Yelick, and P. Kogge, Exascale computing study: technology challenges in achieving exascale systems, [Online]. Available: http://www.cse.nd.edu/Reports/2008/TR-2008-13.pdf.

Garg, A. S.

D. Brunina, C. P. Lai, A. S. Garg, and K. Bergman, "First experimental demonstration of optically-connected SDRAM across a transparent optical network test-bed," 23rd Annu. Meeting of the IEEE Photonics Society, Nov. 2010, Denver, CO, ThI 1.

D. Brunina, C. P. Lai, A. S. Garg, and K. Bergman, "Wavelength-striped multicasting of optically-connected memory for large-scale computing systems," Opt. Fiber Commun. Conf. (OFC 2011), Mar. 2011, Los Angeles, CA, OWH4.

Gleyzer, V.

G. Hendry, E. Robinson, V. Gleyzer, J. Chan, L. P. Carloni, N. Bliss, and K. Bergman, "Circuit-switched memory access in photonic interconnection networks for high-performance embedded computing," Supercomputing (SC), Nov. 2010.

Granger, R.

A. F. Benner, D. M. Kuchta, P. K. Pepeljugoski, R. A. Budd, G. Hougham, B. V. Fasano, K. Marston, H. Bagheri, E. J. Seminaro, X. Hui, D. Meadowcroft, M. H. Fields, L. McColloch, M. Robinson, F. W. Miller, R. Kaneshiro, R. Granger, D. Childers, and E. Childers, "Optics for high-performance servers and supercomputers," Opt. Fiber Commun. Conf. (OFC 2010), Mar. 2010, San Diego, CA, OTuH1.

Green, W. M. J.

B. G. Lee, F. E. Doany, S. Assefa, W. M. J. Green, M. Yang, C. L. Schow, C. V. Jahnes, S. Zhang, J. Singer, V. I. Kopp, J. A. Kash, and Y. A. Vlasov, "20-µm-pitch eight-channel monolithic fiber array coupling 160 Gb/s/channel to silicon nanophotonic chip," Opt. Fiber Commun. Conf. (OFC 2011), Mar. 2010, San Diego, CA, PDPA4.

Greenberg, A.

A. Greenberg, J. R. Hamilton, N. Jain, S. Kandula, C. Kim, P. Lahiri, D. A. Maltz, P. Patel, and S. Sengupta, "VL2: a scalable and flexible data center network," Proc. of the ACM SIGCOMM 2009 Conf. on Data Communication (SIGCOMM’09), Aug. 2009, Barcelona, Spain, pp. 51‒62.

Hadke, A.

A. Hadke, T. Benavides, S. J. B. Yoo, R. Amirtharajah, and V. Akella, "OCDIMM: scaling the DRAM memory wall using WDM based optical interconnects," Int. Symp. on High-Performance Interconnects, Aug. 2008.

Hamada, T.

N. Nedovic, A. Kristensson, S. Parikh, S. Reddy, W. Walker, S. McLeod, N. Tzartzanis, H. Tamura, K. Kanda, T. Yamamoto, S. Matsubara, M. Kibune, Y. Doi, S. Ide, Y. Tsunoda, T. Yamabana, T. Shibasaki, Y. Tomita, T. Hamada, M. Sugawara, J. Ogawa, T. Ikeuchi, and N. Kuwata, "A 2 × 22.3 Gb/s SFI5.2 SerDes in 65 nm CMOS," Compound Semiconductor Integrated Circuit Symp., 2009 (CISC 2009), 11–14 Oct. 2009, pp. 1‒4.

Hamilton, J. R.

A. Greenberg, J. R. Hamilton, N. Jain, S. Kandula, C. Kim, P. Lahiri, D. A. Maltz, P. Patel, and S. Sengupta, "VL2: a scalable and flexible data center network," Proc. of the ACM SIGCOMM 2009 Conf. on Data Communication (SIGCOMM’09), Aug. 2009, Barcelona, Spain, pp. 51‒62.

Harrod, W.

K. Bergman, S. Borkar, D. Campbell, W. Carlson, W. Dally, M. Denneau, P. Franzon, W. Harrod, J. Hiller, S. Karp, S. Keckler, D. Klein, R. Lucas, M. Richards, A. Scarpelli, S. Scott, A. Snavely, T. Sterling, R. S. Williams, K. Yelick, and P. Kogge, Exascale computing study: technology challenges in achieving exascale systems, [Online]. Available: http://www.cse.nd.edu/Reports/2008/TR-2008-13.pdf.

Hendry, G.

G. Hendry, E. Robinson, V. Gleyzer, J. Chan, L. P. Carloni, N. Bliss, and K. Bergman, "Circuit-switched memory access in photonic interconnection networks for high-performance embedded computing," Supercomputing (SC), Nov. 2010.

Hiller, J.

K. Bergman, S. Borkar, D. Campbell, W. Carlson, W. Dally, M. Denneau, P. Franzon, W. Harrod, J. Hiller, S. Karp, S. Keckler, D. Klein, R. Lucas, M. Richards, A. Scarpelli, S. Scott, A. Snavely, T. Sterling, R. S. Williams, K. Yelick, and P. Kogge, Exascale computing study: technology challenges in achieving exascale systems, [Online]. Available: http://www.cse.nd.edu/Reports/2008/TR-2008-13.pdf.

Ho, R.

R. Ho, W. Mai, and M. A. Horowitz, "The future of wires," Proc. IEEE 89, (4), 490‒504 (2001).
[CrossRef]

H. D. Thacker, Y. Luo, J. Shi, I. Shubin, J. Lexau, X. Zheng, G. Li, J. Yao, J. Costa, T. Pinguet, A. Mekis, P. Dong, S. Liao, D. Feng, M. Asghari, R. Ho, K. Raj, J. G. Mitchell, A. V. Krishnamoorthy, and J. E. Cunningham, "Flip-chip integrated silicon photonic bridge chips for sub-picojoule per bit optical links," Electronic Components and Technology Conf. (ECTC), June 2010, pp. 240‒246.

Hoare, R.

K. J. Barkerm, A. Benner, R. Hoare, A. Hoisie, A. K. Jones, D. J. Kerbyson, D. Li, R. Melhem, R. Rajamony, E. Schenfeld, S. Shao, C. Stunkel, and P. Walker, "On the feasibility of optical circuit switching for high performance computing systems," Supercomputing (SC), Nov. 2005.

Hoisie, A.

K. J. Barkerm, A. Benner, R. Hoare, A. Hoisie, A. K. Jones, D. J. Kerbyson, D. Li, R. Melhem, R. Rajamony, E. Schenfeld, S. Shao, C. Stunkel, and P. Walker, "On the feasibility of optical circuit switching for high performance computing systems," Supercomputing (SC), Nov. 2005.

Horowitz, M. A.

R. Ho, W. Mai, and M. A. Horowitz, "The future of wires," Proc. IEEE 89, (4), 490‒504 (2001).
[CrossRef]

Hougham, G.

A. F. Benner, D. M. Kuchta, P. K. Pepeljugoski, R. A. Budd, G. Hougham, B. V. Fasano, K. Marston, H. Bagheri, E. J. Seminaro, X. Hui, D. Meadowcroft, M. H. Fields, L. McColloch, M. Robinson, F. W. Miller, R. Kaneshiro, R. Granger, D. Childers, and E. Childers, "Optics for high-performance servers and supercomputers," Opt. Fiber Commun. Conf. (OFC 2010), Mar. 2010, San Diego, CA, OTuH1.

Hui, X.

A. F. Benner, D. M. Kuchta, P. K. Pepeljugoski, R. A. Budd, G. Hougham, B. V. Fasano, K. Marston, H. Bagheri, E. J. Seminaro, X. Hui, D. Meadowcroft, M. H. Fields, L. McColloch, M. Robinson, F. W. Miller, R. Kaneshiro, R. Granger, D. Childers, and E. Childers, "Optics for high-performance servers and supercomputers," Opt. Fiber Commun. Conf. (OFC 2010), Mar. 2010, San Diego, CA, OTuH1.

Ide, S.

N. Nedovic, A. Kristensson, S. Parikh, S. Reddy, W. Walker, S. McLeod, N. Tzartzanis, H. Tamura, K. Kanda, T. Yamamoto, S. Matsubara, M. Kibune, Y. Doi, S. Ide, Y. Tsunoda, T. Yamabana, T. Shibasaki, Y. Tomita, T. Hamada, M. Sugawara, J. Ogawa, T. Ikeuchi, and N. Kuwata, "A 2 × 22.3 Gb/s SFI5.2 SerDes in 65 nm CMOS," Compound Semiconductor Integrated Circuit Symp., 2009 (CISC 2009), 11–14 Oct. 2009, pp. 1‒4.

Ikeuchi, T.

N. Nedovic, A. Kristensson, S. Parikh, S. Reddy, W. Walker, S. McLeod, N. Tzartzanis, H. Tamura, K. Kanda, T. Yamamoto, S. Matsubara, M. Kibune, Y. Doi, S. Ide, Y. Tsunoda, T. Yamabana, T. Shibasaki, Y. Tomita, T. Hamada, M. Sugawara, J. Ogawa, T. Ikeuchi, and N. Kuwata, "A 2 × 22.3 Gb/s SFI5.2 SerDes in 65 nm CMOS," Compound Semiconductor Integrated Circuit Symp., 2009 (CISC 2009), 11–14 Oct. 2009, pp. 1‒4.

Jacob, B.

B. Jacob, S. W. Ng, and D. T. Wang, Memory Systems: Cache, DRAM, Disk, Morgan Kaufmann, 2007.

Jahnes, C. V.

B. G. Lee, F. E. Doany, S. Assefa, W. M. J. Green, M. Yang, C. L. Schow, C. V. Jahnes, S. Zhang, J. Singer, V. I. Kopp, J. A. Kash, and Y. A. Vlasov, "20-µm-pitch eight-channel monolithic fiber array coupling 160 Gb/s/channel to silicon nanophotonic chip," Opt. Fiber Commun. Conf. (OFC 2011), Mar. 2010, San Diego, CA, PDPA4.

Jain, N.

A. Greenberg, J. R. Hamilton, N. Jain, S. Kandula, C. Kim, P. Lahiri, D. A. Maltz, P. Patel, and S. Sengupta, "VL2: a scalable and flexible data center network," Proc. of the ACM SIGCOMM 2009 Conf. on Data Communication (SIGCOMM’09), Aug. 2009, Barcelona, Spain, pp. 51‒62.

Jones, A. K.

K. J. Barkerm, A. Benner, R. Hoare, A. Hoisie, A. K. Jones, D. J. Kerbyson, D. Li, R. Melhem, R. Rajamony, E. Schenfeld, S. Shao, C. Stunkel, and P. Walker, "On the feasibility of optical circuit switching for high performance computing systems," Supercomputing (SC), Nov. 2005.

Joshi, A.

S. Beamer, C. Sun, Y. J. Kwon, A. Joshi, C. Batten, and V. Stojanovic, "Re-architecting DRAM memory systems with monolithically integrated silicon photonics," 37th Int. Symp. on Computer Architecture (ISCA-37), June 2010.

Kanda, K.

N. Nedovic, A. Kristensson, S. Parikh, S. Reddy, W. Walker, S. McLeod, N. Tzartzanis, H. Tamura, K. Kanda, T. Yamamoto, S. Matsubara, M. Kibune, Y. Doi, S. Ide, Y. Tsunoda, T. Yamabana, T. Shibasaki, Y. Tomita, T. Hamada, M. Sugawara, J. Ogawa, T. Ikeuchi, and N. Kuwata, "A 2 × 22.3 Gb/s SFI5.2 SerDes in 65 nm CMOS," Compound Semiconductor Integrated Circuit Symp., 2009 (CISC 2009), 11–14 Oct. 2009, pp. 1‒4.

Kandula, S.

A. Greenberg, J. R. Hamilton, N. Jain, S. Kandula, C. Kim, P. Lahiri, D. A. Maltz, P. Patel, and S. Sengupta, "VL2: a scalable and flexible data center network," Proc. of the ACM SIGCOMM 2009 Conf. on Data Communication (SIGCOMM’09), Aug. 2009, Barcelona, Spain, pp. 51‒62.

Kaneshiro, R.

A. F. Benner, D. M. Kuchta, P. K. Pepeljugoski, R. A. Budd, G. Hougham, B. V. Fasano, K. Marston, H. Bagheri, E. J. Seminaro, X. Hui, D. Meadowcroft, M. H. Fields, L. McColloch, M. Robinson, F. W. Miller, R. Kaneshiro, R. Granger, D. Childers, and E. Childers, "Optics for high-performance servers and supercomputers," Opt. Fiber Commun. Conf. (OFC 2010), Mar. 2010, San Diego, CA, OTuH1.

Kapasi, U. J.

S. Rixner, W. J. Dally, U. J. Kapasi, P. Mattson, and J. D. Owens, "Memory access scheduling," Proc. of the 27th Int. Symp. on Computer Architecture, 2000, pp. 128‒138.

Karp, S.

K. Bergman, S. Borkar, D. Campbell, W. Carlson, W. Dally, M. Denneau, P. Franzon, W. Harrod, J. Hiller, S. Karp, S. Keckler, D. Klein, R. Lucas, M. Richards, A. Scarpelli, S. Scott, A. Snavely, T. Sterling, R. S. Williams, K. Yelick, and P. Kogge, Exascale computing study: technology challenges in achieving exascale systems, [Online]. Available: http://www.cse.nd.edu/Reports/2008/TR-2008-13.pdf.

Kash, J. A.

B. G. Lee, F. E. Doany, S. Assefa, W. M. J. Green, M. Yang, C. L. Schow, C. V. Jahnes, S. Zhang, J. Singer, V. I. Kopp, J. A. Kash, and Y. A. Vlasov, "20-µm-pitch eight-channel monolithic fiber array coupling 160 Gb/s/channel to silicon nanophotonic chip," Opt. Fiber Commun. Conf. (OFC 2011), Mar. 2010, San Diego, CA, PDPA4.

Katayama, Y.

Y. Katayama and A. Okazaki, "Optical interconnect opportunities for future server memory systems," Proc. IEEE HPCA, 2007, pp. 46‒50.

Keckler, S.

K. Bergman, S. Borkar, D. Campbell, W. Carlson, W. Dally, M. Denneau, P. Franzon, W. Harrod, J. Hiller, S. Karp, S. Keckler, D. Klein, R. Lucas, M. Richards, A. Scarpelli, S. Scott, A. Snavely, T. Sterling, R. S. Williams, K. Yelick, and P. Kogge, Exascale computing study: technology challenges in achieving exascale systems, [Online]. Available: http://www.cse.nd.edu/Reports/2008/TR-2008-13.pdf.

Kerbyson, D. J.

K. J. Barkerm, A. Benner, R. Hoare, A. Hoisie, A. K. Jones, D. J. Kerbyson, D. Li, R. Melhem, R. Rajamony, E. Schenfeld, S. Shao, C. Stunkel, and P. Walker, "On the feasibility of optical circuit switching for high performance computing systems," Supercomputing (SC), Nov. 2005.

Kibune, M.

N. Nedovic, A. Kristensson, S. Parikh, S. Reddy, W. Walker, S. McLeod, N. Tzartzanis, H. Tamura, K. Kanda, T. Yamamoto, S. Matsubara, M. Kibune, Y. Doi, S. Ide, Y. Tsunoda, T. Yamabana, T. Shibasaki, Y. Tomita, T. Hamada, M. Sugawara, J. Ogawa, T. Ikeuchi, and N. Kuwata, "A 2 × 22.3 Gb/s SFI5.2 SerDes in 65 nm CMOS," Compound Semiconductor Integrated Circuit Symp., 2009 (CISC 2009), 11–14 Oct. 2009, pp. 1‒4.

Kim, C.

A. Greenberg, J. R. Hamilton, N. Jain, S. Kandula, C. Kim, P. Lahiri, D. A. Maltz, P. Patel, and S. Sengupta, "VL2: a scalable and flexible data center network," Proc. of the ACM SIGCOMM 2009 Conf. on Data Communication (SIGCOMM’09), Aug. 2009, Barcelona, Spain, pp. 51‒62.

Klein, D.

K. Bergman, S. Borkar, D. Campbell, W. Carlson, W. Dally, M. Denneau, P. Franzon, W. Harrod, J. Hiller, S. Karp, S. Keckler, D. Klein, R. Lucas, M. Richards, A. Scarpelli, S. Scott, A. Snavely, T. Sterling, R. S. Williams, K. Yelick, and P. Kogge, Exascale computing study: technology challenges in achieving exascale systems, [Online]. Available: http://www.cse.nd.edu/Reports/2008/TR-2008-13.pdf.

Kogge, P.

K. Bergman, S. Borkar, D. Campbell, W. Carlson, W. Dally, M. Denneau, P. Franzon, W. Harrod, J. Hiller, S. Karp, S. Keckler, D. Klein, R. Lucas, M. Richards, A. Scarpelli, S. Scott, A. Snavely, T. Sterling, R. S. Williams, K. Yelick, and P. Kogge, Exascale computing study: technology challenges in achieving exascale systems, [Online]. Available: http://www.cse.nd.edu/Reports/2008/TR-2008-13.pdf.

Kolodny, A.

N. Magen, A. Kolodny, U. Weiser, and N. Shamir, "Interconnect-power dissipation in a microprocessor," SLIP’04: Proc. of the 2004 Int. Workshop on System Level Interconnect Prediction, 2004, ACM, pp. 7‒13.

Kopp, V. I.

B. G. Lee, F. E. Doany, S. Assefa, W. M. J. Green, M. Yang, C. L. Schow, C. V. Jahnes, S. Zhang, J. Singer, V. I. Kopp, J. A. Kash, and Y. A. Vlasov, "20-µm-pitch eight-channel monolithic fiber array coupling 160 Gb/s/channel to silicon nanophotonic chip," Opt. Fiber Commun. Conf. (OFC 2011), Mar. 2010, San Diego, CA, PDPA4.

Krishnamoorthy, A. V.

H. D. Thacker, Y. Luo, J. Shi, I. Shubin, J. Lexau, X. Zheng, G. Li, J. Yao, J. Costa, T. Pinguet, A. Mekis, P. Dong, S. Liao, D. Feng, M. Asghari, R. Ho, K. Raj, J. G. Mitchell, A. V. Krishnamoorthy, and J. E. Cunningham, "Flip-chip integrated silicon photonic bridge chips for sub-picojoule per bit optical links," Electronic Components and Technology Conf. (ECTC), June 2010, pp. 240‒246.

Kristensson, A.

N. Nedovic, A. Kristensson, S. Parikh, S. Reddy, W. Walker, S. McLeod, N. Tzartzanis, H. Tamura, K. Kanda, T. Yamamoto, S. Matsubara, M. Kibune, Y. Doi, S. Ide, Y. Tsunoda, T. Yamabana, T. Shibasaki, Y. Tomita, T. Hamada, M. Sugawara, J. Ogawa, T. Ikeuchi, and N. Kuwata, "A 2 × 22.3 Gb/s SFI5.2 SerDes in 65 nm CMOS," Compound Semiconductor Integrated Circuit Symp., 2009 (CISC 2009), 11–14 Oct. 2009, pp. 1‒4.

Kuchta, D. M.

A. F. Benner, D. M. Kuchta, P. K. Pepeljugoski, R. A. Budd, G. Hougham, B. V. Fasano, K. Marston, H. Bagheri, E. J. Seminaro, X. Hui, D. Meadowcroft, M. H. Fields, L. McColloch, M. Robinson, F. W. Miller, R. Kaneshiro, R. Granger, D. Childers, and E. Childers, "Optics for high-performance servers and supercomputers," Opt. Fiber Commun. Conf. (OFC 2010), Mar. 2010, San Diego, CA, OTuH1.

Kuwata, N.

N. Nedovic, A. Kristensson, S. Parikh, S. Reddy, W. Walker, S. McLeod, N. Tzartzanis, H. Tamura, K. Kanda, T. Yamamoto, S. Matsubara, M. Kibune, Y. Doi, S. Ide, Y. Tsunoda, T. Yamabana, T. Shibasaki, Y. Tomita, T. Hamada, M. Sugawara, J. Ogawa, T. Ikeuchi, and N. Kuwata, "A 2 × 22.3 Gb/s SFI5.2 SerDes in 65 nm CMOS," Compound Semiconductor Integrated Circuit Symp., 2009 (CISC 2009), 11–14 Oct. 2009, pp. 1‒4.

Kwon, Y. J.

S. Beamer, C. Sun, Y. J. Kwon, A. Joshi, C. Batten, and V. Stojanovic, "Re-architecting DRAM memory systems with monolithically integrated silicon photonics," 37th Int. Symp. on Computer Architecture (ISCA-37), June 2010.

Lahiri, P.

A. Greenberg, J. R. Hamilton, N. Jain, S. Kandula, C. Kim, P. Lahiri, D. A. Maltz, P. Patel, and S. Sengupta, "VL2: a scalable and flexible data center network," Proc. of the ACM SIGCOMM 2009 Conf. on Data Communication (SIGCOMM’09), Aug. 2009, Barcelona, Spain, pp. 51‒62.

Lai, C. P.

D. Brunina, C. P. Lai, A. S. Garg, and K. Bergman, "Wavelength-striped multicasting of optically-connected memory for large-scale computing systems," Opt. Fiber Commun. Conf. (OFC 2011), Mar. 2011, Los Angeles, CA, OWH4.

C. P. Lai, D. Brunina, and K. Bergman, "Demonstration of 8 × 40-Gb/s wavelength-striped packet switching in a multi-terabit capacity optical network test-bed," 23rd Annu. Meeting of the IEEE Photonics Society, Nov. 2010, Denver, CO, ThQ 2.

D. Brunina, C. P. Lai, A. S. Garg, and K. Bergman, "First experimental demonstration of optically-connected SDRAM across a transparent optical network test-bed," 23rd Annu. Meeting of the IEEE Photonics Society, Nov. 2010, Denver, CO, ThI 1.

Lee, B. G.

B. G. Lee, F. E. Doany, S. Assefa, W. M. J. Green, M. Yang, C. L. Schow, C. V. Jahnes, S. Zhang, J. Singer, V. I. Kopp, J. A. Kash, and Y. A. Vlasov, "20-µm-pitch eight-channel monolithic fiber array coupling 160 Gb/s/channel to silicon nanophotonic chip," Opt. Fiber Commun. Conf. (OFC 2011), Mar. 2010, San Diego, CA, PDPA4.

Lentine, A. L.

W. A. Zortman, M. R. Watts, D. C. Trotter, R. W. Young, and A. L. Lentine, "Low-power high-speed silicon microdisk modulators," Conf. on Lasers and Electro-Optics, May 2010, CThJ4.

Lexau, J.

H. D. Thacker, Y. Luo, J. Shi, I. Shubin, J. Lexau, X. Zheng, G. Li, J. Yao, J. Costa, T. Pinguet, A. Mekis, P. Dong, S. Liao, D. Feng, M. Asghari, R. Ho, K. Raj, J. G. Mitchell, A. V. Krishnamoorthy, and J. E. Cunningham, "Flip-chip integrated silicon photonic bridge chips for sub-picojoule per bit optical links," Electronic Components and Technology Conf. (ECTC), June 2010, pp. 240‒246.

Li, D.

K. J. Barkerm, A. Benner, R. Hoare, A. Hoisie, A. K. Jones, D. J. Kerbyson, D. Li, R. Melhem, R. Rajamony, E. Schenfeld, S. Shao, C. Stunkel, and P. Walker, "On the feasibility of optical circuit switching for high performance computing systems," Supercomputing (SC), Nov. 2005.

Li, G.

H. D. Thacker, Y. Luo, J. Shi, I. Shubin, J. Lexau, X. Zheng, G. Li, J. Yao, J. Costa, T. Pinguet, A. Mekis, P. Dong, S. Liao, D. Feng, M. Asghari, R. Ho, K. Raj, J. G. Mitchell, A. V. Krishnamoorthy, and J. E. Cunningham, "Flip-chip integrated silicon photonic bridge chips for sub-picojoule per bit optical links," Electronic Components and Technology Conf. (ECTC), June 2010, pp. 240‒246.

Liao, S.

H. D. Thacker, Y. Luo, J. Shi, I. Shubin, J. Lexau, X. Zheng, G. Li, J. Yao, J. Costa, T. Pinguet, A. Mekis, P. Dong, S. Liao, D. Feng, M. Asghari, R. Ho, K. Raj, J. G. Mitchell, A. V. Krishnamoorthy, and J. E. Cunningham, "Flip-chip integrated silicon photonic bridge chips for sub-picojoule per bit optical links," Electronic Components and Technology Conf. (ECTC), June 2010, pp. 240‒246.

Liboiron-Ladouceur, O.

Lin, W.

W. Lin, S. K. Reinhardt, and D. Burger, "Reducing DRAM latencies with an integrated memory hierarchy design," Proc. of the Int. Symp. on High-Performance Computer Architecture (HPCA), 2001, pp. 301‒312.

Lipson, M.

Lucas, R.

K. Bergman, S. Borkar, D. Campbell, W. Carlson, W. Dally, M. Denneau, P. Franzon, W. Harrod, J. Hiller, S. Karp, S. Keckler, D. Klein, R. Lucas, M. Richards, A. Scarpelli, S. Scott, A. Snavely, T. Sterling, R. S. Williams, K. Yelick, and P. Kogge, Exascale computing study: technology challenges in achieving exascale systems, [Online]. Available: http://www.cse.nd.edu/Reports/2008/TR-2008-13.pdf.

Luo, Y.

H. D. Thacker, Y. Luo, J. Shi, I. Shubin, J. Lexau, X. Zheng, G. Li, J. Yao, J. Costa, T. Pinguet, A. Mekis, P. Dong, S. Liao, D. Feng, M. Asghari, R. Ho, K. Raj, J. G. Mitchell, A. V. Krishnamoorthy, and J. E. Cunningham, "Flip-chip integrated silicon photonic bridge chips for sub-picojoule per bit optical links," Electronic Components and Technology Conf. (ECTC), June 2010, pp. 240‒246.

Magen, N.

N. Magen, A. Kolodny, U. Weiser, and N. Shamir, "Interconnect-power dissipation in a microprocessor," SLIP’04: Proc. of the 2004 Int. Workshop on System Level Interconnect Prediction, 2004, ACM, pp. 7‒13.

Mai, W.

R. Ho, W. Mai, and M. A. Horowitz, "The future of wires," Proc. IEEE 89, (4), 490‒504 (2001).
[CrossRef]

Maltz, D. A.

A. Greenberg, J. R. Hamilton, N. Jain, S. Kandula, C. Kim, P. Lahiri, D. A. Maltz, P. Patel, and S. Sengupta, "VL2: a scalable and flexible data center network," Proc. of the ACM SIGCOMM 2009 Conf. on Data Communication (SIGCOMM’09), Aug. 2009, Barcelona, Spain, pp. 51‒62.

Manipatruni, S.

Marston, K.

A. F. Benner, D. M. Kuchta, P. K. Pepeljugoski, R. A. Budd, G. Hougham, B. V. Fasano, K. Marston, H. Bagheri, E. J. Seminaro, X. Hui, D. Meadowcroft, M. H. Fields, L. McColloch, M. Robinson, F. W. Miller, R. Kaneshiro, R. Granger, D. Childers, and E. Childers, "Optics for high-performance servers and supercomputers," Opt. Fiber Commun. Conf. (OFC 2010), Mar. 2010, San Diego, CA, OTuH1.

Matsubara, S.

N. Nedovic, A. Kristensson, S. Parikh, S. Reddy, W. Walker, S. McLeod, N. Tzartzanis, H. Tamura, K. Kanda, T. Yamamoto, S. Matsubara, M. Kibune, Y. Doi, S. Ide, Y. Tsunoda, T. Yamabana, T. Shibasaki, Y. Tomita, T. Hamada, M. Sugawara, J. Ogawa, T. Ikeuchi, and N. Kuwata, "A 2 × 22.3 Gb/s SFI5.2 SerDes in 65 nm CMOS," Compound Semiconductor Integrated Circuit Symp., 2009 (CISC 2009), 11–14 Oct. 2009, pp. 1‒4.

Mattson, P.

S. Rixner, W. J. Dally, U. J. Kapasi, P. Mattson, and J. D. Owens, "Memory access scheduling," Proc. of the 27th Int. Symp. on Computer Architecture, 2000, pp. 128‒138.

McColloch, L.

A. F. Benner, D. M. Kuchta, P. K. Pepeljugoski, R. A. Budd, G. Hougham, B. V. Fasano, K. Marston, H. Bagheri, E. J. Seminaro, X. Hui, D. Meadowcroft, M. H. Fields, L. McColloch, M. Robinson, F. W. Miller, R. Kaneshiro, R. Granger, D. Childers, and E. Childers, "Optics for high-performance servers and supercomputers," Opt. Fiber Commun. Conf. (OFC 2010), Mar. 2010, San Diego, CA, OTuH1.

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W. A. Wulf and S. A. McKee, "Hitting the memory wall: implications of the obvious," ACM SIGARCH Comput. Archit. News 23, (1), 20‒24 (1995).
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McLeod, S.

N. Nedovic, A. Kristensson, S. Parikh, S. Reddy, W. Walker, S. McLeod, N. Tzartzanis, H. Tamura, K. Kanda, T. Yamamoto, S. Matsubara, M. Kibune, Y. Doi, S. Ide, Y. Tsunoda, T. Yamabana, T. Shibasaki, Y. Tomita, T. Hamada, M. Sugawara, J. Ogawa, T. Ikeuchi, and N. Kuwata, "A 2 × 22.3 Gb/s SFI5.2 SerDes in 65 nm CMOS," Compound Semiconductor Integrated Circuit Symp., 2009 (CISC 2009), 11–14 Oct. 2009, pp. 1‒4.

Meadowcroft, D.

A. F. Benner, D. M. Kuchta, P. K. Pepeljugoski, R. A. Budd, G. Hougham, B. V. Fasano, K. Marston, H. Bagheri, E. J. Seminaro, X. Hui, D. Meadowcroft, M. H. Fields, L. McColloch, M. Robinson, F. W. Miller, R. Kaneshiro, R. Granger, D. Childers, and E. Childers, "Optics for high-performance servers and supercomputers," Opt. Fiber Commun. Conf. (OFC 2010), Mar. 2010, San Diego, CA, OTuH1.

Mekis, A.

H. D. Thacker, Y. Luo, J. Shi, I. Shubin, J. Lexau, X. Zheng, G. Li, J. Yao, J. Costa, T. Pinguet, A. Mekis, P. Dong, S. Liao, D. Feng, M. Asghari, R. Ho, K. Raj, J. G. Mitchell, A. V. Krishnamoorthy, and J. E. Cunningham, "Flip-chip integrated silicon photonic bridge chips for sub-picojoule per bit optical links," Electronic Components and Technology Conf. (ECTC), June 2010, pp. 240‒246.

Melhem, R.

K. J. Barkerm, A. Benner, R. Hoare, A. Hoisie, A. K. Jones, D. J. Kerbyson, D. Li, R. Melhem, R. Rajamony, E. Schenfeld, S. Shao, C. Stunkel, and P. Walker, "On the feasibility of optical circuit switching for high performance computing systems," Supercomputing (SC), Nov. 2005.

Miller, F. W.

A. F. Benner, D. M. Kuchta, P. K. Pepeljugoski, R. A. Budd, G. Hougham, B. V. Fasano, K. Marston, H. Bagheri, E. J. Seminaro, X. Hui, D. Meadowcroft, M. H. Fields, L. McColloch, M. Robinson, F. W. Miller, R. Kaneshiro, R. Granger, D. Childers, and E. Childers, "Optics for high-performance servers and supercomputers," Opt. Fiber Commun. Conf. (OFC 2010), Mar. 2010, San Diego, CA, OTuH1.

Mitchell, J. G.

H. D. Thacker, Y. Luo, J. Shi, I. Shubin, J. Lexau, X. Zheng, G. Li, J. Yao, J. Costa, T. Pinguet, A. Mekis, P. Dong, S. Liao, D. Feng, M. Asghari, R. Ho, K. Raj, J. G. Mitchell, A. V. Krishnamoorthy, and J. E. Cunningham, "Flip-chip integrated silicon photonic bridge chips for sub-picojoule per bit optical links," Electronic Components and Technology Conf. (ECTC), June 2010, pp. 240‒246.

Nedovic, N.

N. Nedovic, A. Kristensson, S. Parikh, S. Reddy, W. Walker, S. McLeod, N. Tzartzanis, H. Tamura, K. Kanda, T. Yamamoto, S. Matsubara, M. Kibune, Y. Doi, S. Ide, Y. Tsunoda, T. Yamabana, T. Shibasaki, Y. Tomita, T. Hamada, M. Sugawara, J. Ogawa, T. Ikeuchi, and N. Kuwata, "A 2 × 22.3 Gb/s SFI5.2 SerDes in 65 nm CMOS," Compound Semiconductor Integrated Circuit Symp., 2009 (CISC 2009), 11–14 Oct. 2009, pp. 1‒4.

Ng, S. W.

B. Jacob, S. W. Ng, and D. T. Wang, Memory Systems: Cache, DRAM, Disk, Morgan Kaufmann, 2007.

Numrich, B.

W. Carlson, T. El-Ghazawi, B. Numrich, and K. Yelick, "Programming in the partitioned global address space model," Supercomputing 2003, [Online]. Available: http://www.gwu.edu/upc/tutorials.html.

Offrein, B. J.

B. J. Offrein and P. Pepeljugoski, "Optics in supercomputers," Eur. Conf. Opt. Commun. (ECOC 2009), Sept. 2009, Vienna, Austria, 3.1.3.

Ogawa, J.

N. Nedovic, A. Kristensson, S. Parikh, S. Reddy, W. Walker, S. McLeod, N. Tzartzanis, H. Tamura, K. Kanda, T. Yamamoto, S. Matsubara, M. Kibune, Y. Doi, S. Ide, Y. Tsunoda, T. Yamabana, T. Shibasaki, Y. Tomita, T. Hamada, M. Sugawara, J. Ogawa, T. Ikeuchi, and N. Kuwata, "A 2 × 22.3 Gb/s SFI5.2 SerDes in 65 nm CMOS," Compound Semiconductor Integrated Circuit Symp., 2009 (CISC 2009), 11–14 Oct. 2009, pp. 1‒4.

Okazaki, A.

Y. Katayama and A. Okazaki, "Optical interconnect opportunities for future server memory systems," Proc. IEEE HPCA, 2007, pp. 46‒50.

Owens, J. D.

S. Rixner, W. J. Dally, U. J. Kapasi, P. Mattson, and J. D. Owens, "Memory access scheduling," Proc. of the 27th Int. Symp. on Computer Architecture, 2000, pp. 128‒138.

Parikh, S.

N. Nedovic, A. Kristensson, S. Parikh, S. Reddy, W. Walker, S. McLeod, N. Tzartzanis, H. Tamura, K. Kanda, T. Yamamoto, S. Matsubara, M. Kibune, Y. Doi, S. Ide, Y. Tsunoda, T. Yamabana, T. Shibasaki, Y. Tomita, T. Hamada, M. Sugawara, J. Ogawa, T. Ikeuchi, and N. Kuwata, "A 2 × 22.3 Gb/s SFI5.2 SerDes in 65 nm CMOS," Compound Semiconductor Integrated Circuit Symp., 2009 (CISC 2009), 11–14 Oct. 2009, pp. 1‒4.

Patel, P.

A. Greenberg, J. R. Hamilton, N. Jain, S. Kandula, C. Kim, P. Lahiri, D. A. Maltz, P. Patel, and S. Sengupta, "VL2: a scalable and flexible data center network," Proc. of the ACM SIGCOMM 2009 Conf. on Data Communication (SIGCOMM’09), Aug. 2009, Barcelona, Spain, pp. 51‒62.

Pepeljugoski, P.

B. J. Offrein and P. Pepeljugoski, "Optics in supercomputers," Eur. Conf. Opt. Commun. (ECOC 2009), Sept. 2009, Vienna, Austria, 3.1.3.

Pepeljugoski, P. K.

A. F. Benner, D. M. Kuchta, P. K. Pepeljugoski, R. A. Budd, G. Hougham, B. V. Fasano, K. Marston, H. Bagheri, E. J. Seminaro, X. Hui, D. Meadowcroft, M. H. Fields, L. McColloch, M. Robinson, F. W. Miller, R. Kaneshiro, R. Granger, D. Childers, and E. Childers, "Optics for high-performance servers and supercomputers," Opt. Fiber Commun. Conf. (OFC 2010), Mar. 2010, San Diego, CA, OTuH1.

Pinguet, T.

H. D. Thacker, Y. Luo, J. Shi, I. Shubin, J. Lexau, X. Zheng, G. Li, J. Yao, J. Costa, T. Pinguet, A. Mekis, P. Dong, S. Liao, D. Feng, M. Asghari, R. Ho, K. Raj, J. G. Mitchell, A. V. Krishnamoorthy, and J. E. Cunningham, "Flip-chip integrated silicon photonic bridge chips for sub-picojoule per bit optical links," Electronic Components and Technology Conf. (ECTC), June 2010, pp. 240‒246.

Preston, K.

Raj, K.

H. D. Thacker, Y. Luo, J. Shi, I. Shubin, J. Lexau, X. Zheng, G. Li, J. Yao, J. Costa, T. Pinguet, A. Mekis, P. Dong, S. Liao, D. Feng, M. Asghari, R. Ho, K. Raj, J. G. Mitchell, A. V. Krishnamoorthy, and J. E. Cunningham, "Flip-chip integrated silicon photonic bridge chips for sub-picojoule per bit optical links," Electronic Components and Technology Conf. (ECTC), June 2010, pp. 240‒246.

Rajamony, R.

K. J. Barkerm, A. Benner, R. Hoare, A. Hoisie, A. K. Jones, D. J. Kerbyson, D. Li, R. Melhem, R. Rajamony, E. Schenfeld, S. Shao, C. Stunkel, and P. Walker, "On the feasibility of optical circuit switching for high performance computing systems," Supercomputing (SC), Nov. 2005.

Reddy, S.

N. Nedovic, A. Kristensson, S. Parikh, S. Reddy, W. Walker, S. McLeod, N. Tzartzanis, H. Tamura, K. Kanda, T. Yamamoto, S. Matsubara, M. Kibune, Y. Doi, S. Ide, Y. Tsunoda, T. Yamabana, T. Shibasaki, Y. Tomita, T. Hamada, M. Sugawara, J. Ogawa, T. Ikeuchi, and N. Kuwata, "A 2 × 22.3 Gb/s SFI5.2 SerDes in 65 nm CMOS," Compound Semiconductor Integrated Circuit Symp., 2009 (CISC 2009), 11–14 Oct. 2009, pp. 1‒4.

Reinhardt, S. K.

W. Lin, S. K. Reinhardt, and D. Burger, "Reducing DRAM latencies with an integrated memory hierarchy design," Proc. of the Int. Symp. on High-Performance Computer Architecture (HPCA), 2001, pp. 301‒312.

Richards, M.

K. Bergman, S. Borkar, D. Campbell, W. Carlson, W. Dally, M. Denneau, P. Franzon, W. Harrod, J. Hiller, S. Karp, S. Keckler, D. Klein, R. Lucas, M. Richards, A. Scarpelli, S. Scott, A. Snavely, T. Sterling, R. S. Williams, K. Yelick, and P. Kogge, Exascale computing study: technology challenges in achieving exascale systems, [Online]. Available: http://www.cse.nd.edu/Reports/2008/TR-2008-13.pdf.

Rixner, S.

S. Rixner, W. J. Dally, U. J. Kapasi, P. Mattson, and J. D. Owens, "Memory access scheduling," Proc. of the 27th Int. Symp. on Computer Architecture, 2000, pp. 128‒138.

S. Rixner, "Memory controller optimizations for web servers," 37th Int. Symp. on Microarchitecture, Dec. 2004, pp. 355‒366.

Robinson, E.

G. Hendry, E. Robinson, V. Gleyzer, J. Chan, L. P. Carloni, N. Bliss, and K. Bergman, "Circuit-switched memory access in photonic interconnection networks for high-performance embedded computing," Supercomputing (SC), Nov. 2010.

Robinson, M.

A. F. Benner, D. M. Kuchta, P. K. Pepeljugoski, R. A. Budd, G. Hougham, B. V. Fasano, K. Marston, H. Bagheri, E. J. Seminaro, X. Hui, D. Meadowcroft, M. H. Fields, L. McColloch, M. Robinson, F. W. Miller, R. Kaneshiro, R. Granger, D. Childers, and E. Childers, "Optics for high-performance servers and supercomputers," Opt. Fiber Commun. Conf. (OFC 2010), Mar. 2010, San Diego, CA, OTuH1.

Scarpelli, A.

K. Bergman, S. Borkar, D. Campbell, W. Carlson, W. Dally, M. Denneau, P. Franzon, W. Harrod, J. Hiller, S. Karp, S. Keckler, D. Klein, R. Lucas, M. Richards, A. Scarpelli, S. Scott, A. Snavely, T. Sterling, R. S. Williams, K. Yelick, and P. Kogge, Exascale computing study: technology challenges in achieving exascale systems, [Online]. Available: http://www.cse.nd.edu/Reports/2008/TR-2008-13.pdf.

Schenfeld, E.

K. J. Barkerm, A. Benner, R. Hoare, A. Hoisie, A. K. Jones, D. J. Kerbyson, D. Li, R. Melhem, R. Rajamony, E. Schenfeld, S. Shao, C. Stunkel, and P. Walker, "On the feasibility of optical circuit switching for high performance computing systems," Supercomputing (SC), Nov. 2005.

Schow, C. L.

B. G. Lee, F. E. Doany, S. Assefa, W. M. J. Green, M. Yang, C. L. Schow, C. V. Jahnes, S. Zhang, J. Singer, V. I. Kopp, J. A. Kash, and Y. A. Vlasov, "20-µm-pitch eight-channel monolithic fiber array coupling 160 Gb/s/channel to silicon nanophotonic chip," Opt. Fiber Commun. Conf. (OFC 2011), Mar. 2010, San Diego, CA, PDPA4.

Scott, S.

K. Bergman, S. Borkar, D. Campbell, W. Carlson, W. Dally, M. Denneau, P. Franzon, W. Harrod, J. Hiller, S. Karp, S. Keckler, D. Klein, R. Lucas, M. Richards, A. Scarpelli, S. Scott, A. Snavely, T. Sterling, R. S. Williams, K. Yelick, and P. Kogge, Exascale computing study: technology challenges in achieving exascale systems, [Online]. Available: http://www.cse.nd.edu/Reports/2008/TR-2008-13.pdf.

Seminaro, E. J.

A. F. Benner, D. M. Kuchta, P. K. Pepeljugoski, R. A. Budd, G. Hougham, B. V. Fasano, K. Marston, H. Bagheri, E. J. Seminaro, X. Hui, D. Meadowcroft, M. H. Fields, L. McColloch, M. Robinson, F. W. Miller, R. Kaneshiro, R. Granger, D. Childers, and E. Childers, "Optics for high-performance servers and supercomputers," Opt. Fiber Commun. Conf. (OFC 2010), Mar. 2010, San Diego, CA, OTuH1.

Sengupta, S.

A. Greenberg, J. R. Hamilton, N. Jain, S. Kandula, C. Kim, P. Lahiri, D. A. Maltz, P. Patel, and S. Sengupta, "VL2: a scalable and flexible data center network," Proc. of the ACM SIGCOMM 2009 Conf. on Data Communication (SIGCOMM’09), Aug. 2009, Barcelona, Spain, pp. 51‒62.

Shamir, N.

N. Magen, A. Kolodny, U. Weiser, and N. Shamir, "Interconnect-power dissipation in a microprocessor," SLIP’04: Proc. of the 2004 Int. Workshop on System Level Interconnect Prediction, 2004, ACM, pp. 7‒13.

Shao, S.

K. J. Barkerm, A. Benner, R. Hoare, A. Hoisie, A. K. Jones, D. J. Kerbyson, D. Li, R. Melhem, R. Rajamony, E. Schenfeld, S. Shao, C. Stunkel, and P. Walker, "On the feasibility of optical circuit switching for high performance computing systems," Supercomputing (SC), Nov. 2005.

Shi, J.

H. D. Thacker, Y. Luo, J. Shi, I. Shubin, J. Lexau, X. Zheng, G. Li, J. Yao, J. Costa, T. Pinguet, A. Mekis, P. Dong, S. Liao, D. Feng, M. Asghari, R. Ho, K. Raj, J. G. Mitchell, A. V. Krishnamoorthy, and J. E. Cunningham, "Flip-chip integrated silicon photonic bridge chips for sub-picojoule per bit optical links," Electronic Components and Technology Conf. (ECTC), June 2010, pp. 240‒246.

Shibasaki, T.

N. Nedovic, A. Kristensson, S. Parikh, S. Reddy, W. Walker, S. McLeod, N. Tzartzanis, H. Tamura, K. Kanda, T. Yamamoto, S. Matsubara, M. Kibune, Y. Doi, S. Ide, Y. Tsunoda, T. Yamabana, T. Shibasaki, Y. Tomita, T. Hamada, M. Sugawara, J. Ogawa, T. Ikeuchi, and N. Kuwata, "A 2 × 22.3 Gb/s SFI5.2 SerDes in 65 nm CMOS," Compound Semiconductor Integrated Circuit Symp., 2009 (CISC 2009), 11–14 Oct. 2009, pp. 1‒4.

Shubin, I.

H. D. Thacker, Y. Luo, J. Shi, I. Shubin, J. Lexau, X. Zheng, G. Li, J. Yao, J. Costa, T. Pinguet, A. Mekis, P. Dong, S. Liao, D. Feng, M. Asghari, R. Ho, K. Raj, J. G. Mitchell, A. V. Krishnamoorthy, and J. E. Cunningham, "Flip-chip integrated silicon photonic bridge chips for sub-picojoule per bit optical links," Electronic Components and Technology Conf. (ECTC), June 2010, pp. 240‒246.

Singer, J.

B. G. Lee, F. E. Doany, S. Assefa, W. M. J. Green, M. Yang, C. L. Schow, C. V. Jahnes, S. Zhang, J. Singer, V. I. Kopp, J. A. Kash, and Y. A. Vlasov, "20-µm-pitch eight-channel monolithic fiber array coupling 160 Gb/s/channel to silicon nanophotonic chip," Opt. Fiber Commun. Conf. (OFC 2011), Mar. 2010, San Diego, CA, PDPA4.

Small, B. A.

Snavely, A.

K. Bergman, S. Borkar, D. Campbell, W. Carlson, W. Dally, M. Denneau, P. Franzon, W. Harrod, J. Hiller, S. Karp, S. Keckler, D. Klein, R. Lucas, M. Richards, A. Scarpelli, S. Scott, A. Snavely, T. Sterling, R. S. Williams, K. Yelick, and P. Kogge, Exascale computing study: technology challenges in achieving exascale systems, [Online]. Available: http://www.cse.nd.edu/Reports/2008/TR-2008-13.pdf.

Sterling, T.

K. Bergman, S. Borkar, D. Campbell, W. Carlson, W. Dally, M. Denneau, P. Franzon, W. Harrod, J. Hiller, S. Karp, S. Keckler, D. Klein, R. Lucas, M. Richards, A. Scarpelli, S. Scott, A. Snavely, T. Sterling, R. S. Williams, K. Yelick, and P. Kogge, Exascale computing study: technology challenges in achieving exascale systems, [Online]. Available: http://www.cse.nd.edu/Reports/2008/TR-2008-13.pdf.

Stojanovic, V.

S. Beamer, C. Sun, Y. J. Kwon, A. Joshi, C. Batten, and V. Stojanovic, "Re-architecting DRAM memory systems with monolithically integrated silicon photonics," 37th Int. Symp. on Computer Architecture (ISCA-37), June 2010.

Stunkel, C.

K. J. Barkerm, A. Benner, R. Hoare, A. Hoisie, A. K. Jones, D. J. Kerbyson, D. Li, R. Melhem, R. Rajamony, E. Schenfeld, S. Shao, C. Stunkel, and P. Walker, "On the feasibility of optical circuit switching for high performance computing systems," Supercomputing (SC), Nov. 2005.

Sugawara, M.

N. Nedovic, A. Kristensson, S. Parikh, S. Reddy, W. Walker, S. McLeod, N. Tzartzanis, H. Tamura, K. Kanda, T. Yamamoto, S. Matsubara, M. Kibune, Y. Doi, S. Ide, Y. Tsunoda, T. Yamabana, T. Shibasaki, Y. Tomita, T. Hamada, M. Sugawara, J. Ogawa, T. Ikeuchi, and N. Kuwata, "A 2 × 22.3 Gb/s SFI5.2 SerDes in 65 nm CMOS," Compound Semiconductor Integrated Circuit Symp., 2009 (CISC 2009), 11–14 Oct. 2009, pp. 1‒4.

Sun, C.

S. Beamer, C. Sun, Y. J. Kwon, A. Joshi, C. Batten, and V. Stojanovic, "Re-architecting DRAM memory systems with monolithically integrated silicon photonics," 37th Int. Symp. on Computer Architecture (ISCA-37), June 2010.

Tamura, H.

N. Nedovic, A. Kristensson, S. Parikh, S. Reddy, W. Walker, S. McLeod, N. Tzartzanis, H. Tamura, K. Kanda, T. Yamamoto, S. Matsubara, M. Kibune, Y. Doi, S. Ide, Y. Tsunoda, T. Yamabana, T. Shibasaki, Y. Tomita, T. Hamada, M. Sugawara, J. Ogawa, T. Ikeuchi, and N. Kuwata, "A 2 × 22.3 Gb/s SFI5.2 SerDes in 65 nm CMOS," Compound Semiconductor Integrated Circuit Symp., 2009 (CISC 2009), 11–14 Oct. 2009, pp. 1‒4.

Thacker, H. D.

H. D. Thacker, Y. Luo, J. Shi, I. Shubin, J. Lexau, X. Zheng, G. Li, J. Yao, J. Costa, T. Pinguet, A. Mekis, P. Dong, S. Liao, D. Feng, M. Asghari, R. Ho, K. Raj, J. G. Mitchell, A. V. Krishnamoorthy, and J. E. Cunningham, "Flip-chip integrated silicon photonic bridge chips for sub-picojoule per bit optical links," Electronic Components and Technology Conf. (ECTC), June 2010, pp. 240‒246.

Tomita, Y.

N. Nedovic, A. Kristensson, S. Parikh, S. Reddy, W. Walker, S. McLeod, N. Tzartzanis, H. Tamura, K. Kanda, T. Yamamoto, S. Matsubara, M. Kibune, Y. Doi, S. Ide, Y. Tsunoda, T. Yamabana, T. Shibasaki, Y. Tomita, T. Hamada, M. Sugawara, J. Ogawa, T. Ikeuchi, and N. Kuwata, "A 2 × 22.3 Gb/s SFI5.2 SerDes in 65 nm CMOS," Compound Semiconductor Integrated Circuit Symp., 2009 (CISC 2009), 11–14 Oct. 2009, pp. 1‒4.

Trotter, D. C.

W. A. Zortman, M. R. Watts, D. C. Trotter, R. W. Young, and A. L. Lentine, "Low-power high-speed silicon microdisk modulators," Conf. on Lasers and Electro-Optics, May 2010, CThJ4.

Tsunoda, Y.

N. Nedovic, A. Kristensson, S. Parikh, S. Reddy, W. Walker, S. McLeod, N. Tzartzanis, H. Tamura, K. Kanda, T. Yamamoto, S. Matsubara, M. Kibune, Y. Doi, S. Ide, Y. Tsunoda, T. Yamabana, T. Shibasaki, Y. Tomita, T. Hamada, M. Sugawara, J. Ogawa, T. Ikeuchi, and N. Kuwata, "A 2 × 22.3 Gb/s SFI5.2 SerDes in 65 nm CMOS," Compound Semiconductor Integrated Circuit Symp., 2009 (CISC 2009), 11–14 Oct. 2009, pp. 1‒4.

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J. W. Cooley and J. W. Tukey, "An algorithm for the machine calculation of complex Fourier series," Math. Comput. 19, 297‒301 (1965).
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Tzartzanis, N.

N. Nedovic, A. Kristensson, S. Parikh, S. Reddy, W. Walker, S. McLeod, N. Tzartzanis, H. Tamura, K. Kanda, T. Yamamoto, S. Matsubara, M. Kibune, Y. Doi, S. Ide, Y. Tsunoda, T. Yamabana, T. Shibasaki, Y. Tomita, T. Hamada, M. Sugawara, J. Ogawa, T. Ikeuchi, and N. Kuwata, "A 2 × 22.3 Gb/s SFI5.2 SerDes in 65 nm CMOS," Compound Semiconductor Integrated Circuit Symp., 2009 (CISC 2009), 11–14 Oct. 2009, pp. 1‒4.

Vlasov, Y. A.

B. G. Lee, F. E. Doany, S. Assefa, W. M. J. Green, M. Yang, C. L. Schow, C. V. Jahnes, S. Zhang, J. Singer, V. I. Kopp, J. A. Kash, and Y. A. Vlasov, "20-µm-pitch eight-channel monolithic fiber array coupling 160 Gb/s/channel to silicon nanophotonic chip," Opt. Fiber Commun. Conf. (OFC 2011), Mar. 2010, San Diego, CA, PDPA4.

Walker, P.

K. J. Barkerm, A. Benner, R. Hoare, A. Hoisie, A. K. Jones, D. J. Kerbyson, D. Li, R. Melhem, R. Rajamony, E. Schenfeld, S. Shao, C. Stunkel, and P. Walker, "On the feasibility of optical circuit switching for high performance computing systems," Supercomputing (SC), Nov. 2005.

Walker, W.

N. Nedovic, A. Kristensson, S. Parikh, S. Reddy, W. Walker, S. McLeod, N. Tzartzanis, H. Tamura, K. Kanda, T. Yamamoto, S. Matsubara, M. Kibune, Y. Doi, S. Ide, Y. Tsunoda, T. Yamabana, T. Shibasaki, Y. Tomita, T. Hamada, M. Sugawara, J. Ogawa, T. Ikeuchi, and N. Kuwata, "A 2 × 22.3 Gb/s SFI5.2 SerDes in 65 nm CMOS," Compound Semiconductor Integrated Circuit Symp., 2009 (CISC 2009), 11–14 Oct. 2009, pp. 1‒4.

Wang, D. T.

B. Jacob, S. W. Ng, and D. T. Wang, Memory Systems: Cache, DRAM, Disk, Morgan Kaufmann, 2007.

Watts, M. R.

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Figures (7)

Fig. 1
Fig. 1

(Color online) Block diagrams showing (a) processing nodes connected to optically connected memory nodes by optical links (dotted lines), with simultaneous communication between different nodes (arrows), and (b) a subset of the nodes connected by an optical interconnection network.

Fig. 2
Fig. 2

(Color online) Anatomy of one bank of SDRAM. Four data arrays share common row and column selects for concurrent access.

Fig. 3
Fig. 3

(Color online) (a) Experimental setup of OCM system illustrating circuit board A modulating eight wavelengths (one frame, three address, and four 2.5 Gb/s payload channels). The wavelengths are combined using WDM and traverse a 4 × 4 optical network before being received by circuit board B. The path from board B to board A is identical. (b) Wavelength-striped optical format with the 4 × 2.5-Gb/s WDM memory transaction alongside four low-speed network header wavelengths (frame and three address wavelengths).

Fig. 4
Fig. 4

(Color online) Block diagram of a processor node. An FPGA implements the emulated CPU along with a custom MC (memory control, network control, and SerDes). The high-speed, 4 × 2.5-Gb/s serial memory transaction combines with the low-speed network routing information at the photonic transceivers using WDM, and traverses the optical interconnection network as a wavelength-striped optical memory transaction.

Fig. 5
Fig. 5

Flowchart of MC for circuit-switched OCM system.

Fig. 6
Fig. 6

(Color online) Block diagram of an OCM node. The on-board FPGA acts as a local transceiver, handling SerDes functionality for the SDRAM chips. The 4 × 2.5-Gb/s serial links are used to send optical read data to the processor node, which is combined using WDM at the photonic Tx/Rx.

Fig. 7
Fig. 7

(Color online) Optical eye diagrams for the 4 × 2.5-Gb/s memory payload wavelength channels at one network input port (top) and at one network output port (bottom).